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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
da3fb3c9 | 3 | * Operating System Services (OSS) chip handling |
1da177e4 LT |
4 | * Written by Joshua M. Thompson (funaho@jurai.org) |
5 | * | |
6 | * | |
7 | * This chip is used in the IIfx in place of VIA #2. It acts like a fancy | |
8 | * VIA chip with prorammable interrupt levels. | |
9 | * | |
10 | * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some | |
11 | * recent insights into OSS operational details. | |
0c79cf6a | 12 | * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped |
1da177e4 LT |
13 | * to mostly match the A/UX interrupt scheme supported on the |
14 | * VIA side. Also added support for enabling the ISM irq again | |
15 | * since we now have a functional IOP manager. | |
16 | */ | |
17 | ||
18 | #include <linux/types.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/init.h> | |
ddc7fd25 | 23 | #include <linux/irq.h> |
1da177e4 | 24 | |
1da177e4 LT |
25 | #include <asm/macintosh.h> |
26 | #include <asm/macints.h> | |
27 | #include <asm/mac_via.h> | |
28 | #include <asm/mac_oss.h> | |
29 | ||
30 | int oss_present; | |
31 | volatile struct mac_oss *oss; | |
32 | ||
1da177e4 LT |
33 | /* |
34 | * Initialize the OSS | |
35 | * | |
36 | * The OSS "detection" code is actually in via_init() which is always called | |
37 | * before us. Thus we can count on oss_present being valid on entry. | |
38 | */ | |
39 | ||
40 | void __init oss_init(void) | |
41 | { | |
42 | int i; | |
43 | ||
44 | if (!oss_present) return; | |
45 | ||
46 | oss = (struct mac_oss *) OSS_BASE; | |
47 | ||
48 | /* Disable all interrupts. Unlike a VIA it looks like we */ | |
49 | /* do this by setting the source's interrupt level to zero. */ | |
50 | ||
b24f670b | 51 | for (i = 0; i < OSS_NUM_SOURCES; i++) |
da3fb3c9 | 52 | oss->irq_level[i] = 0; |
1da177e4 LT |
53 | } |
54 | ||
1da177e4 LT |
55 | /* |
56 | * Initialize OSS for Nubus access | |
57 | */ | |
58 | ||
59 | void __init oss_nubus_init(void) | |
60 | { | |
61 | } | |
62 | ||
63 | /* | |
da3fb3c9 | 64 | * Handle miscellaneous OSS interrupts. |
1da177e4 LT |
65 | */ |
66 | ||
bd0b9ac4 | 67 | static void oss_irq(struct irq_desc *desc) |
9145db56 | 68 | { |
da3fb3c9 | 69 | int events = oss->irq_pending & |
625b86ad | 70 | (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); |
9145db56 | 71 | |
da3fb3c9 FT |
72 | if (events & OSS_IP_IOPSCC) { |
73 | oss->irq_pending &= ~OSS_IP_IOPSCC; | |
74 | generic_handle_irq(IRQ_MAC_SCC); | |
75 | } | |
76 | ||
77 | if (events & OSS_IP_SCSI) { | |
9145db56 GU |
78 | oss->irq_pending &= ~OSS_IP_SCSI; |
79 | generic_handle_irq(IRQ_MAC_SCSI); | |
da3fb3c9 FT |
80 | } |
81 | ||
82 | if (events & OSS_IP_IOPISM) { | |
83 | oss->irq_pending &= ~OSS_IP_IOPISM; | |
84 | generic_handle_irq(IRQ_MAC_ADB); | |
9145db56 GU |
85 | } |
86 | } | |
1da177e4 LT |
87 | |
88 | /* | |
89 | * Nubus IRQ handler, OSS style | |
90 | * | |
91 | * Unlike the VIA/RBV this is on its own autovector interrupt level. | |
92 | */ | |
93 | ||
bd0b9ac4 | 94 | static void oss_nubus_irq(struct irq_desc *desc) |
9145db56 GU |
95 | { |
96 | int events, irq_bit, i; | |
97 | ||
98 | events = oss->irq_pending & OSS_IP_NUBUS; | |
99 | if (!events) | |
100 | return; | |
101 | ||
9145db56 GU |
102 | /* There are only six slots on the OSS, not seven */ |
103 | ||
104 | i = 6; | |
105 | irq_bit = 0x40; | |
106 | do { | |
107 | --i; | |
108 | irq_bit >>= 1; | |
109 | if (events & irq_bit) { | |
110 | oss->irq_pending &= ~irq_bit; | |
111 | generic_handle_irq(NUBUS_SOURCE_BASE + i); | |
112 | } | |
113 | } while(events & (irq_bit - 1)); | |
114 | } | |
9145db56 GU |
115 | |
116 | /* | |
117 | * Register the OSS and NuBus interrupt dispatchers. | |
da3fb3c9 FT |
118 | * |
119 | * This IRQ mapping is laid out with two things in mind: first, we try to keep | |
120 | * things on their own levels to avoid having to do double-dispatches. Second, | |
121 | * the levels match as closely as possible the alternate IRQ mapping mode (aka | |
122 | * "A/UX mode") available on some VIA machines. | |
9145db56 GU |
123 | */ |
124 | ||
da3fb3c9 FT |
125 | #define OSS_IRQLEV_IOPISM IRQ_AUTO_1 |
126 | #define OSS_IRQLEV_SCSI IRQ_AUTO_2 | |
127 | #define OSS_IRQLEV_NUBUS IRQ_AUTO_3 | |
128 | #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 | |
129 | #define OSS_IRQLEV_VIA1 IRQ_AUTO_6 | |
130 | ||
9145db56 GU |
131 | void __init oss_register_interrupts(void) |
132 | { | |
da3fb3c9 FT |
133 | irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq); |
134 | irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); | |
135 | irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); | |
136 | irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq); | |
137 | irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); | |
138 | ||
139 | /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ | |
140 | oss->irq_level[OSS_VIA1] = IRQ_AUTO_6; | |
9145db56 | 141 | } |
1da177e4 LT |
142 | |
143 | /* | |
144 | * Enable an OSS interrupt | |
145 | * | |
146 | * It looks messy but it's rather straightforward. The switch() statement | |
147 | * just maps the machspec interrupt numbers to the right OSS interrupt | |
148 | * source (if the OSS handles that interrupt) and then sets the interrupt | |
149 | * level for that source to nonzero, thus enabling the interrupt. | |
150 | */ | |
151 | ||
152 | void oss_irq_enable(int irq) { | |
1da177e4 | 153 | switch(irq) { |
80614e5a | 154 | case IRQ_MAC_SCC: |
1da177e4 | 155 | oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; |
da3fb3c9 | 156 | return; |
1da177e4 LT |
157 | case IRQ_MAC_ADB: |
158 | oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; | |
da3fb3c9 | 159 | return; |
1da177e4 LT |
160 | case IRQ_MAC_SCSI: |
161 | oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; | |
da3fb3c9 | 162 | return; |
1da177e4 LT |
163 | case IRQ_NUBUS_9: |
164 | case IRQ_NUBUS_A: | |
165 | case IRQ_NUBUS_B: | |
166 | case IRQ_NUBUS_C: | |
167 | case IRQ_NUBUS_D: | |
168 | case IRQ_NUBUS_E: | |
169 | irq -= NUBUS_SOURCE_BASE; | |
170 | oss->irq_level[irq] = OSS_IRQLEV_NUBUS; | |
da3fb3c9 | 171 | return; |
1da177e4 | 172 | } |
da3fb3c9 FT |
173 | |
174 | if (IRQ_SRC(irq) == 1) | |
175 | via_irq_enable(irq); | |
1da177e4 LT |
176 | } |
177 | ||
178 | /* | |
179 | * Disable an OSS interrupt | |
180 | * | |
181 | * Same as above except we set the source's interrupt level to zero, | |
182 | * to disable the interrupt. | |
183 | */ | |
184 | ||
185 | void oss_irq_disable(int irq) { | |
1da177e4 | 186 | switch(irq) { |
80614e5a | 187 | case IRQ_MAC_SCC: |
da3fb3c9 FT |
188 | oss->irq_level[OSS_IOPSCC] = 0; |
189 | return; | |
1da177e4 | 190 | case IRQ_MAC_ADB: |
da3fb3c9 FT |
191 | oss->irq_level[OSS_IOPISM] = 0; |
192 | return; | |
1da177e4 | 193 | case IRQ_MAC_SCSI: |
da3fb3c9 FT |
194 | oss->irq_level[OSS_SCSI] = 0; |
195 | return; | |
1da177e4 LT |
196 | case IRQ_NUBUS_9: |
197 | case IRQ_NUBUS_A: | |
198 | case IRQ_NUBUS_B: | |
199 | case IRQ_NUBUS_C: | |
200 | case IRQ_NUBUS_D: | |
201 | case IRQ_NUBUS_E: | |
202 | irq -= NUBUS_SOURCE_BASE; | |
da3fb3c9 FT |
203 | oss->irq_level[irq] = 0; |
204 | return; | |
1da177e4 | 205 | } |
da3fb3c9 FT |
206 | |
207 | if (IRQ_SRC(irq) == 1) | |
208 | via_irq_disable(irq); | |
1da177e4 | 209 | } |