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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
1da177e4 | 4 | */ |
b671ad2b KG |
5 | #ifndef _ASM_POWERPC_HW_IRQ_H |
6 | #define _ASM_POWERPC_HW_IRQ_H | |
7 | ||
1da177e4 | 8 | #ifdef __KERNEL__ |
1da177e4 | 9 | |
1da177e4 | 10 | #include <linux/errno.h> |
d04c56f7 | 11 | #include <linux/compiler.h> |
b671ad2b KG |
12 | #include <asm/ptrace.h> |
13 | #include <asm/processor.h> | |
1da177e4 | 14 | |
7230c564 BH |
15 | #ifdef CONFIG_PPC64 |
16 | ||
17 | /* | |
18 | * PACA flags in paca->irq_happened. | |
19 | * | |
20 | * This bits are set when interrupts occur while soft-disabled | |
21 | * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS | |
22 | * is set whenever we manually hard disable. | |
23 | */ | |
24 | #define PACA_IRQ_HARD_DIS 0x01 | |
25 | #define PACA_IRQ_DBELL 0x02 | |
26 | #define PACA_IRQ_EE 0x04 | |
27 | #define PACA_IRQ_DEC 0x08 /* Or FIT */ | |
28 | #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */ | |
0869b6fd | 29 | #define PACA_IRQ_HMI 0x20 |
7230c564 BH |
30 | |
31 | #endif /* CONFIG_PPC64 */ | |
32 | ||
33 | #ifndef __ASSEMBLY__ | |
34 | ||
35 | extern void __replay_interrupt(unsigned int vector); | |
36 | ||
c7aeffc4 | 37 | extern void timer_interrupt(struct pt_regs *); |
7cc1e8ee | 38 | extern void performance_monitor_exception(struct pt_regs *regs); |
6328e593 BB |
39 | extern void WatchdogException(struct pt_regs *regs); |
40 | extern void unknown_exception(struct pt_regs *regs); | |
1da177e4 | 41 | |
d04c56f7 PM |
42 | #ifdef CONFIG_PPC64 |
43 | #include <asm/paca.h> | |
44 | ||
df9ee292 | 45 | static inline unsigned long arch_local_save_flags(void) |
d04c56f7 | 46 | { |
ef2b343e HD |
47 | unsigned long flags; |
48 | ||
df9ee292 DH |
49 | asm volatile( |
50 | "lbz %0,%1(13)" | |
51 | : "=r" (flags) | |
52 | : "i" (offsetof(struct paca_struct, soft_enabled))); | |
ef2b343e HD |
53 | |
54 | return flags; | |
d04c56f7 PM |
55 | } |
56 | ||
df9ee292 | 57 | static inline unsigned long arch_local_irq_disable(void) |
d04c56f7 | 58 | { |
ef2b343e HD |
59 | unsigned long flags, zero; |
60 | ||
df9ee292 DH |
61 | asm volatile( |
62 | "li %1,0; lbz %0,%2(13); stb %1,%2(13)" | |
63 | : "=r" (flags), "=&r" (zero) | |
64 | : "i" (offsetof(struct paca_struct, soft_enabled)) | |
65 | : "memory"); | |
ef2b343e HD |
66 | |
67 | return flags; | |
d04c56f7 | 68 | } |
1da177e4 | 69 | |
df9ee292 | 70 | extern void arch_local_irq_restore(unsigned long); |
1da177e4 | 71 | |
df9ee292 DH |
72 | static inline void arch_local_irq_enable(void) |
73 | { | |
74 | arch_local_irq_restore(1); | |
75 | } | |
76 | ||
77 | static inline unsigned long arch_local_irq_save(void) | |
78 | { | |
79 | return arch_local_irq_disable(); | |
80 | } | |
81 | ||
82 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | |
83 | { | |
84 | return flags == 0; | |
85 | } | |
1da177e4 | 86 | |
df9ee292 DH |
87 | static inline bool arch_irqs_disabled(void) |
88 | { | |
89 | return arch_irqs_disabled_flags(arch_local_save_flags()); | |
90 | } | |
1da177e4 | 91 | |
2d27cfd3 | 92 | #ifdef CONFIG_PPC_BOOK3E |
21b2de34 BH |
93 | #define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory") |
94 | #define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory") | |
2d27cfd3 | 95 | #else |
d9ada91a BH |
96 | #define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1) |
97 | #define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1) | |
2d27cfd3 | 98 | #endif |
e1fa2e13 | 99 | |
5737789c | 100 | #define hard_irq_disable() do { \ |
0b88f772 | 101 | u8 _was_enabled; \ |
5737789c | 102 | __hard_irq_disable(); \ |
0b88f772 TC |
103 | _was_enabled = local_paca->soft_enabled; \ |
104 | local_paca->soft_enabled = 0; \ | |
105 | local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \ | |
4a3b8d0b SW |
106 | if (_was_enabled) \ |
107 | trace_hardirqs_off(); \ | |
5737789c | 108 | } while(0) |
f948501b | 109 | |
0b17ba72 AB |
110 | static inline bool lazy_irq_pending(void) |
111 | { | |
112 | return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS); | |
113 | } | |
114 | ||
7230c564 BH |
115 | /* |
116 | * This is called by asynchronous interrupts to conditionally | |
117 | * re-enable hard interrupts when soft-disabled after having | |
118 | * cleared the source of the interrupt | |
119 | */ | |
120 | static inline void may_hard_irq_enable(void) | |
121 | { | |
122 | get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS; | |
123 | if (!(get_paca()->irq_happened & PACA_IRQ_EE)) | |
124 | __hard_irq_enable(); | |
125 | } | |
d04c56f7 | 126 | |
a546498f BH |
127 | static inline bool arch_irq_disabled_regs(struct pt_regs *regs) |
128 | { | |
129 | return !regs->softe; | |
130 | } | |
131 | ||
be2cf20a | 132 | extern bool prep_irq_for_idle(void); |
2201f994 | 133 | extern bool prep_irq_for_idle_irqsoff(void); |
771d4304 | 134 | extern void irq_set_pending_from_srr1(unsigned long srr1); |
2201f994 NP |
135 | |
136 | #define fini_irq_for_idle_irqsoff() trace_hardirqs_off(); | |
be2cf20a | 137 | |
1d607bb3 BH |
138 | extern void force_external_irq_replay(void); |
139 | ||
df9ee292 | 140 | #else /* CONFIG_PPC64 */ |
1da177e4 | 141 | |
b671ad2b | 142 | #define SET_MSR_EE(x) mtmsr(x) |
df9ee292 DH |
143 | |
144 | static inline unsigned long arch_local_save_flags(void) | |
145 | { | |
146 | return mfmsr(); | |
147 | } | |
148 | ||
149 | static inline void arch_local_irq_restore(unsigned long flags) | |
150 | { | |
151 | #if defined(CONFIG_BOOKE) | |
152 | asm volatile("wrtee %0" : : "r" (flags) : "memory"); | |
b671ad2b | 153 | #else |
df9ee292 | 154 | mtmsr(flags); |
b671ad2b | 155 | #endif |
df9ee292 | 156 | } |
1da177e4 | 157 | |
df9ee292 | 158 | static inline unsigned long arch_local_irq_save(void) |
1da177e4 | 159 | { |
df9ee292 | 160 | unsigned long flags = arch_local_save_flags(); |
b671ad2b | 161 | #ifdef CONFIG_BOOKE |
df9ee292 | 162 | asm volatile("wrteei 0" : : : "memory"); |
834e5a69 CL |
163 | #elif defined(CONFIG_PPC_8xx) |
164 | wrtspr(SPRN_EID); | |
b671ad2b | 165 | #else |
df9ee292 | 166 | SET_MSR_EE(flags & ~MSR_EE); |
b671ad2b | 167 | #endif |
df9ee292 | 168 | return flags; |
1da177e4 LT |
169 | } |
170 | ||
df9ee292 | 171 | static inline void arch_local_irq_disable(void) |
1da177e4 | 172 | { |
b671ad2b | 173 | #ifdef CONFIG_BOOKE |
df9ee292 | 174 | asm volatile("wrteei 0" : : : "memory"); |
834e5a69 CL |
175 | #elif defined(CONFIG_PPC_8xx) |
176 | wrtspr(SPRN_EID); | |
b671ad2b | 177 | #else |
df9ee292 | 178 | arch_local_irq_save(); |
b671ad2b | 179 | #endif |
1da177e4 LT |
180 | } |
181 | ||
df9ee292 | 182 | static inline void arch_local_irq_enable(void) |
1da177e4 | 183 | { |
b671ad2b | 184 | #ifdef CONFIG_BOOKE |
df9ee292 | 185 | asm volatile("wrteei 1" : : : "memory"); |
834e5a69 CL |
186 | #elif defined(CONFIG_PPC_8xx) |
187 | wrtspr(SPRN_EIE); | |
b671ad2b | 188 | #else |
df9ee292 DH |
189 | unsigned long msr = mfmsr(); |
190 | SET_MSR_EE(msr | MSR_EE); | |
b671ad2b | 191 | #endif |
1da177e4 LT |
192 | } |
193 | ||
df9ee292 | 194 | static inline bool arch_irqs_disabled_flags(unsigned long flags) |
e0eca07b SR |
195 | { |
196 | return (flags & MSR_EE) == 0; | |
197 | } | |
198 | ||
df9ee292 DH |
199 | static inline bool arch_irqs_disabled(void) |
200 | { | |
201 | return arch_irqs_disabled_flags(arch_local_save_flags()); | |
202 | } | |
203 | ||
204 | #define hard_irq_disable() arch_local_irq_disable() | |
205 | ||
a546498f BH |
206 | static inline bool arch_irq_disabled_regs(struct pt_regs *regs) |
207 | { | |
208 | return !(regs->msr & MSR_EE); | |
209 | } | |
210 | ||
7230c564 BH |
211 | static inline void may_hard_irq_enable(void) { } |
212 | ||
d04c56f7 | 213 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 214 | |
089fb442 TG |
215 | #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST |
216 | ||
c0ad90a3 IM |
217 | /* |
218 | * interrupt-retrigger: should we handle this via lost interrupts and IPIs | |
219 | * or should we not care like we do now ? --BenH. | |
1da177e4 | 220 | */ |
353bca5e | 221 | struct irq_chip; |
b671ad2b | 222 | |
7230c564 | 223 | #endif /* __ASSEMBLY__ */ |
b671ad2b KG |
224 | #endif /* __KERNEL__ */ |
225 | #endif /* _ASM_POWERPC_HW_IRQ_H */ |