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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
17ed9e31 AK |
2 | #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H |
3 | #define _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H | |
c605782b | 4 | |
9849a569 | 5 | #define __ARCH_USE_5LEVEL_HACK |
c605782b BH |
6 | #include <asm-generic/pgtable-nopud.h> |
7 | ||
8 | ||
419df06e AK |
9 | #define PTE_INDEX_SIZE 8 |
10 | #define PMD_INDEX_SIZE 10 | |
c605782b | 11 | #define PUD_INDEX_SIZE 0 |
419df06e | 12 | #define PGD_INDEX_SIZE 12 |
c605782b | 13 | |
62607bc6 | 14 | /* |
cc50380d | 15 | * we support 32 fragments per PTE page of 64K size |
62607bc6 | 16 | */ |
cc50380d | 17 | #define PTE_FRAG_NR 32 |
62607bc6 AK |
18 | /* |
19 | * We use a 2K PTE page fragment and another 2K for storing | |
20 | * real_pte_t hash index | |
21 | */ | |
cc50380d | 22 | #define PTE_FRAG_SIZE_SHIFT 11 |
62607bc6 AK |
23 | #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT) |
24 | ||
c605782b | 25 | #ifndef __ASSEMBLY__ |
62607bc6 | 26 | #define PTE_TABLE_SIZE PTE_FRAG_SIZE |
c605782b | 27 | #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) |
e93d8e67 | 28 | #define PUD_TABLE_SIZE (0) |
c605782b | 29 | #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) |
7d60b02c | 30 | #endif /* __ASSEMBLY__ */ |
c605782b BH |
31 | |
32 | #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) | |
33 | #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) | |
34 | #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) | |
35 | ||
c605782b BH |
36 | /* PMD_SHIFT determines what a second-level page table entry can map */ |
37 | #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) | |
38 | #define PMD_SIZE (1UL << PMD_SHIFT) | |
39 | #define PMD_MASK (~(PMD_SIZE-1)) | |
40 | ||
41 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | |
42 | #define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) | |
43 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | |
44 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | |
45 | ||
62607bc6 AK |
46 | /* |
47 | * Bits to mask out from a PMD to get to the PTE page | |
48 | * PMDs point to PTE table fragments which are PTE_FRAG_SIZE aligned. | |
49 | */ | |
50 | #define PMD_MASKED_BITS (PTE_FRAG_SIZE - 1) | |
c605782b BH |
51 | /* Bits to mask out from a PGD/PUD to get to the PMD page */ |
52 | #define PUD_MASKED_BITS 0x1ff | |
53 | ||
06743521 AK |
54 | #define pgd_pte(pgd) (pud_pte(((pud_t){ pgd }))) |
55 | #define pte_pgd(pte) ((pgd_t)pte_pud(pte)) | |
56 | ||
17ed9e31 | 57 | #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H */ |