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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
dd56fdf2 | 2 | #ifndef _ASM_POWERPC_TIMEX_H |
3 | #define _ASM_POWERPC_TIMEX_H | |
4 | ||
5 | #ifdef __KERNEL__ | |
6 | ||
1da177e4 | 7 | /* |
dd56fdf2 | 8 | * PowerPC architecture timex specifications |
1da177e4 | 9 | */ |
1da177e4 | 10 | |
1da177e4 | 11 | #include <asm/cputable.h> |
859deea9 | 12 | #include <asm/reg.h> |
1da177e4 | 13 | |
cbd27b8c | 14 | #define CLOCK_TICK_RATE 1024000 /* Underlying HZ */ |
1da177e4 LT |
15 | |
16 | typedef unsigned long cycles_t; | |
17 | ||
1da177e4 LT |
18 | static inline cycles_t get_cycles(void) |
19 | { | |
dd56fdf2 | 20 | #ifdef __powerpc64__ |
859deea9 | 21 | return mftb(); |
dd56fdf2 | 22 | #else |
859deea9 BH |
23 | cycles_t ret; |
24 | ||
dd56fdf2 | 25 | /* |
26 | * For the "cycle" counter we use the timebase lower half. | |
27 | * Currently only used on SMP. | |
28 | */ | |
29 | ||
30 | ret = 0; | |
1da177e4 LT |
31 | |
32 | __asm__ __volatile__( | |
968159c0 | 33 | #ifdef CONFIG_PPC_8xx |
ae2163be LC |
34 | "97: mftb %0\n" |
35 | #else | |
beb2dc0a | 36 | "97: mfspr %0, %2\n" |
ae2163be | 37 | #endif |
1da177e4 LT |
38 | "99:\n" |
39 | ".section __ftr_fixup,\"a\"\n" | |
0909c8c2 BH |
40 | ".align 2\n" |
41 | "98:\n" | |
1da177e4 LT |
42 | " .long %1\n" |
43 | " .long 0\n" | |
0909c8c2 BH |
44 | " .long 97b-98b\n" |
45 | " .long 99b-98b\n" | |
fac23fe4 ME |
46 | " .long 0\n" |
47 | " .long 0\n" | |
1da177e4 | 48 | ".previous" |
beb2dc0a | 49 | : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL)); |
1da177e4 | 50 | return ret; |
859deea9 | 51 | #endif |
1da177e4 LT |
52 | } |
53 | ||
dd56fdf2 | 54 | #endif /* __KERNEL__ */ |
55 | #endif /* _ASM_POWERPC_TIMEX_H */ |