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1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
62d60e9f 22#include <linux/cpu.h>
1da177e4
LT
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/slab.h>
30#include <linux/user.h>
31#include <linux/a.out.h>
32#include <linux/tty.h>
33#include <linux/major.h>
34#include <linux/interrupt.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/ioport.h>
38#include <linux/console.h>
39#include <linux/pci.h>
cebb2b15 40#include <linux/utsname.h>
1da177e4
LT
41#include <linux/adb.h>
42#include <linux/module.h>
43#include <linux/delay.h>
44#include <linux/irq.h>
45#include <linux/seq_file.h>
46#include <linux/root_dev.h>
47
48#include <asm/mmu.h>
49#include <asm/processor.h>
50#include <asm/io.h>
51#include <asm/pgtable.h>
52#include <asm/prom.h>
53#include <asm/rtas.h>
54#include <asm/pci-bridge.h>
55#include <asm/iommu.h>
56#include <asm/dma.h>
57#include <asm/machdep.h>
58#include <asm/irq.h>
59#include <asm/time.h>
60#include <asm/nvram.h>
61#include <asm/plpar_wrappers.h>
62#include <asm/xics.h>
1ababe11 63#include <asm/firmware.h>
180a3362 64#include <asm/pmc.h>
bbeb3f4c 65#include <asm/mpic.h>
d387899f 66#include <asm/ppc-pci.h>
69a80d3f
PM
67#include <asm/i8259.h>
68#include <asm/udbg.h>
1da177e4 69
033ef338
PM
70#include "rtas-fw.h"
71
1da177e4
LT
72#ifdef DEBUG
73#define DBG(fmt...) udbg_printf(fmt)
74#else
75#define DBG(fmt...)
76#endif
77
1da177e4
LT
78extern void find_udbg_vterm(void);
79extern void system_reset_fwnmi(void); /* from head.S */
80extern void machine_check_fwnmi(void); /* from head.S */
81extern void generic_find_legacy_serial_ports(u64 *physport,
82 unsigned int *default_speed);
83
84int fwnmi_active; /* TRUE if an FWNMI handler is present */
85
1da177e4
LT
86extern void pSeries_system_reset_exception(struct pt_regs *regs);
87extern int pSeries_machine_check_exception(struct pt_regs *regs);
88
143a1dec
PM
89static void pseries_shared_idle(void);
90static void pseries_dedicated_idle(void);
62d60e9f 91
1da177e4
LT
92struct mpic *pSeries_mpic;
93
0dd194d0 94void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
95{
96 struct device_node *root;
97 const char *model = "";
98
99 root = of_find_node_by_path("/");
100 if (root)
101 model = get_property(root, "model", NULL);
102 seq_printf(m, "machine\t\t: CHRP %s\n", model);
103 of_node_put(root);
104}
105
106/* Initialize firmware assisted non-maskable interrupts if
107 * the firmware supports this feature.
108 *
109 */
110static void __init fwnmi_init(void)
111{
112 int ret;
113 int ibm_nmi_register = rtas_token("ibm,nmi-register");
114 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
115 return;
116 ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
117 __pa((unsigned long)system_reset_fwnmi),
118 __pa((unsigned long)machine_check_fwnmi));
119 if (ret == 0)
120 fwnmi_active = 1;
121}
122
1da177e4
LT
123static void __init pSeries_init_mpic(void)
124{
125 unsigned int *addrp;
126 struct device_node *np;
f9bd170a 127 unsigned long intack = 0;
1da177e4
LT
128
129 /* All ISUs are setup, complete initialization */
130 mpic_init(pSeries_mpic);
131
132 /* Check what kind of cascade ACK we have */
133 if (!(np = of_find_node_by_name(NULL, "pci"))
134 || !(addrp = (unsigned int *)
135 get_property(np, "8259-interrupt-acknowledge", NULL)))
136 printk(KERN_ERR "Cannot find pci to get ack address\n");
137 else
f9bd170a 138 intack = addrp[prom_n_addr_cells(np)-1];
1da177e4
LT
139 of_node_put(np);
140
141 /* Setup the legacy interrupts & controller */
f9bd170a 142 i8259_init(intack, 0);
1da177e4
LT
143
144 /* Hook cascade to mpic */
f9bd170a 145 mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
1da177e4
LT
146}
147
148static void __init pSeries_setup_mpic(void)
149{
150 unsigned int *opprop;
151 unsigned long openpic_addr = 0;
152 unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
153 struct device_node *root;
154 int irq_count;
155
156 /* Find the Open PIC if present */
157 root = of_find_node_by_path("/");
158 opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
159 if (opprop != 0) {
160 int n = prom_n_addr_cells(root);
161
162 for (openpic_addr = 0; n > 0; --n)
163 openpic_addr = (openpic_addr << 32) + *opprop++;
164 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
165 }
166 of_node_put(root);
167
168 BUG_ON(openpic_addr == 0);
169
170 /* Get the sense values from OF */
171 prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
172
173 /* Setup the openpic driver */
174 irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
175 pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
176 16, 16, irq_count, /* isu size, irq offset, irq count */
177 NR_IRQS - 4, /* ipi offset */
178 senses, irq_count, /* sense & sense size */
179 " MPIC ");
180}
181
180a3362
ME
182static void pseries_lpar_enable_pmcs(void)
183{
184 unsigned long set, reset;
185
186 power4_enable_pmcs();
187
188 set = 1UL << 63;
189 reset = 0;
190 plpar_hcall_norets(H_PERFMON, set, reset);
191
192 /* instruct hypervisor to maintain PMCs */
193 if (firmware_has_feature(FW_FEATURE_SPLPAR))
194 get_paca()->lppaca.pmcregs_in_use = 1;
195}
196
1da177e4
LT
197static void __init pSeries_setup_arch(void)
198{
199 /* Fixup ppc_md depending on the type of interrupt controller */
200 if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574 201 ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4 202 ppc_md.get_irq = mpic_get_irq;
fce0d574 203 ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
1da177e4
LT
204 /* Allocate the mpic now, so that find_and_init_phbs() can
205 * fill the ISUs */
206 pSeries_setup_mpic();
207 } else {
208 ppc_md.init_IRQ = xics_init_IRQ;
209 ppc_md.get_irq = xics_get_irq;
fce0d574 210 ppc_md.cpu_irq_down = xics_teardown_cpu;
1da177e4
LT
211 }
212
213#ifdef CONFIG_SMP
214 smp_init_pSeries();
215#endif
216 /* openpic global configuration register (64-bit format). */
217 /* openpic Interrupt Source Unit pointer (64-bit format). */
218 /* python0 facility area (mmio) (64-bit format) REAL address. */
219
220 /* init to some ~sane value until calibrate_delay() runs */
221 loops_per_jiffy = 50000000;
222
223 if (ROOT_DEV == 0) {
224 printk("No ramdisk, default root is /dev/sda2\n");
225 ROOT_DEV = Root_SDA2;
226 }
227
228 fwnmi_init();
229
230 /* Find and initialize PCI host bridges */
231 init_pci_config_tokens();
1da177e4 232 find_and_init_phbs();
0160f53e 233 eeh_init();
1da177e4 234
1da177e4
LT
235 pSeries_nvram_init();
236
62d60e9f 237 /* Choose an idle loop */
1ababe11 238 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 239 vpa_init(boot_cpuid);
62d60e9f
ME
240 if (get_paca()->lppaca.shared_proc) {
241 printk(KERN_INFO "Using shared processor idle loop\n");
050a0938 242 ppc_md.idle_loop = pseries_shared_idle;
62d60e9f
ME
243 } else {
244 printk(KERN_INFO "Using dedicated idle loop\n");
050a0938 245 ppc_md.idle_loop = pseries_dedicated_idle;
62d60e9f
ME
246 }
247 } else {
248 printk(KERN_INFO "Using default idle loop\n");
249 ppc_md.idle_loop = default_idle;
250 }
180a3362
ME
251
252 if (systemcfg->platform & PLATFORM_LPAR)
253 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
254 else
255 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
256}
257
258static int __init pSeries_init_panel(void)
259{
260 /* Manually leave the kernel version on the panel. */
261 ppc_md.progress("Linux ppc64\n", 0);
cebb2b15 262 ppc_md.progress(system_utsname.version, 0);
1da177e4
LT
263
264 return 0;
265}
266arch_initcall(pSeries_init_panel);
267
268
7a6af5e3 269/* Build up the ppc64_firmware_features bitmask field
1da177e4
LT
270 * using contents of device-tree/ibm,hypertas-functions.
271 * Ultimately this functionality may be moved into prom.c prom_init().
272 */
aed31351 273static void __init fw_feature_init(void)
1da177e4
LT
274{
275 struct device_node * dn;
276 char * hypertas;
277 unsigned int len;
278
279 DBG(" -> fw_feature_init()\n");
280
7a6af5e3 281 ppc64_firmware_features = 0;
1da177e4
LT
282 dn = of_find_node_by_path("/rtas");
283 if (dn == NULL) {
284 printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
285 goto no_rtas;
286 }
287
288 hypertas = get_property(dn, "ibm,hypertas-functions", &len);
289 if (hypertas) {
290 while (len > 0){
291 int i, hypertas_len;
292 /* check value against table of strings */
293 for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
294 if ((firmware_features_table[i].name) &&
295 (strcmp(firmware_features_table[i].name,hypertas))==0) {
296 /* we have a match */
7a6af5e3 297 ppc64_firmware_features |=
1da177e4
LT
298 (firmware_features_table[i].val);
299 break;
300 }
301 }
302 hypertas_len = strlen(hypertas);
303 len -= hypertas_len +1;
304 hypertas+= hypertas_len +1;
305 }
306 }
307
308 of_node_put(dn);
309 no_rtas:
310 printk(KERN_INFO "firmware_features = 0x%lx\n",
7a6af5e3 311 ppc64_firmware_features);
1da177e4
LT
312
313 DBG(" <- fw_feature_init()\n");
314}
315
316
317static void __init pSeries_discover_pic(void)
318{
319 struct device_node *np;
320 char *typep;
321
322 /*
323 * Setup interrupt mapping options that are needed for finish_device_tree
324 * to properly parse the OF interrupt tree & do the virtual irq mapping
325 */
326 __irq_offset_value = NUM_ISA_INTERRUPTS;
327 ppc64_interrupt_controller = IC_INVALID;
328 for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
329 typep = (char *)get_property(np, "compatible", NULL);
330 if (strstr(typep, "open-pic"))
331 ppc64_interrupt_controller = IC_OPEN_PIC;
332 else if (strstr(typep, "ppc-xicp"))
333 ppc64_interrupt_controller = IC_PPC_XIC;
334 else
335 printk("pSeries_discover_pic: failed to recognize"
336 " interrupt-controller\n");
337 break;
338 }
339}
340
341static void pSeries_mach_cpu_die(void)
342{
343 local_irq_disable();
344 idle_task_exit();
345 /* Some hardware requires clearing the CPPR, while other hardware does not
346 * it is safe either way
347 */
348 pSeriesLP_cppr_info(0, 0);
349 rtas_stop_self();
350 /* Should never get here... */
351 BUG();
352 for(;;);
353}
354
355
356/*
357 * Early initialization. Relocation is on but do not reference unbolted pages
358 */
359static void __init pSeries_init_early(void)
360{
361 void *comport;
362 int iommu_off = 0;
363 unsigned int default_speed;
364 u64 physport;
365
366 DBG(" -> pSeries_init_early()\n");
367
368 fw_feature_init();
369
370 if (systemcfg->platform & PLATFORM_LPAR)
371 hpte_init_lpar();
372 else {
373 hpte_init_native();
374 iommu_off = (of_chosen &&
375 get_property(of_chosen, "linux,iommu-off", NULL));
376 }
377
378 generic_find_legacy_serial_ports(&physport, &default_speed);
379
380 if (systemcfg->platform & PLATFORM_LPAR)
381 find_udbg_vterm();
382 else if (physport) {
383 /* Map the uart for udbg. */
dfbacdc1 384 comport = (void *)ioremap(physport, 16);
1da177e4
LT
385 udbg_init_uart(comport, default_speed);
386
1da177e4
LT
387 DBG("Hello World !\n");
388 }
389
390
391 iommu_init_early_pSeries();
392
393 pSeries_discover_pic();
394
395 DBG(" <- pSeries_init_early()\n");
396}
397
398
1da177e4
LT
399static int pSeries_check_legacy_ioport(unsigned int baseport)
400{
401 struct device_node *np;
402
403#define I8042_DATA_REG 0x60
404#define FDC_BASE 0x3f0
405
406
407 switch(baseport) {
408 case I8042_DATA_REG:
409 np = of_find_node_by_type(NULL, "8042");
410 if (np == NULL)
411 return -ENODEV;
412 of_node_put(np);
413 break;
414 case FDC_BASE:
415 np = of_find_node_by_type(NULL, "fdc");
416 if (np == NULL)
417 return -ENODEV;
418 of_node_put(np);
419 break;
420 }
421 return 0;
422}
423
424/*
425 * Called very early, MMU is off, device-tree isn't unflattened
426 */
427extern struct machdep_calls pSeries_md;
428
429static int __init pSeries_probe(int platform)
430{
431 if (platform != PLATFORM_PSERIES &&
432 platform != PLATFORM_PSERIES_LPAR)
433 return 0;
434
435 /* if we have some ppc_md fixups for LPAR to do, do
436 * it here ...
437 */
438
439 return 1;
440}
441
c66d5dd6
ME
442DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
443
050a0938
AB
444static inline void dedicated_idle_sleep(unsigned int cpu)
445{
446 struct paca_struct *ppaca = &paca[cpu ^ 1];
447
448 /* Only sleep if the other thread is not idle */
449 if (!(ppaca->lppaca.idle)) {
450 local_irq_disable();
451
452 /*
453 * We are about to sleep the thread and so wont be polling any
454 * more.
455 */
456 clear_thread_flag(TIF_POLLING_NRFLAG);
457
458 /*
459 * SMT dynamic mode. Cede will result in this thread going
460 * dormant, if the partner thread is still doing work. Thread
461 * wakes up if partner goes idle, an interrupt is presented, or
462 * a prod occurs. Returning from the cede enables external
463 * interrupts.
464 */
465 if (!need_resched())
466 cede_processor();
467 else
468 local_irq_enable();
469 } else {
470 /*
471 * Give the HV an opportunity at the processor, since we are
472 * not doing any work.
473 */
474 poll_pending();
475 }
476}
477
143a1dec
PM
478static void pseries_dedicated_idle(void)
479{
c66d5dd6 480 long oldval;
050a0938
AB
481 struct paca_struct *lpaca = get_paca();
482 unsigned int cpu = smp_processor_id();
c66d5dd6
ME
483 unsigned long start_snooze;
484 unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
c66d5dd6
ME
485
486 while (1) {
487 /*
488 * Indicate to the HV that we are idle. Now would be
489 * a good time to find other work to dispatch.
490 */
491 lpaca->lppaca.idle = 1;
492
493 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
494 if (!oldval) {
495 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938 496
c66d5dd6
ME
497 start_snooze = __get_tb() +
498 *smt_snooze_delay * tb_ticks_per_usec;
050a0938 499
c66d5dd6 500 while (!need_resched() && !cpu_is_offline(cpu)) {
050a0938
AB
501 ppc64_runlatch_off();
502
c66d5dd6
ME
503 /*
504 * Go into low thread priority and possibly
505 * low power mode.
506 */
507 HMT_low();
508 HMT_very_low();
509
050a0938
AB
510 if (*smt_snooze_delay != 0 &&
511 __get_tb() > start_snooze) {
512 HMT_medium();
513 dedicated_idle_sleep(cpu);
c66d5dd6 514 }
050a0938 515
c66d5dd6
ME
516 }
517
050a0938 518 HMT_medium();
c66d5dd6
ME
519 clear_thread_flag(TIF_POLLING_NRFLAG);
520 } else {
521 set_need_resched();
522 }
523
c66d5dd6 524 lpaca->lppaca.idle = 0;
050a0938
AB
525 ppc64_runlatch_on();
526
c66d5dd6 527 schedule();
050a0938 528
c66d5dd6
ME
529 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
530 cpu_die();
531 }
c66d5dd6
ME
532}
533
143a1dec 534static void pseries_shared_idle(void)
c66d5dd6
ME
535{
536 struct paca_struct *lpaca = get_paca();
537 unsigned int cpu = smp_processor_id();
538
539 while (1) {
540 /*
541 * Indicate to the HV that we are idle. Now would be
542 * a good time to find other work to dispatch.
543 */
544 lpaca->lppaca.idle = 1;
545
546 while (!need_resched() && !cpu_is_offline(cpu)) {
547 local_irq_disable();
050a0938 548 ppc64_runlatch_off();
c66d5dd6
ME
549
550 /*
551 * Yield the processor to the hypervisor. We return if
552 * an external interrupt occurs (which are driven prior
553 * to returning here) or if a prod occurs from another
554 * processor. When returning here, external interrupts
555 * are enabled.
556 *
557 * Check need_resched() again with interrupts disabled
558 * to avoid a race.
559 */
560 if (!need_resched())
561 cede_processor();
562 else
563 local_irq_enable();
050a0938
AB
564
565 HMT_medium();
c66d5dd6
ME
566 }
567
c66d5dd6 568 lpaca->lppaca.idle = 0;
050a0938
AB
569 ppc64_runlatch_on();
570
c66d5dd6 571 schedule();
050a0938
AB
572
573 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
c66d5dd6
ME
574 cpu_die();
575 }
c66d5dd6
ME
576}
577
4267292b
PM
578static int pSeries_pci_probe_mode(struct pci_bus *bus)
579{
580 if (systemcfg->platform & PLATFORM_LPAR)
581 return PCI_PROBE_DEVTREE;
582 return PCI_PROBE_NORMAL;
583}
584
1da177e4
LT
585struct machdep_calls __initdata pSeries_md = {
586 .probe = pSeries_probe,
587 .setup_arch = pSeries_setup_arch,
588 .init_early = pSeries_init_early,
0dd194d0 589 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
590 .log_error = pSeries_log_error,
591 .pcibios_fixup = pSeries_final_fixup,
4267292b 592 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 593 .irq_bus_setup = pSeries_irq_bus_setup,
033ef338
PM
594 .restart = rtas_fw_restart,
595 .power_off = rtas_fw_power_off,
596 .halt = rtas_fw_halt,
1da177e4
LT
597 .panic = rtas_os_term,
598 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
599 .get_boot_time = rtas_get_boot_time,
600 .get_rtc_time = rtas_get_rtc_time,
601 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 602 .calibrate_decr = generic_calibrate_decr,
6566c6f1 603 .progress = rtas_progress,
1da177e4
LT
604 .check_legacy_ioport = pSeries_check_legacy_ioport,
605 .system_reset_exception = pSeries_system_reset_exception,
606 .machine_check_exception = pSeries_machine_check_exception,
607};