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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
19 | #undef DEBUG | |
20 | ||
62d60e9f | 21 | #include <linux/cpu.h> |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/sched.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/mm.h> | |
26 | #include <linux/stddef.h> | |
27 | #include <linux/unistd.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/user.h> | |
30 | #include <linux/a.out.h> | |
31 | #include <linux/tty.h> | |
32 | #include <linux/major.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/reboot.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/console.h> | |
38 | #include <linux/pci.h> | |
cebb2b15 | 39 | #include <linux/utsname.h> |
1da177e4 LT |
40 | #include <linux/adb.h> |
41 | #include <linux/module.h> | |
42 | #include <linux/delay.h> | |
43 | #include <linux/irq.h> | |
44 | #include <linux/seq_file.h> | |
45 | #include <linux/root_dev.h> | |
46 | ||
47 | #include <asm/mmu.h> | |
48 | #include <asm/processor.h> | |
49 | #include <asm/io.h> | |
50 | #include <asm/pgtable.h> | |
51 | #include <asm/prom.h> | |
52 | #include <asm/rtas.h> | |
53 | #include <asm/pci-bridge.h> | |
54 | #include <asm/iommu.h> | |
55 | #include <asm/dma.h> | |
56 | #include <asm/machdep.h> | |
57 | #include <asm/irq.h> | |
58 | #include <asm/time.h> | |
59 | #include <asm/nvram.h> | |
007e8f51 | 60 | #include "xics.h" |
180a3362 | 61 | #include <asm/pmc.h> |
bbeb3f4c | 62 | #include <asm/mpic.h> |
d387899f | 63 | #include <asm/ppc-pci.h> |
69a80d3f PM |
64 | #include <asm/i8259.h> |
65 | #include <asm/udbg.h> | |
2249ca9d | 66 | #include <asm/smp.h> |
577830b0 | 67 | #include <asm/firmware.h> |
bed59275 | 68 | #include <asm/eeh.h> |
1da177e4 | 69 | |
a1218720 | 70 | #include "plpar_wrappers.h" |
577830b0 | 71 | #include "pseries.h" |
a1218720 | 72 | |
1da177e4 LT |
73 | #ifdef DEBUG |
74 | #define DBG(fmt...) udbg_printf(fmt) | |
75 | #else | |
76 | #define DBG(fmt...) | |
77 | #endif | |
78 | ||
0ebfff14 | 79 | /* move those away to a .h */ |
1da177e4 | 80 | extern void find_udbg_vterm(void); |
1da177e4 LT |
81 | |
82 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | |
83 | ||
fbd7740f PM |
84 | static void pseries_shared_idle_sleep(void); |
85 | static void pseries_dedicated_idle_sleep(void); | |
62d60e9f | 86 | |
0ebfff14 | 87 | static struct device_node *pSeries_mpic_node; |
1da177e4 | 88 | |
8446196a | 89 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
90 | { |
91 | struct device_node *root; | |
92 | const char *model = ""; | |
93 | ||
94 | root = of_find_node_by_path("/"); | |
95 | if (root) | |
e2eb6392 | 96 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
97 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
98 | of_node_put(root); | |
99 | } | |
100 | ||
101 | /* Initialize firmware assisted non-maskable interrupts if | |
102 | * the firmware supports this feature. | |
1da177e4 LT |
103 | */ |
104 | static void __init fwnmi_init(void) | |
105 | { | |
8c4f1f29 ME |
106 | unsigned long system_reset_addr, machine_check_addr; |
107 | ||
1da177e4 LT |
108 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
109 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
110 | return; | |
8c4f1f29 ME |
111 | |
112 | /* If the kernel's not linked at zero we point the firmware at low | |
113 | * addresses anyway, and use a trampoline to get to the real code. */ | |
114 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
115 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
116 | ||
117 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
118 | machine_check_addr)) | |
1da177e4 LT |
119 | fwnmi_active = 1; |
120 | } | |
121 | ||
7d12e780 | 122 | void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
b9e5b4e6 | 123 | { |
35a84c2f | 124 | unsigned int cascade_irq = i8259_irq(); |
0ebfff14 | 125 | if (cascade_irq != NO_IRQ) |
7d12e780 | 126 | generic_handle_irq(cascade_irq); |
0ebfff14 | 127 | desc->chip->eoi(irq); |
b9e5b4e6 BH |
128 | } |
129 | ||
0ebfff14 | 130 | static void __init pseries_mpic_init_IRQ(void) |
1da177e4 | 131 | { |
0ebfff14 | 132 | struct device_node *np, *old, *cascade = NULL; |
954a46e2 | 133 | const unsigned int *addrp; |
f9bd170a | 134 | unsigned long intack = 0; |
954a46e2 | 135 | const unsigned int *opprop; |
1da177e4 | 136 | unsigned long openpic_addr = 0; |
0ebfff14 BH |
137 | unsigned int cascade_irq; |
138 | int naddr, n, i, opplen; | |
139 | struct mpic *mpic; | |
1da177e4 | 140 | |
0ebfff14 | 141 | np = of_find_node_by_path("/"); |
a8bda5dd | 142 | naddr = of_n_addr_cells(np); |
e2eb6392 | 143 | opprop = of_get_property(np, "platform-open-pic", &opplen); |
1da177e4 | 144 | if (opprop != 0) { |
0ebfff14 | 145 | openpic_addr = of_read_number(opprop, naddr); |
1da177e4 LT |
146 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); |
147 | } | |
0ebfff14 | 148 | of_node_put(np); |
1da177e4 LT |
149 | |
150 | BUG_ON(openpic_addr == 0); | |
151 | ||
1da177e4 | 152 | /* Setup the openpic driver */ |
0ebfff14 BH |
153 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, |
154 | MPIC_PRIMARY, | |
155 | 16, 250, /* isu size, irq count */ | |
156 | " MPIC "); | |
157 | BUG_ON(mpic == NULL); | |
158 | ||
159 | /* Add ISUs */ | |
160 | opplen /= sizeof(u32); | |
161 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | |
162 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | |
163 | mpic_assign_isu(mpic, n, isuaddr); | |
164 | } | |
165 | ||
166 | /* All ISUs are setup, complete initialization */ | |
167 | mpic_init(mpic); | |
168 | ||
169 | /* Look for cascade */ | |
170 | for_each_node_by_type(np, "interrupt-controller") | |
55b61fec | 171 | if (of_device_is_compatible(np, "chrp,iic")) { |
0ebfff14 BH |
172 | cascade = np; |
173 | break; | |
174 | } | |
175 | if (cascade == NULL) | |
176 | return; | |
177 | ||
178 | cascade_irq = irq_of_parse_and_map(cascade, 0); | |
179 | if (cascade == NO_IRQ) { | |
586da2cc | 180 | printk(KERN_ERR "mpic: failed to map cascade interrupt"); |
0ebfff14 BH |
181 | return; |
182 | } | |
183 | ||
184 | /* Check ACK type */ | |
185 | for (old = of_node_get(cascade); old != NULL ; old = np) { | |
186 | np = of_get_parent(old); | |
187 | of_node_put(old); | |
188 | if (np == NULL) | |
189 | break; | |
190 | if (strcmp(np->name, "pci") != 0) | |
191 | continue; | |
e2eb6392 | 192 | addrp = of_get_property(np, "8259-interrupt-acknowledge", |
0ebfff14 BH |
193 | NULL); |
194 | if (addrp == NULL) | |
195 | continue; | |
a8bda5dd | 196 | naddr = of_n_addr_cells(np); |
0ebfff14 BH |
197 | intack = addrp[naddr-1]; |
198 | if (naddr > 1) | |
199 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
200 | } | |
201 | if (intack) | |
202 | printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n", | |
203 | intack); | |
204 | i8259_init(cascade, intack); | |
205 | of_node_put(cascade); | |
206 | set_irq_chained_handler(cascade_irq, pseries_8259_cascade); | |
1da177e4 LT |
207 | } |
208 | ||
180a3362 ME |
209 | static void pseries_lpar_enable_pmcs(void) |
210 | { | |
211 | unsigned long set, reset; | |
212 | ||
180a3362 ME |
213 | set = 1UL << 63; |
214 | reset = 0; | |
215 | plpar_hcall_norets(H_PERFMON, set, reset); | |
216 | ||
217 | /* instruct hypervisor to maintain PMCs */ | |
218 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) | |
3356bb9f | 219 | get_lppaca()->pmcregs_in_use = 1; |
180a3362 ME |
220 | } |
221 | ||
0ebfff14 BH |
222 | static void __init pseries_discover_pic(void) |
223 | { | |
224 | struct device_node *np; | |
954a46e2 | 225 | const char *typep; |
0ebfff14 BH |
226 | |
227 | for (np = NULL; (np = of_find_node_by_name(np, | |
228 | "interrupt-controller"));) { | |
e2eb6392 | 229 | typep = of_get_property(np, "compatible", NULL); |
0ebfff14 BH |
230 | if (strstr(typep, "open-pic")) { |
231 | pSeries_mpic_node = of_node_get(np); | |
232 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | |
233 | ppc_md.get_irq = mpic_get_irq; | |
dce623e0 | 234 | setup_kexec_cpu_down_mpic(); |
0ebfff14 | 235 | smp_init_pseries_mpic(); |
0ebfff14 BH |
236 | return; |
237 | } else if (strstr(typep, "ppc-xicp")) { | |
238 | ppc_md.init_IRQ = xics_init_IRQ; | |
dce623e0 | 239 | setup_kexec_cpu_down_xics(); |
0ebfff14 | 240 | smp_init_pseries_xics(); |
0ebfff14 BH |
241 | return; |
242 | } | |
243 | } | |
244 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | |
245 | " interrupt-controller\n"); | |
246 | } | |
247 | ||
248 | static void __init pSeries_setup_arch(void) | |
249 | { | |
250 | /* Discover PIC type and setup ppc_md accordingly */ | |
251 | pseries_discover_pic(); | |
252 | ||
1da177e4 LT |
253 | /* openpic global configuration register (64-bit format). */ |
254 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
255 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
256 | ||
257 | /* init to some ~sane value until calibrate_delay() runs */ | |
258 | loops_per_jiffy = 50000000; | |
259 | ||
260 | if (ROOT_DEV == 0) { | |
261 | printk("No ramdisk, default root is /dev/sda2\n"); | |
262 | ROOT_DEV = Root_SDA2; | |
263 | } | |
264 | ||
265 | fwnmi_init(); | |
266 | ||
267 | /* Find and initialize PCI host bridges */ | |
268 | init_pci_config_tokens(); | |
1da177e4 | 269 | find_and_init_phbs(); |
0160f53e | 270 | eeh_init(); |
1da177e4 | 271 | |
1da177e4 LT |
272 | pSeries_nvram_init(); |
273 | ||
62d60e9f | 274 | /* Choose an idle loop */ |
1ababe11 | 275 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { |
8d15a3e5 | 276 | vpa_init(boot_cpuid); |
3356bb9f | 277 | if (get_lppaca()->shared_proc) { |
4baaf0cf | 278 | printk(KERN_DEBUG "Using shared processor idle loop\n"); |
fbd7740f | 279 | ppc_md.power_save = pseries_shared_idle_sleep; |
62d60e9f | 280 | } else { |
4baaf0cf | 281 | printk(KERN_DEBUG "Using dedicated idle loop\n"); |
fbd7740f | 282 | ppc_md.power_save = pseries_dedicated_idle_sleep; |
62d60e9f ME |
283 | } |
284 | } else { | |
4baaf0cf | 285 | printk(KERN_DEBUG "Using default idle loop\n"); |
62d60e9f | 286 | } |
180a3362 | 287 | |
57cfb814 | 288 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
180a3362 ME |
289 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
290 | else | |
291 | ppc_md.enable_pmcs = power4_enable_pmcs; | |
1da177e4 LT |
292 | } |
293 | ||
294 | static int __init pSeries_init_panel(void) | |
295 | { | |
296 | /* Manually leave the kernel version on the panel. */ | |
297 | ppc_md.progress("Linux ppc64\n", 0); | |
96b644bd | 298 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
299 | |
300 | return 0; | |
301 | } | |
302 | arch_initcall(pSeries_init_panel); | |
303 | ||
cab0af98 ME |
304 | static int pseries_set_dabr(unsigned long dabr) |
305 | { | |
76032de8 | 306 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
307 | } |
308 | ||
76032de8 ME |
309 | static int pseries_set_xdabr(unsigned long dabr) |
310 | { | |
311 | /* We want to catch accesses from kernel and userspace */ | |
312 | return plpar_hcall_norets(H_SET_XDABR, dabr, | |
313 | H_DABRX_KERNEL | H_DABRX_USER); | |
314 | } | |
1da177e4 LT |
315 | |
316 | /* | |
317 | * Early initialization. Relocation is on but do not reference unbolted pages | |
318 | */ | |
319 | static void __init pSeries_init_early(void) | |
320 | { | |
1da177e4 LT |
321 | DBG(" -> pSeries_init_early()\n"); |
322 | ||
323 | fw_feature_init(); | |
1da177e4 | 324 | |
57cfb814 | 325 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
1da177e4 | 326 | find_udbg_vterm(); |
1da177e4 | 327 | |
76032de8 | 328 | if (firmware_has_feature(FW_FEATURE_DABR)) |
cab0af98 | 329 | ppc_md.set_dabr = pseries_set_dabr; |
76032de8 ME |
330 | else if (firmware_has_feature(FW_FEATURE_XDABR)) |
331 | ppc_md.set_dabr = pseries_set_xdabr; | |
1da177e4 LT |
332 | |
333 | iommu_init_early_pSeries(); | |
334 | ||
1da177e4 LT |
335 | DBG(" <- pSeries_init_early()\n"); |
336 | } | |
337 | ||
1da177e4 LT |
338 | /* |
339 | * Called very early, MMU is off, device-tree isn't unflattened | |
340 | */ | |
1da177e4 | 341 | |
e8222502 BH |
342 | static int __init pSeries_probe_hypertas(unsigned long node, |
343 | const char *uname, int depth, | |
344 | void *data) | |
1da177e4 | 345 | { |
e8222502 BH |
346 | if (depth != 1 || |
347 | (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0)) | |
348 | return 0; | |
349 | ||
350 | if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL) | |
351 | powerpc_firmware_features |= FW_FEATURE_LPAR; | |
352 | ||
353 | return 1; | |
354 | } | |
355 | ||
356 | static int __init pSeries_probe(void) | |
357 | { | |
133dda1e | 358 | unsigned long root = of_get_flat_dt_root(); |
5773bbcd AB |
359 | char *dtype = of_get_flat_dt_prop(root, "device_type", NULL); |
360 | ||
e8222502 BH |
361 | if (dtype == NULL) |
362 | return 0; | |
363 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
364 | return 0; |
365 | ||
133dda1e AB |
366 | /* Cell blades firmware claims to be chrp while it's not. Until this |
367 | * is fixed, we need to avoid those here. | |
368 | */ | |
369 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") || | |
370 | of_flat_dt_is_compatible(root, "IBM,CBEA")) | |
371 | return 0; | |
372 | ||
e8222502 | 373 | DBG("pSeries detected, looking for LPAR capability...\n"); |
1da177e4 | 374 | |
e8222502 BH |
375 | /* Now try to figure out if we are running on LPAR */ |
376 | of_scan_flat_dt(pSeries_probe_hypertas, NULL); | |
377 | ||
a2235354 AB |
378 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
379 | hpte_init_lpar(); | |
380 | else | |
381 | hpte_init_native(); | |
382 | ||
e8222502 BH |
383 | DBG("Machine is%s LPAR !\n", |
384 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 385 | |
1da177e4 LT |
386 | return 1; |
387 | } | |
388 | ||
e8222502 | 389 | |
c66d5dd6 ME |
390 | DECLARE_PER_CPU(unsigned long, smt_snooze_delay); |
391 | ||
fbd7740f | 392 | static void pseries_dedicated_idle_sleep(void) |
143a1dec | 393 | { |
050a0938 | 394 | unsigned int cpu = smp_processor_id(); |
c66d5dd6 | 395 | unsigned long start_snooze; |
c66d5dd6 | 396 | |
fbd7740f PM |
397 | /* |
398 | * Indicate to the HV that we are idle. Now would be | |
399 | * a good time to find other work to dispatch. | |
400 | */ | |
401 | get_lppaca()->idle = 1; | |
050a0938 | 402 | |
fbd7740f PM |
403 | /* |
404 | * We come in with interrupts disabled, and need_resched() | |
405 | * has been checked recently. If we should poll for a little | |
406 | * while, do so. | |
407 | */ | |
0ddd3e7d | 408 | if (__get_cpu_var(smt_snooze_delay)) { |
fbd7740f | 409 | start_snooze = get_tb() + |
0ddd3e7d | 410 | __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec; |
fbd7740f PM |
411 | local_irq_enable(); |
412 | set_thread_flag(TIF_POLLING_NRFLAG); | |
050a0938 | 413 | |
fbd7740f PM |
414 | while (get_tb() < start_snooze) { |
415 | if (need_resched() || cpu_is_offline(cpu)) | |
416 | goto out; | |
417 | ppc64_runlatch_off(); | |
418 | HMT_low(); | |
419 | HMT_very_low(); | |
420 | } | |
421 | ||
422 | HMT_medium(); | |
423 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
424 | smp_mb(); | |
425 | local_irq_disable(); | |
426 | if (need_resched() || cpu_is_offline(cpu)) | |
427 | goto out; | |
c66d5dd6 | 428 | } |
fbd7740f | 429 | |
0ddd3e7d | 430 | cede_processor(); |
fbd7740f PM |
431 | |
432 | out: | |
433 | HMT_medium(); | |
434 | get_lppaca()->idle = 0; | |
c66d5dd6 ME |
435 | } |
436 | ||
fbd7740f | 437 | static void pseries_shared_idle_sleep(void) |
c66d5dd6 | 438 | { |
fbd7740f PM |
439 | /* |
440 | * Indicate to the HV that we are idle. Now would be | |
441 | * a good time to find other work to dispatch. | |
442 | */ | |
443 | get_lppaca()->idle = 1; | |
050a0938 | 444 | |
fbd7740f PM |
445 | /* |
446 | * Yield the processor to the hypervisor. We return if | |
447 | * an external interrupt occurs (which are driven prior | |
448 | * to returning here) or if a prod occurs from another | |
449 | * processor. When returning here, external interrupts | |
450 | * are enabled. | |
451 | */ | |
452 | cede_processor(); | |
050a0938 | 453 | |
fbd7740f | 454 | get_lppaca()->idle = 0; |
c66d5dd6 ME |
455 | } |
456 | ||
4267292b PM |
457 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
458 | { | |
57cfb814 | 459 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
460 | return PCI_PROBE_DEVTREE; |
461 | return PCI_PROBE_NORMAL; | |
462 | } | |
463 | ||
5d30bf30 MA |
464 | /** |
465 | * pSeries_power_off - tell firmware about how to power off the system. | |
466 | * | |
467 | * This function calls either the power-off rtas token in normal cases | |
468 | * or the ibm,power-off-ups token (if present & requested) in case of | |
469 | * a power failure. If power-off token is used, power on will only be | |
470 | * possible with power button press. If ibm,power-off-ups token is used | |
471 | * it will allow auto poweron after power is restored. | |
472 | */ | |
473 | void pSeries_power_off(void) | |
474 | { | |
475 | int rc; | |
476 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
477 | ||
478 | if (rtas_flash_term_hook) | |
479 | rtas_flash_term_hook(SYS_POWER_OFF); | |
480 | ||
481 | if (rtas_poweron_auto == 0 || | |
482 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
483 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
484 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
485 | } else { | |
486 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
487 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
488 | } | |
489 | for (;;); | |
490 | } | |
491 | ||
bed59275 SR |
492 | #ifndef CONFIG_PCI |
493 | void pSeries_final_fixup(void) { } | |
494 | #endif | |
495 | ||
e8222502 BH |
496 | define_machine(pseries) { |
497 | .name = "pSeries", | |
1da177e4 LT |
498 | .probe = pSeries_probe, |
499 | .setup_arch = pSeries_setup_arch, | |
500 | .init_early = pSeries_init_early, | |
0dd194d0 | 501 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
502 | .log_error = pSeries_log_error, |
503 | .pcibios_fixup = pSeries_final_fixup, | |
4267292b | 504 | .pci_probe_mode = pSeries_pci_probe_mode, |
f4fcbbe9 | 505 | .restart = rtas_restart, |
5d30bf30 | 506 | .power_off = pSeries_power_off, |
f4fcbbe9 | 507 | .halt = rtas_halt, |
1da177e4 | 508 | .panic = rtas_os_term, |
773bf9c4 AB |
509 | .get_boot_time = rtas_get_boot_time, |
510 | .get_rtc_time = rtas_get_rtc_time, | |
511 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 512 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 513 | .progress = rtas_progress, |
1da177e4 LT |
514 | .system_reset_exception = pSeries_system_reset_exception, |
515 | .machine_check_exception = pSeries_machine_check_exception, | |
516 | }; |