[mirror_ubuntu-artful-kernel.git] / arch / powerpc / platforms / pseries / setup.c

/*
 *  64-bit pSeries and RS/6000 setup code.
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Modified by PPC64 Team, IBM Corp
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/*
 * bootup setup stuff..
 */

#undef DEBUG

#include <linux/cpu.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/console.h>
#include <linux/pci.h>
#include <linux/utsname.h>
#include <linux/adb.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>

#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/rtas.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/kexec.h>
#include <asm/time.h>
#include <asm/nvram.h>
#include "xics.h"
#include <asm/pmc.h>
#include <asm/mpic.h>
#include <asm/ppc-pci.h>
#include <asm/i8259.h>
#include <asm/udbg.h>
#include <asm/smp.h>

#include "plpar_wrappers.h"
#include "ras.h"
#include "firmware.h"

#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif

extern void find_udbg_vterm(void);

int fwnmi_active;  /* TRUE if an FWNMI handler is present */

static void pseries_shared_idle_sleep(void);
static void pseries_dedicated_idle_sleep(void);

struct mpic *pSeries_mpic;

static void pSeries_show_cpuinfo(struct seq_file *m)
{
	struct device_node *root;
	const char *model = "";

	root = of_find_node_by_path("/");
	if (root)
		model = get_property(root, "model", NULL);
	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	of_node_put(root);
}

/* Initialize firmware assisted non-maskable interrupts if
 * the firmware supports this feature.
 */
static void __init fwnmi_init(void)
{
	unsigned long system_reset_addr, machine_check_addr;

	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
		return;

	/* If the kernel's not linked at zero we point the firmware at low
	 * addresses anyway, and use a trampoline to get to the real code. */
	system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
	machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;

	if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
				machine_check_addr))
		fwnmi_active = 1;
}

void pSeries_8259_cascade(unsigned int irq, struct irq_desc *desc,
			  struct pt_regs *regs)
{
	unsigned int max = 100;

	while(max--) {
		int cascade_irq = i8259_irq(regs);
		if (max == 99)
			desc->chip->eoi(irq);
		if (cascade_irq < 0)
			break;
		generic_handle_irq(cascade_irq, regs);
	};
}

static void __init pSeries_init_mpic(void)
{
        unsigned int *addrp;
	struct device_node *np;
	unsigned long intack = 0;

	/* All ISUs are setup, complete initialization */
	mpic_init(pSeries_mpic);

	/* Check what kind of cascade ACK we have */
        if (!(np = of_find_node_by_name(NULL, "pci"))
            || !(addrp = (unsigned int *)
                 get_property(np, "8259-interrupt-acknowledge", NULL)))
                printk(KERN_ERR "Cannot find pci to get ack address\n");
        else
		intack = addrp[prom_n_addr_cells(np)-1];
	of_node_put(np);

	/* Setup the legacy interrupts & controller */
	i8259_init(intack, 0);

	/* Hook cascade to mpic */
	set_irq_chained_handler(NUM_ISA_INTERRUPTS, pSeries_8259_cascade);
}

static void __init pSeries_setup_mpic(void)
{
	unsigned int *opprop;
	unsigned long openpic_addr = 0;
        unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
        struct device_node *root;
	int irq_count;

	/* Find the Open PIC if present */
	root = of_find_node_by_path("/");
	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
	if (opprop != 0) {
		int n = prom_n_addr_cells(root);

		for (openpic_addr = 0; n > 0; --n)
			openpic_addr = (openpic_addr << 32) + *opprop++;
		printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
	}
	of_node_put(root);

	BUG_ON(openpic_addr == 0);

	/* Get the sense values from OF */
	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
	
	/* Setup the openpic driver */
	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
				  16, 16, irq_count, /* isu size, irq offset, irq count */ 
				  NR_IRQS - 4, /* ipi offset */
				  senses, irq_count, /* sense & sense size */
				  " MPIC     ");
}

static void pseries_lpar_enable_pmcs(void)
{
	unsigned long set, reset;

	power4_enable_pmcs();

	set = 1UL << 63;
	reset = 0;
	plpar_hcall_norets(H_PERFMON, set, reset);

	/* instruct hypervisor to maintain PMCs */
	if (firmware_has_feature(FW_FEATURE_SPLPAR))
		get_lppaca()->pmcregs_in_use = 1;
}

static void __init pSeries_setup_arch(void)
{
	/* Fixup ppc_md depending on the type of interrupt controller */
	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
		ppc_md.init_IRQ       = pSeries_init_mpic;
		ppc_md.get_irq        = mpic_get_irq;
		/* Allocate the mpic now, so that find_and_init_phbs() can
		 * fill the ISUs */
		pSeries_setup_mpic();
	} else
		ppc_md.init_IRQ       = xics_init_IRQ;

#ifdef CONFIG_SMP
	smp_init_pSeries();
#endif
	/* openpic global configuration register (64-bit format). */
	/* openpic Interrupt Source Unit pointer (64-bit format). */
	/* python0 facility area (mmio) (64-bit format) REAL address. */

	/* init to some ~sane value until calibrate_delay() runs */
	loops_per_jiffy = 50000000;

	if (ROOT_DEV == 0) {
		printk("No ramdisk, default root is /dev/sda2\n");
		ROOT_DEV = Root_SDA2;
	}

	fwnmi_init();

	/* Find and initialize PCI host bridges */
	init_pci_config_tokens();
	find_and_init_phbs();
	eeh_init();

	pSeries_nvram_init();

	/* Choose an idle loop */
	if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
		vpa_init(boot_cpuid);
		if (get_lppaca()->shared_proc) {
			printk(KERN_DEBUG "Using shared processor idle loop\n");
			ppc_md.power_save = pseries_shared_idle_sleep;
		} else {
			printk(KERN_DEBUG "Using dedicated idle loop\n");
			ppc_md.power_save = pseries_dedicated_idle_sleep;
		}
	} else {
		printk(KERN_DEBUG "Using default idle loop\n");
	}

	if (firmware_has_feature(FW_FEATURE_LPAR))
		ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
	else
		ppc_md.enable_pmcs = power4_enable_pmcs;
}

static int __init pSeries_init_panel(void)
{
	/* Manually leave the kernel version on the panel. */
	ppc_md.progress("Linux ppc64\n", 0);
	ppc_md.progress(system_utsname.release, 0);

	return 0;
}
arch_initcall(pSeries_init_panel);

static  void __init pSeries_discover_pic(void)
{
	struct device_node *np;
	char *typep;

	/*
	 * Setup interrupt mapping options that are needed for finish_device_tree
	 * to properly parse the OF interrupt tree & do the virtual irq mapping
	 */
	__irq_offset_value = NUM_ISA_INTERRUPTS;
	ppc64_interrupt_controller = IC_INVALID;
	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
		typep = (char *)get_property(np, "compatible", NULL);
		if (strstr(typep, "open-pic")) {
			ppc64_interrupt_controller = IC_OPEN_PIC;
			break;
		} else if (strstr(typep, "ppc-xicp")) {
			ppc64_interrupt_controller = IC_PPC_XIC;
			break;
		}
	}
	if (ppc64_interrupt_controller == IC_INVALID)
		printk("pSeries_discover_pic: failed to recognize"
			" interrupt-controller\n");

}

static void pSeries_mach_cpu_die(void)
{
	local_irq_disable();
	idle_task_exit();
	xics_teardown_cpu(0);
	rtas_stop_self();
	/* Should never get here... */
	BUG();
	for(;;);
}

static int pseries_set_dabr(unsigned long dabr)
{
	return plpar_hcall_norets(H_SET_DABR, dabr);
}

static int pseries_set_xdabr(unsigned long dabr)
{
	/* We want to catch accesses from kernel and userspace */
	return plpar_hcall_norets(H_SET_XDABR, dabr,
			H_DABRX_KERNEL | H_DABRX_USER);
}

/*
 * Early initialization.  Relocation is on but do not reference unbolted pages
 */
static void __init pSeries_init_early(void)
{
	DBG(" -> pSeries_init_early()\n");

	fw_feature_init();

	if (firmware_has_feature(FW_FEATURE_LPAR))
		find_udbg_vterm();

	if (firmware_has_feature(FW_FEATURE_DABR))
		ppc_md.set_dabr = pseries_set_dabr;
	else if (firmware_has_feature(FW_FEATURE_XDABR))
		ppc_md.set_dabr = pseries_set_xdabr;

	iommu_init_early_pSeries();

	pSeries_discover_pic();

	DBG(" <- pSeries_init_early()\n");
}


static int pSeries_check_legacy_ioport(unsigned int baseport)
{
	struct device_node *np;

#define I8042_DATA_REG	0x60
#define FDC_BASE	0x3f0


	switch(baseport) {
	case I8042_DATA_REG:
		np = of_find_node_by_type(NULL, "8042");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	case FDC_BASE:
		np = of_find_node_by_type(NULL, "fdc");
		if (np == NULL)
			return -ENODEV;
		of_node_put(np);
		break;
	}
	return 0;
}

/*
 * Called very early, MMU is off, device-tree isn't unflattened
 */

static int __init pSeries_probe_hypertas(unsigned long node,
					 const char *uname, int depth,
					 void *data)
{
	if (depth != 1 ||
	    (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
 		return 0;

	if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
 		powerpc_firmware_features |= FW_FEATURE_LPAR;

	if (firmware_has_feature(FW_FEATURE_LPAR))
		hpte_init_lpar();
	else
		hpte_init_native();

 	return 1;
}

static int __init pSeries_probe(void)
{
	unsigned long root = of_get_flat_dt_root();
 	char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
 					  "device_type", NULL);
 	if (dtype == NULL)
 		return 0;
 	if (strcmp(dtype, "chrp"))
		return 0;

	/* Cell blades firmware claims to be chrp while it's not. Until this
	 * is fixed, we need to avoid those here.
	 */
	if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
	    of_flat_dt_is_compatible(root, "IBM,CBEA"))
		return 0;

	DBG("pSeries detected, looking for LPAR capability...\n");

	/* Now try to figure out if we are running on LPAR */
	of_scan_flat_dt(pSeries_probe_hypertas, NULL);

	DBG("Machine is%s LPAR !\n",
	    (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");

	return 1;
}


DECLARE_PER_CPU(unsigned long, smt_snooze_delay);

static void pseries_dedicated_idle_sleep(void)
{ 
	unsigned int cpu = smp_processor_id();
	unsigned long start_snooze;
	unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);

	/*
	 * Indicate to the HV that we are idle. Now would be
	 * a good time to find other work to dispatch.
	 */
	get_lppaca()->idle = 1;

	/*
	 * We come in with interrupts disabled, and need_resched()
	 * has been checked recently.  If we should poll for a little
	 * while, do so.
	 */
	if (*smt_snooze_delay) {
		start_snooze = get_tb() +
			*smt_snooze_delay * tb_ticks_per_usec;
		local_irq_enable();
		set_thread_flag(TIF_POLLING_NRFLAG);

		while (get_tb() < start_snooze) {
			if (need_resched() || cpu_is_offline(cpu))
				goto out;
			ppc64_runlatch_off();
			HMT_low();
			HMT_very_low();
		}

		HMT_medium();
		clear_thread_flag(TIF_POLLING_NRFLAG);
		smp_mb();
		local_irq_disable();
		if (need_resched() || cpu_is_offline(cpu))
			goto out;
	}

	/*
	 * Cede if the other thread is not idle, so that it can
	 * go single-threaded.  If the other thread is idle,
	 * we ask the hypervisor if it has pending work it
	 * wants to do and cede if it does.  Otherwise we keep
	 * polling in order to reduce interrupt latency.
	 *
	 * Doing the cede when the other thread is active will
	 * result in this thread going dormant, meaning the other
	 * thread gets to run in single-threaded (ST) mode, which
	 * is slightly faster than SMT mode with this thread at
	 * very low priority.  The cede enables interrupts, which
	 * doesn't matter here.
	 */
	if (!lppaca[cpu ^ 1].idle || poll_pending() == H_PENDING)
		cede_processor();

out:
	HMT_medium();
	get_lppaca()->idle = 0;
}

static void pseries_shared_idle_sleep(void)
{
	/*
	 * Indicate to the HV that we are idle. Now would be
	 * a good time to find other work to dispatch.
	 */
	get_lppaca()->idle = 1;

	/*
	 * Yield the processor to the hypervisor.  We return if
	 * an external interrupt occurs (which are driven prior
	 * to returning here) or if a prod occurs from another
	 * processor. When returning here, external interrupts
	 * are enabled.
	 */
	cede_processor();

	get_lppaca()->idle = 0;
}

static int pSeries_pci_probe_mode(struct pci_bus *bus)
{
	if (firmware_has_feature(FW_FEATURE_LPAR))
		return PCI_PROBE_DEVTREE;
	return PCI_PROBE_NORMAL;
}

#ifdef CONFIG_KEXEC
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
{
	/* Don't risk a hypervisor call if we're crashing */
	if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
		unsigned long vpa = __pa(get_lppaca());

		if (unregister_vpa(hard_smp_processor_id(), vpa)) {
			printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
					"failed\n", smp_processor_id(),
					hard_smp_processor_id());
		}
	}

	if (ppc64_interrupt_controller == IC_OPEN_PIC)
		mpic_teardown_this_cpu(secondary);
	else
		xics_teardown_cpu(secondary);
}
#endif

define_machine(pseries) {
	.name			= "pSeries",
	.probe			= pSeries_probe,
	.setup_arch		= pSeries_setup_arch,
	.init_early		= pSeries_init_early,
	.show_cpuinfo		= pSeries_show_cpuinfo,
	.log_error		= pSeries_log_error,
	.pcibios_fixup		= pSeries_final_fixup,
	.pci_probe_mode		= pSeries_pci_probe_mode,
	.irq_bus_setup		= pSeries_irq_bus_setup,
	.restart		= rtas_restart,
	.power_off		= rtas_power_off,
	.halt			= rtas_halt,
	.panic			= rtas_os_term,
	.cpu_die		= pSeries_mach_cpu_die,
	.get_boot_time		= rtas_get_boot_time,
	.get_rtc_time		= rtas_get_rtc_time,
	.set_rtc_time		= rtas_set_rtc_time,
	.calibrate_decr		= generic_calibrate_decr,
	.progress		= rtas_progress,
	.check_legacy_ioport	= pSeries_check_legacy_ioport,
	.system_reset_exception = pSeries_system_reset_exception,
	.machine_check_exception = pSeries_machine_check_exception,
#ifdef CONFIG_KEXEC
	.kexec_cpu_down		= pseries_kexec_cpu_down,
	.machine_kexec		= default_machine_kexec,
	.machine_kexec_prepare	= default_machine_kexec_prepare,
	.machine_crash_shutdown	= default_machine_crash_shutdown,
#endif
};
Commit	Line	Data
1da177e4	1	/*
033ef338	2	* 64-bit pSeries and RS/6000 setup code.
1da177e4 LT	3	*
	4	* Copyright (C) 1995 Linus Torvalds
	5	* Adapted from 'alpha' version by Gary Thomas
	6	* Modified by Cort Dougan (cort@cs.nmt.edu)
	7	* Modified by PPC64 Team, IBM Corp
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* as published by the Free Software Foundation; either version
	12	* 2 of the License, or (at your option) any later version.
	13	*/
	14
	15	/*
	16	* bootup setup stuff..
	17	*/
	18
	19	#undef DEBUG
	20
62d60e9f	21	#include <linux/cpu.h>
1da177e4 LT	22	#include <linux/errno.h>
	23	#include <linux/sched.h>
	24	#include <linux/kernel.h>
	25	#include <linux/mm.h>
	26	#include <linux/stddef.h>
	27	#include <linux/unistd.h>
	28	#include <linux/slab.h>
	29	#include <linux/user.h>
	30	#include <linux/a.out.h>
	31	#include <linux/tty.h>
	32	#include <linux/major.h>
	33	#include <linux/interrupt.h>
	34	#include <linux/reboot.h>
	35	#include <linux/init.h>
	36	#include <linux/ioport.h>
	37	#include <linux/console.h>
	38	#include <linux/pci.h>
cebb2b15	39	#include <linux/utsname.h>
1da177e4 LT	40	#include <linux/adb.h>
	41	#include <linux/module.h>
	42	#include <linux/delay.h>
	43	#include <linux/irq.h>
	44	#include <linux/seq_file.h>
	45	#include <linux/root_dev.h>
	46
	47	#include <asm/mmu.h>
	48	#include <asm/processor.h>
	49	#include <asm/io.h>
	50	#include <asm/pgtable.h>
	51	#include <asm/prom.h>
	52	#include <asm/rtas.h>
	53	#include <asm/pci-bridge.h>
	54	#include <asm/iommu.h>
	55	#include <asm/dma.h>
	56	#include <asm/machdep.h>
	57	#include <asm/irq.h>
3d1229d6	58	#include <asm/kexec.h>
1da177e4 LT	59	#include <asm/time.h>
1da177e4 LT	60	#include <asm/nvram.h>
007e8f51	61	#include "xics.h"
180a3362	62	#include <asm/pmc.h>
bbeb3f4c	63	#include <asm/mpic.h>
d387899f	64	#include <asm/ppc-pci.h>
69a80d3f PM	65	#include <asm/i8259.h>
69a80d3f PM	66	#include <asm/udbg.h>
2249ca9d	67	#include <asm/smp.h>
1da177e4	68
a1218720	69	#include "plpar_wrappers.h"
c902be71	70	#include "ras.h"
1965746b	71	#include "firmware.h"
a1218720	72
1da177e4 LT	73	#ifdef DEBUG
	74	#define DBG(fmt...) udbg_printf(fmt)
	75	#else
	76	#define DBG(fmt...)
	77	#endif
	78
1da177e4	79	extern void find_udbg_vterm(void);
1da177e4 LT	80
	81	int fwnmi_active; /* TRUE if an FWNMI handler is present */
	82
fbd7740f PM	83	static void pseries_shared_idle_sleep(void);
fbd7740f PM	84	static void pseries_dedicated_idle_sleep(void);
62d60e9f	85
1da177e4 LT	86	struct mpic *pSeries_mpic;
1da177e4 LT	87
8446196a	88	static void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4 LT	89	{
	90	struct device_node *root;
	91	const char *model = "";
	92
	93	root = of_find_node_by_path("/");
	94	if (root)
	95	model = get_property(root, "model", NULL);
	96	seq_printf(m, "machine\t\t: CHRP %s\n", model);
	97	of_node_put(root);
	98	}
	99
	100	/* Initialize firmware assisted non-maskable interrupts if
	101	* the firmware supports this feature.
1da177e4 LT	102	*/
	103	static void __init fwnmi_init(void)
	104	{
8c4f1f29 ME	105	unsigned long system_reset_addr, machine_check_addr;
8c4f1f29 ME	106
1da177e4 LT	107	int ibm_nmi_register = rtas_token("ibm,nmi-register");
	108	if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
	109	return;
8c4f1f29 ME	110
	111	/* If the kernel's not linked at zero we point the firmware at low
	112	* addresses anyway, and use a trampoline to get to the real code. */
	113	system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
	114	machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
	115
	116	if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
	117	machine_check_addr))
1da177e4 LT	118	fwnmi_active = 1;
	119	}
	120
b9e5b4e6 BH	121	void pSeries_8259_cascade(unsigned int irq, struct irq_desc *desc,
	122	struct pt_regs *regs)
	123	{
	124	unsigned int max = 100;
	125
	126	while(max--) {
	127	int cascade_irq = i8259_irq(regs);
	128	if (max == 99)
	129	desc->chip->eoi(irq);
	130	if (cascade_irq < 0)
	131	break;
	132	generic_handle_irq(cascade_irq, regs);
	133	};
	134	}
	135
1da177e4 LT	136	static void __init pSeries_init_mpic(void)
	137	{
	138	unsigned int *addrp;
	139	struct device_node *np;
f9bd170a	140	unsigned long intack = 0;
1da177e4 LT	141
	142	/* All ISUs are setup, complete initialization */
	143	mpic_init(pSeries_mpic);
	144
	145	/* Check what kind of cascade ACK we have */
	146	if (!(np = of_find_node_by_name(NULL, "pci"))
	147	\|\| !(addrp = (unsigned int *)
	148	get_property(np, "8259-interrupt-acknowledge", NULL)))
	149	printk(KERN_ERR "Cannot find pci to get ack address\n");
	150	else
f9bd170a	151	intack = addrp[prom_n_addr_cells(np)-1];
1da177e4 LT	152	of_node_put(np);
	153
	154	/* Setup the legacy interrupts & controller */
f9bd170a	155	i8259_init(intack, 0);
1da177e4 LT	156
1da177e4 LT	157	/* Hook cascade to mpic */
b9e5b4e6	158	set_irq_chained_handler(NUM_ISA_INTERRUPTS, pSeries_8259_cascade);
1da177e4 LT	159	}
	160
	161	static void __init pSeries_setup_mpic(void)
	162	{
	163	unsigned int *opprop;
	164	unsigned long openpic_addr = 0;
	165	unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
	166	struct device_node *root;
	167	int irq_count;
	168
	169	/* Find the Open PIC if present */
	170	root = of_find_node_by_path("/");
	171	opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
	172	if (opprop != 0) {
	173	int n = prom_n_addr_cells(root);
	174
	175	for (openpic_addr = 0; n > 0; --n)
	176	openpic_addr = (openpic_addr << 32) + *opprop++;
	177	printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
	178	}
	179	of_node_put(root);
	180
	181	BUG_ON(openpic_addr == 0);
	182
	183	/* Get the sense values from OF */
	184	prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
	185
	186	/* Setup the openpic driver */
	187	irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
	188	pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
	189	16, 16, irq_count, /* isu size, irq offset, irq count */
	190	NR_IRQS - 4, /* ipi offset */
	191	senses, irq_count, /* sense & sense size */
	192	" MPIC ");
	193	}
	194
180a3362 ME	195	static void pseries_lpar_enable_pmcs(void)
	196	{
	197	unsigned long set, reset;
	198
	199	power4_enable_pmcs();
	200
	201	set = 1UL << 63;
	202	reset = 0;
	203	plpar_hcall_norets(H_PERFMON, set, reset);
	204
	205	/* instruct hypervisor to maintain PMCs */
	206	if (firmware_has_feature(FW_FEATURE_SPLPAR))
3356bb9f	207	get_lppaca()->pmcregs_in_use = 1;
180a3362 ME	208	}
180a3362 ME	209
1da177e4 LT	210	static void __init pSeries_setup_arch(void)
	211	{
	212	/* Fixup ppc_md depending on the type of interrupt controller */
	213	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
fce0d574	214	ppc_md.init_IRQ = pSeries_init_mpic;
1da177e4 LT	215	ppc_md.get_irq = mpic_get_irq;
	216	/* Allocate the mpic now, so that find_and_init_phbs() can
	217	* fill the ISUs */
	218	pSeries_setup_mpic();
b9e5b4e6	219	} else
1da177e4	220	ppc_md.init_IRQ = xics_init_IRQ;
1da177e4 LT	221
	222	#ifdef CONFIG_SMP
	223	smp_init_pSeries();
	224	#endif
	225	/* openpic global configuration register (64-bit format). */
	226	/* openpic Interrupt Source Unit pointer (64-bit format). */
	227	/* python0 facility area (mmio) (64-bit format) REAL address. */
	228
	229	/* init to some ~sane value until calibrate_delay() runs */
	230	loops_per_jiffy = 50000000;
	231
	232	if (ROOT_DEV == 0) {
	233	printk("No ramdisk, default root is /dev/sda2\n");
	234	ROOT_DEV = Root_SDA2;
	235	}
	236
	237	fwnmi_init();
	238
	239	/* Find and initialize PCI host bridges */
	240	init_pci_config_tokens();
1da177e4	241	find_and_init_phbs();
0160f53e	242	eeh_init();
1da177e4	243
1da177e4 LT	244	pSeries_nvram_init();
1da177e4 LT	245
62d60e9f	246	/* Choose an idle loop */
1ababe11	247	if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5	248	vpa_init(boot_cpuid);
3356bb9f	249	if (get_lppaca()->shared_proc) {
4baaf0cf	250	printk(KERN_DEBUG "Using shared processor idle loop\n");
fbd7740f	251	ppc_md.power_save = pseries_shared_idle_sleep;
62d60e9f	252	} else {
4baaf0cf	253	printk(KERN_DEBUG "Using dedicated idle loop\n");
fbd7740f	254	ppc_md.power_save = pseries_dedicated_idle_sleep;
62d60e9f ME	255	}
62d60e9f ME	256	} else {
4baaf0cf	257	printk(KERN_DEBUG "Using default idle loop\n");
62d60e9f	258	}
180a3362	259
57cfb814	260	if (firmware_has_feature(FW_FEATURE_LPAR))
180a3362 ME	261	ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
	262	else
	263	ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4 LT	264	}
	265
	266	static int __init pSeries_init_panel(void)
	267	{
	268	/* Manually leave the kernel version on the panel. */
	269	ppc_md.progress("Linux ppc64\n", 0);
3de620e8	270	ppc_md.progress(system_utsname.release, 0);
1da177e4 LT	271
	272	return 0;
	273	}
	274	arch_initcall(pSeries_init_panel);
	275
1da177e4 LT	276	static void __init pSeries_discover_pic(void)
	277	{
	278	struct device_node *np;
	279	char *typep;
	280
	281	/*
	282	* Setup interrupt mapping options that are needed for finish_device_tree
	283	* to properly parse the OF interrupt tree & do the virtual irq mapping
	284	*/
	285	__irq_offset_value = NUM_ISA_INTERRUPTS;
	286	ppc64_interrupt_controller = IC_INVALID;
	287	for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
	288	typep = (char *)get_property(np, "compatible", NULL);
9da5cad6	289	if (strstr(typep, "open-pic")) {
1da177e4	290	ppc64_interrupt_controller = IC_OPEN_PIC;
9da5cad6 HM	291	break;
9da5cad6 HM	292	} else if (strstr(typep, "ppc-xicp")) {
1da177e4	293	ppc64_interrupt_controller = IC_PPC_XIC;
9da5cad6 HM	294	break;
9da5cad6 HM	295	}
1da177e4	296	}
9da5cad6 HM	297	if (ppc64_interrupt_controller == IC_INVALID)
	298	printk("pSeries_discover_pic: failed to recognize"
	299	" interrupt-controller\n");
	300
1da177e4 LT	301	}
	302
	303	static void pSeries_mach_cpu_die(void)
	304	{
	305	local_irq_disable();
	306	idle_task_exit();
b9e5b4e6	307	xics_teardown_cpu(0);
1da177e4 LT	308	rtas_stop_self();
	309	/* Should never get here... */
	310	BUG();
	311	for(;;);
	312	}
	313
cab0af98 ME	314	static int pseries_set_dabr(unsigned long dabr)
cab0af98 ME	315	{
76032de8	316	return plpar_hcall_norets(H_SET_DABR, dabr);
cab0af98 ME	317	}
cab0af98 ME	318
76032de8 ME	319	static int pseries_set_xdabr(unsigned long dabr)
	320	{
	321	/* We want to catch accesses from kernel and userspace */
	322	return plpar_hcall_norets(H_SET_XDABR, dabr,
	323	H_DABRX_KERNEL \| H_DABRX_USER);
	324	}
1da177e4 LT	325
	326	/*
	327	* Early initialization. Relocation is on but do not reference unbolted pages
	328	*/
	329	static void __init pSeries_init_early(void)
	330	{
1da177e4 LT	331	DBG(" -> pSeries_init_early()\n");
	332
	333	fw_feature_init();
1da177e4	334
57cfb814	335	if (firmware_has_feature(FW_FEATURE_LPAR))
1da177e4	336	find_udbg_vterm();
1da177e4	337
76032de8	338	if (firmware_has_feature(FW_FEATURE_DABR))
cab0af98	339	ppc_md.set_dabr = pseries_set_dabr;
76032de8 ME	340	else if (firmware_has_feature(FW_FEATURE_XDABR))
76032de8 ME	341	ppc_md.set_dabr = pseries_set_xdabr;
1da177e4 LT	342
	343	iommu_init_early_pSeries();
	344
	345	pSeries_discover_pic();
	346
	347	DBG(" <- pSeries_init_early()\n");
	348	}
	349
	350
1da177e4 LT	351	static int pSeries_check_legacy_ioport(unsigned int baseport)
	352	{
	353	struct device_node *np;
	354
	355	#define I8042_DATA_REG 0x60
	356	#define FDC_BASE 0x3f0
	357
	358
	359	switch(baseport) {
	360	case I8042_DATA_REG:
	361	np = of_find_node_by_type(NULL, "8042");
	362	if (np == NULL)
	363	return -ENODEV;
	364	of_node_put(np);
	365	break;
	366	case FDC_BASE:
	367	np = of_find_node_by_type(NULL, "fdc");
	368	if (np == NULL)
	369	return -ENODEV;
	370	of_node_put(np);
	371	break;
	372	}
	373	return 0;
	374	}
	375
	376	/*
	377	* Called very early, MMU is off, device-tree isn't unflattened
	378	*/
1da177e4	379
e8222502 BH	380	static int __init pSeries_probe_hypertas(unsigned long node,
	381	const char *uname, int depth,
	382	void *data)
1da177e4	383	{
e8222502 BH	384	if (depth != 1 \|\|
	385	(strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
	386	return 0;
	387
	388	if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
	389	powerpc_firmware_features \|= FW_FEATURE_LPAR;
	390
7d0daae4 ME	391	if (firmware_has_feature(FW_FEATURE_LPAR))
	392	hpte_init_lpar();
	393	else
	394	hpte_init_native();
	395
e8222502 BH	396	return 1;
	397	}
	398
	399	static int __init pSeries_probe(void)
	400	{
133dda1e	401	unsigned long root = of_get_flat_dt_root();
e8222502 BH	402	char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
	403	"device_type", NULL);
	404	if (dtype == NULL)
	405	return 0;
	406	if (strcmp(dtype, "chrp"))
1da177e4 LT	407	return 0;
1da177e4 LT	408
133dda1e AB	409	/* Cell blades firmware claims to be chrp while it's not. Until this
	410	* is fixed, we need to avoid those here.
	411	*/
	412	if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") \|\|
	413	of_flat_dt_is_compatible(root, "IBM,CBEA"))
	414	return 0;
	415
e8222502	416	DBG("pSeries detected, looking for LPAR capability...\n");
1da177e4	417
e8222502 BH	418	/* Now try to figure out if we are running on LPAR */
	419	of_scan_flat_dt(pSeries_probe_hypertas, NULL);
	420
	421	DBG("Machine is%s LPAR !\n",
	422	(powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
57cfb814	423
1da177e4 LT	424	return 1;
	425	}
	426
e8222502	427
c66d5dd6 ME	428	DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
c66d5dd6 ME	429
fbd7740f	430	static void pseries_dedicated_idle_sleep(void)
143a1dec	431	{
050a0938	432	unsigned int cpu = smp_processor_id();
c66d5dd6 ME	433	unsigned long start_snooze;
c66d5dd6 ME	434	unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
c66d5dd6	435
fbd7740f PM	436	/*
	437	* Indicate to the HV that we are idle. Now would be
	438	* a good time to find other work to dispatch.
	439	*/
	440	get_lppaca()->idle = 1;
050a0938	441
fbd7740f PM	442	/*
	443	* We come in with interrupts disabled, and need_resched()
	444	* has been checked recently. If we should poll for a little
	445	* while, do so.
	446	*/
	447	if (*smt_snooze_delay) {
	448	start_snooze = get_tb() +
	449	smt_snooze_delay tb_ticks_per_usec;
	450	local_irq_enable();
	451	set_thread_flag(TIF_POLLING_NRFLAG);
050a0938	452
fbd7740f PM	453	while (get_tb() < start_snooze) {
	454	if (need_resched() \|\| cpu_is_offline(cpu))
	455	goto out;
	456	ppc64_runlatch_off();
	457	HMT_low();
	458	HMT_very_low();
	459	}
	460
	461	HMT_medium();
	462	clear_thread_flag(TIF_POLLING_NRFLAG);
	463	smp_mb();
	464	local_irq_disable();
	465	if (need_resched() \|\| cpu_is_offline(cpu))
	466	goto out;
c66d5dd6	467	}
fbd7740f PM	468
	469	/*
	470	* Cede if the other thread is not idle, so that it can
	471	* go single-threaded. If the other thread is idle,
	472	* we ask the hypervisor if it has pending work it
	473	* wants to do and cede if it does. Otherwise we keep
	474	* polling in order to reduce interrupt latency.
	475	*
	476	* Doing the cede when the other thread is active will
	477	* result in this thread going dormant, meaning the other
	478	* thread gets to run in single-threaded (ST) mode, which
	479	* is slightly faster than SMT mode with this thread at
	480	* very low priority. The cede enables interrupts, which
	481	* doesn't matter here.
	482	*/
706c8c93	483	if (!lppaca[cpu ^ 1].idle \|\| poll_pending() == H_PENDING)
fbd7740f PM	484	cede_processor();
	485
	486	out:
	487	HMT_medium();
	488	get_lppaca()->idle = 0;
c66d5dd6 ME	489	}
c66d5dd6 ME	490
fbd7740f	491	static void pseries_shared_idle_sleep(void)
c66d5dd6	492	{
fbd7740f PM	493	/*
	494	* Indicate to the HV that we are idle. Now would be
	495	* a good time to find other work to dispatch.
	496	*/
	497	get_lppaca()->idle = 1;
050a0938	498
fbd7740f PM	499	/*
	500	* Yield the processor to the hypervisor. We return if
	501	* an external interrupt occurs (which are driven prior
	502	* to returning here) or if a prod occurs from another
	503	* processor. When returning here, external interrupts
	504	* are enabled.
	505	*/
	506	cede_processor();
050a0938	507
fbd7740f	508	get_lppaca()->idle = 0;
c66d5dd6 ME	509	}
c66d5dd6 ME	510
4267292b PM	511	static int pSeries_pci_probe_mode(struct pci_bus *bus)
4267292b PM	512	{
57cfb814	513	if (firmware_has_feature(FW_FEATURE_LPAR))
4267292b PM	514	return PCI_PROBE_DEVTREE;
	515	return PCI_PROBE_NORMAL;
	516	}
	517
c5e24354 ME	518	#ifdef CONFIG_KEXEC
	519	static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
	520	{
	521	/* Don't risk a hypervisor call if we're crashing */
4dc43256	522	if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
3356bb9f	523	unsigned long vpa = __pa(get_lppaca());
c5e24354 ME	524
	525	if (unregister_vpa(hard_smp_processor_id(), vpa)) {
	526	printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
	527	"failed\n", smp_processor_id(),
	528	hard_smp_processor_id());
	529	}
	530	}
	531
	532	if (ppc64_interrupt_controller == IC_OPEN_PIC)
	533	mpic_teardown_this_cpu(secondary);
	534	else
	535	xics_teardown_cpu(secondary);
	536	}
	537	#endif
	538
e8222502 BH	539	define_machine(pseries) {
e8222502 BH	540	.name = "pSeries",
1da177e4 LT	541	.probe = pSeries_probe,
	542	.setup_arch = pSeries_setup_arch,
	543	.init_early = pSeries_init_early,
0dd194d0	544	.show_cpuinfo = pSeries_show_cpuinfo,
1da177e4 LT	545	.log_error = pSeries_log_error,
1da177e4 LT	546	.pcibios_fixup = pSeries_final_fixup,
4267292b	547	.pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf	548	.irq_bus_setup = pSeries_irq_bus_setup,
f4fcbbe9 PM	549	.restart = rtas_restart,
	550	.power_off = rtas_power_off,
	551	.halt = rtas_halt,
1da177e4 LT	552	.panic = rtas_os_term,
1da177e4 LT	553	.cpu_die = pSeries_mach_cpu_die,
773bf9c4 AB	554	.get_boot_time = rtas_get_boot_time,
	555	.get_rtc_time = rtas_get_rtc_time,
	556	.set_rtc_time = rtas_set_rtc_time,
10f7e7c1	557	.calibrate_decr = generic_calibrate_decr,
6566c6f1	558	.progress = rtas_progress,
1da177e4 LT	559	.check_legacy_ioport = pSeries_check_legacy_ioport,
	560	.system_reset_exception = pSeries_system_reset_exception,
	561	.machine_check_exception = pSeries_machine_check_exception,
c5e24354 ME	562	#ifdef CONFIG_KEXEC
c5e24354 ME	563	.kexec_cpu_down = pseries_kexec_cpu_down,
3d1229d6 ME	564	.machine_kexec = default_machine_kexec,
3d1229d6 ME	565	.machine_kexec_prepare = default_machine_kexec_prepare,
cc532915	566	.machine_crash_shutdown = default_machine_crash_shutdown,
c5e24354	567	#endif
1da177e4	568	};