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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
828b35f6 JG |
2 | #ifndef _ASM_S390_PCI_DMA_H |
3 | #define _ASM_S390_PCI_DMA_H | |
4 | ||
5 | /* I/O Translation Anchor (IOTA) */ | |
6 | enum zpci_ioat_dtype { | |
7 | ZPCI_IOTA_STO = 0, | |
8 | ZPCI_IOTA_RTTO = 1, | |
9 | ZPCI_IOTA_RSTO = 2, | |
10 | ZPCI_IOTA_RFTO = 3, | |
11 | ZPCI_IOTA_PFAA = 4, | |
12 | ZPCI_IOTA_IOPFAA = 5, | |
13 | ZPCI_IOTA_IOPTO = 7 | |
14 | }; | |
15 | ||
16 | #define ZPCI_IOTA_IOT_ENABLED 0x800UL | |
17 | #define ZPCI_IOTA_DT_ST (ZPCI_IOTA_STO << 2) | |
18 | #define ZPCI_IOTA_DT_RT (ZPCI_IOTA_RTTO << 2) | |
19 | #define ZPCI_IOTA_DT_RS (ZPCI_IOTA_RSTO << 2) | |
20 | #define ZPCI_IOTA_DT_RF (ZPCI_IOTA_RFTO << 2) | |
21 | #define ZPCI_IOTA_DT_PF (ZPCI_IOTA_PFAA << 2) | |
22 | #define ZPCI_IOTA_FS_4K 0 | |
23 | #define ZPCI_IOTA_FS_1M 1 | |
24 | #define ZPCI_IOTA_FS_2G 2 | |
25 | #define ZPCI_KEY (PAGE_DEFAULT_KEY << 5) | |
26 | ||
69eea95c GS |
27 | #define ZPCI_TABLE_SIZE_RT (1UL << 42) |
28 | ||
828b35f6 JG |
29 | #define ZPCI_IOTA_STO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST) |
30 | #define ZPCI_IOTA_RTTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT) | |
31 | #define ZPCI_IOTA_RSTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS) | |
32 | #define ZPCI_IOTA_RFTO_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF) | |
33 | #define ZPCI_IOTA_RFAA_FLAG (ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G) | |
34 | ||
35 | /* I/O Region and segment tables */ | |
36 | #define ZPCI_INDEX_MASK 0x7ffUL | |
37 | ||
38 | #define ZPCI_TABLE_TYPE_MASK 0xc | |
39 | #define ZPCI_TABLE_TYPE_RFX 0xc | |
40 | #define ZPCI_TABLE_TYPE_RSX 0x8 | |
41 | #define ZPCI_TABLE_TYPE_RTX 0x4 | |
42 | #define ZPCI_TABLE_TYPE_SX 0x0 | |
43 | ||
44 | #define ZPCI_TABLE_LEN_RFX 0x3 | |
45 | #define ZPCI_TABLE_LEN_RSX 0x3 | |
46 | #define ZPCI_TABLE_LEN_RTX 0x3 | |
47 | ||
48 | #define ZPCI_TABLE_OFFSET_MASK 0xc0 | |
49 | #define ZPCI_TABLE_SIZE 0x4000 | |
50 | #define ZPCI_TABLE_ALIGN ZPCI_TABLE_SIZE | |
51 | #define ZPCI_TABLE_ENTRY_SIZE (sizeof(unsigned long)) | |
52 | #define ZPCI_TABLE_ENTRIES (ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE) | |
53 | ||
54 | #define ZPCI_TABLE_BITS 11 | |
55 | #define ZPCI_PT_BITS 8 | |
56 | #define ZPCI_ST_SHIFT (ZPCI_PT_BITS + PAGE_SHIFT) | |
57 | #define ZPCI_RT_SHIFT (ZPCI_ST_SHIFT + ZPCI_TABLE_BITS) | |
58 | ||
59 | #define ZPCI_RTE_FLAG_MASK 0x3fffUL | |
60 | #define ZPCI_RTE_ADDR_MASK (~ZPCI_RTE_FLAG_MASK) | |
61 | #define ZPCI_STE_FLAG_MASK 0x7ffUL | |
62 | #define ZPCI_STE_ADDR_MASK (~ZPCI_STE_FLAG_MASK) | |
63 | ||
64 | /* I/O Page tables */ | |
65 | #define ZPCI_PTE_VALID_MASK 0x400 | |
66 | #define ZPCI_PTE_INVALID 0x400 | |
67 | #define ZPCI_PTE_VALID 0x000 | |
68 | #define ZPCI_PT_SIZE 0x800 | |
69 | #define ZPCI_PT_ALIGN ZPCI_PT_SIZE | |
70 | #define ZPCI_PT_ENTRIES (ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE) | |
71 | #define ZPCI_PT_MASK (ZPCI_PT_ENTRIES - 1) | |
72 | ||
73 | #define ZPCI_PTE_FLAG_MASK 0xfffUL | |
74 | #define ZPCI_PTE_ADDR_MASK (~ZPCI_PTE_FLAG_MASK) | |
75 | ||
76 | /* Shared bits */ | |
77 | #define ZPCI_TABLE_VALID 0x00 | |
78 | #define ZPCI_TABLE_INVALID 0x20 | |
79 | #define ZPCI_TABLE_PROTECTED 0x200 | |
80 | #define ZPCI_TABLE_UNPROTECTED 0x000 | |
81 | ||
82 | #define ZPCI_TABLE_VALID_MASK 0x20 | |
83 | #define ZPCI_TABLE_PROT_MASK 0x200 | |
84 | ||
85 | static inline unsigned int calc_rtx(dma_addr_t ptr) | |
86 | { | |
87 | return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; | |
88 | } | |
89 | ||
90 | static inline unsigned int calc_sx(dma_addr_t ptr) | |
91 | { | |
92 | return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; | |
93 | } | |
94 | ||
95 | static inline unsigned int calc_px(dma_addr_t ptr) | |
96 | { | |
97 | return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; | |
98 | } | |
99 | ||
100 | static inline void set_pt_pfaa(unsigned long *entry, void *pfaa) | |
101 | { | |
102 | *entry &= ZPCI_PTE_FLAG_MASK; | |
103 | *entry |= ((unsigned long) pfaa & ZPCI_PTE_ADDR_MASK); | |
104 | } | |
105 | ||
106 | static inline void set_rt_sto(unsigned long *entry, void *sto) | |
107 | { | |
108 | *entry &= ZPCI_RTE_FLAG_MASK; | |
109 | *entry |= ((unsigned long) sto & ZPCI_RTE_ADDR_MASK); | |
110 | *entry |= ZPCI_TABLE_TYPE_RTX; | |
111 | } | |
112 | ||
113 | static inline void set_st_pto(unsigned long *entry, void *pto) | |
114 | { | |
115 | *entry &= ZPCI_STE_FLAG_MASK; | |
116 | *entry |= ((unsigned long) pto & ZPCI_STE_ADDR_MASK); | |
117 | *entry |= ZPCI_TABLE_TYPE_SX; | |
118 | } | |
119 | ||
120 | static inline void validate_rt_entry(unsigned long *entry) | |
121 | { | |
122 | *entry &= ~ZPCI_TABLE_VALID_MASK; | |
123 | *entry &= ~ZPCI_TABLE_OFFSET_MASK; | |
124 | *entry |= ZPCI_TABLE_VALID; | |
125 | *entry |= ZPCI_TABLE_LEN_RTX; | |
126 | } | |
127 | ||
128 | static inline void validate_st_entry(unsigned long *entry) | |
129 | { | |
130 | *entry &= ~ZPCI_TABLE_VALID_MASK; | |
131 | *entry |= ZPCI_TABLE_VALID; | |
132 | } | |
133 | ||
134 | static inline void invalidate_table_entry(unsigned long *entry) | |
135 | { | |
136 | *entry &= ~ZPCI_TABLE_VALID_MASK; | |
137 | *entry |= ZPCI_TABLE_INVALID; | |
138 | } | |
139 | ||
140 | static inline void invalidate_pt_entry(unsigned long *entry) | |
141 | { | |
142 | WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID); | |
143 | *entry &= ~ZPCI_PTE_VALID_MASK; | |
144 | *entry |= ZPCI_PTE_INVALID; | |
145 | } | |
146 | ||
147 | static inline void validate_pt_entry(unsigned long *entry) | |
148 | { | |
149 | WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID); | |
150 | *entry &= ~ZPCI_PTE_VALID_MASK; | |
151 | *entry |= ZPCI_PTE_VALID; | |
152 | } | |
153 | ||
154 | static inline void entry_set_protected(unsigned long *entry) | |
155 | { | |
156 | *entry &= ~ZPCI_TABLE_PROT_MASK; | |
157 | *entry |= ZPCI_TABLE_PROTECTED; | |
158 | } | |
159 | ||
160 | static inline void entry_clr_protected(unsigned long *entry) | |
161 | { | |
162 | *entry &= ~ZPCI_TABLE_PROT_MASK; | |
163 | *entry |= ZPCI_TABLE_UNPROTECTED; | |
164 | } | |
165 | ||
166 | static inline int reg_entry_isvalid(unsigned long entry) | |
167 | { | |
168 | return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID; | |
169 | } | |
170 | ||
171 | static inline int pt_entry_isvalid(unsigned long entry) | |
172 | { | |
173 | return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID; | |
174 | } | |
175 | ||
176 | static inline int entry_isprotected(unsigned long entry) | |
177 | { | |
178 | return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED; | |
179 | } | |
180 | ||
181 | static inline unsigned long *get_rt_sto(unsigned long entry) | |
182 | { | |
183 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) | |
184 | ? (unsigned long *) (entry & ZPCI_RTE_ADDR_MASK) | |
185 | : NULL; | |
186 | } | |
187 | ||
188 | static inline unsigned long *get_st_pto(unsigned long entry) | |
189 | { | |
190 | return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) | |
191 | ? (unsigned long *) (entry & ZPCI_STE_ADDR_MASK) | |
192 | : NULL; | |
193 | } | |
194 | ||
195 | /* Prototypes */ | |
196 | int zpci_dma_init_device(struct zpci_dev *); | |
197 | void zpci_dma_exit_device(struct zpci_dev *); | |
8128f23c GS |
198 | void dma_free_seg_table(unsigned long); |
199 | unsigned long *dma_alloc_cpu_table(void); | |
200 | void dma_cleanup_tables(unsigned long *); | |
66728eee SO |
201 | unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr); |
202 | void dma_update_cpu_trans(unsigned long *entry, void *page_addr, int flags); | |
203 | ||
828b35f6 | 204 | #endif |