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b2441318 1# SPDX-License-Identifier: GPL-2.0
1da177e4 2config SUPERH
ea0e1a9a 3 def_bool y
3010a5ea 4 select ARCH_HAS_PTE_SPECIAL
45624ac3 5 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
09d8dd93 6 select ARCH_MIGHT_HAVE_PC_PARPORT
07c75d7a 7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
560b8c0e 8 select HAVE_PATA_PLATFORM
6d803ba7 9 select CLKDEV_LOOKUP
ce816fa8 10 select HAVE_IDE if HAS_IOPORT_MAP
534cfbee 11 select HAVE_MEMBLOCK_NODE_MAP
adaf7fd2 12 select ARCH_DISCARD_MEMBLOCK
42d4b839 13 select HAVE_OPROFILE
9de90ac2 14 select HAVE_GENERIC_DMA_COHERENT
d7b01f78 15 select HAVE_ARCH_TRACEHOOK
cdd6c482 16 select HAVE_PERF_EVENTS
9b2a60c4 17 select HAVE_DEBUG_BUGVERBOSE
7563bbf8 18 select ARCH_HAVE_CUSTOM_GPIO_H
df013ffb 19 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
957e3fac 20 select ARCH_HAS_GCOV_PROFILE_ALL
72f0c137 21 select PERF_USE_VMALLOC
b69ec42b 22 select HAVE_DEBUG_KMEMLEAK
df8ce259 23 select HAVE_KERNEL_GZIP
fff7fb0b 24 select CPU_NO_EFFICIENT_FFS
07e88e1b
PM
25 select HAVE_KERNEL_BZIP2
26 select HAVE_KERNEL_LZMA
50cfa79d 27 select HAVE_KERNEL_XZ
c7b16efb 28 select HAVE_KERNEL_LZO
af1839eb 29 select HAVE_UID16
c1d7e01d 30 select ARCH_WANT_IPC_PARSE_VERSION
a74f7e04 31 select HAVE_SYSCALL_TRACEPOINTS
eaaaeef3 32 select HAVE_REGS_AND_STACK_ACCESS_API
2ed86b16 33 select MAY_HAVE_SPARSE_IRQ
ed170924 34 select IRQ_FORCED_THREADING
6eac1af0 35 select RTC_LIB
f01789c6 36 select GENERIC_ATOMIC64
3d44ae40 37 select GENERIC_IRQ_SHOW
ea0588cb 38 select GENERIC_SMP_IDLE_THREAD
dc775dd8 39 select GENERIC_IDLE_POLL_SETUP
8cf200d8
AMG
40 select GENERIC_CLOCKEVENTS
41 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
eb01d42a 42 select GENERIC_PCI_IOMAP if PCI
b46ed370 43 select GENERIC_SCHED_CLOCK
0e100e11 44 select GENERIC_STRNCPY_FROM_USER
cba8df4b 45 select GENERIC_STRNLEN_USER
786d35d4
DH
46 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
47 select MODULES_USE_ELF_RELA
eb01d42a 48 select NO_GENERIC_PCI_IOPORT_MAP if PCI
881e252d 49 select OLD_SIGSUSPEND
0679a858 50 select OLD_SIGACTION
eb01d42a 51 select PCI_DOMAINS if PCI
7a017721 52 select HAVE_ARCH_AUDITSYSCALL
72cc564f 53 select HAVE_FUTEX_CMPXCHG if FUTEX
42a0bb3f 54 select HAVE_NMI
86596f0a
CH
55 select NEED_SG_DMA_LENGTH
56
1da177e4
LT
57 help
58 The SuperH is a RISC processor targeted for use in embedded systems
59 and consumer electronics; it was also used in the Sega Dreamcast
60 gaming console. The SuperH port has a home page at
61 <http://www.linux-sh.org/>.
62
39d28a2d 63config SUPERH32
104daea1 64 def_bool "$(ARCH)" = "sh"
d39f5450
CS
65 select HAVE_KPROBES
66 select HAVE_KRETPROBES
6d63e73d 67 select HAVE_IOREMAP_PROT if MMU && !X2TLB
694f94f2 68 select HAVE_FUNCTION_TRACER
fad57feb
MF
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_DYNAMIC_FTRACE
e4b053d9 71 select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE
c1d7e01d 72 select ARCH_WANT_IPC_PARSE_VERSION
327933f5 73 select HAVE_FUNCTION_GRAPH_TRACER
ab6e570b 74 select HAVE_ARCH_KGDB
6fbfe8d7 75 select HAVE_HW_BREAKPOINT
0102752e 76 select HAVE_MIXED_BREAKPOINTS_REGS
e583d6b3 77 select PERF_EVENTS
8dafc346 78 select ARCH_HIBERNATION_POSSIBLE if MMU
57b81330 79 select SPARSE_IRQ
d148eac0 80 select HAVE_STACKPROTECTOR
ea0e1a9a
PM
81
82config SUPERH64
104daea1 83 def_bool "$(ARCH)" = "sh64"
5f56a5df 84 select HAVE_EXIT_THREAD
3a898c0f 85 select KALLSYMS
39d28a2d 86
f42b7e3d
PM
87config ARCH_DEFCONFIG
88 string
89 default "arch/sh/configs/shx3_defconfig" if SUPERH32
90 default "arch/sh/configs/cayman_defconfig" if SUPERH64
91
1da177e4 92config RWSEM_GENERIC_SPINLOCK
d7ef4fb3 93 def_bool y
1da177e4
LT
94
95config RWSEM_XCHGADD_ALGORITHM
96 bool
97
fa691511
PM
98config GENERIC_BUG
99 def_bool y
a82d53ec 100 depends on BUG && SUPERH32
fa691511 101
3767f3f1
PM
102config GENERIC_CSUM
103 def_bool y
104 depends on SUPERH64
105
e2268c71 106config GENERIC_HWEIGHT
d7ef4fb3 107 def_bool y
e2268c71 108
1da177e4 109config GENERIC_CALIBRATE_DELAY
cf204fa7 110 bool
1da177e4 111
bdcab87b
PM
112config GENERIC_LOCKBREAK
113 def_bool y
114 depends on SMP && PREEMPT
115
af998a9a
MD
116config ARCH_SUSPEND_POSSIBLE
117 def_bool n
118
119config ARCH_HIBERNATION_POSSIBLE
120 def_bool n
357d5946 121
0a9b0db1
PM
122config SYS_SUPPORTS_APM_EMULATION
123 bool
af998a9a 124 select ARCH_SUSPEND_POSSIBLE
357d5946 125
ffb4a73d
PM
126config SYS_SUPPORTS_HUGETLBFS
127 bool
128
357d5946
PM
129config SYS_SUPPORTS_SMP
130 bool
131
132config SYS_SUPPORTS_NUMA
133 bool
134
afbfb52e 135config STACKTRACE_SUPPORT
d7ef4fb3 136 def_bool y
afbfb52e
PM
137
138config LOCKDEP_SUPPORT
d7ef4fb3 139 def_bool y
afbfb52e 140
f0d1b0b3 141config ARCH_HAS_ILOG2_U32
d7ef4fb3 142 def_bool n
f0d1b0b3
DH
143
144config ARCH_HAS_ILOG2_U64
d7ef4fb3 145 def_bool n
f0d1b0b3 146
ce816fa8 147config NO_IOPORT_MAP
37b7a978 148 def_bool !PCI
c30b9c43
PM
149 depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \
150 !SH_HP6XX && !SH_SOLUTION_ENGINE
86e4dd5a 151
e7cc9a73
MD
152config IO_TRAPPED
153 bool
154
b7e68d68
PM
155config SWAP_IO_SPACE
156 bool
157
01be5d63
PM
158config DMA_COHERENT
159 bool
160
161config DMA_NONCOHERENT
162 def_bool !DMA_COHERENT
6fa1d28e 163 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
01be5d63 164
69543d63
KS
165config PGTABLE_LEVELS
166 default 3 if X2TLB
167 default 2
168
1da177e4
LT
169menu "System type"
170
b5f42db0
PM
171#
172# Processor families
173#
174config CPU_SH2
175 bool
049d2804 176 select SH_INTC
b5f42db0
PM
177
178config CPU_SH2A
179 bool
180 select CPU_SH2
e2fcf74f 181 select UNCACHED_MAPPING
b5f42db0 182
5a846aba
RF
183config CPU_J2
184 bool
185 select CPU_SH2
186 select OF
187 select OF_EARLY_FLATTREE
188
b5f42db0
PM
189config CPU_SH3
190 bool
191 select CPU_HAS_INTEVT
192 select CPU_HAS_SR_RB
049d2804 193 select SH_INTC
fbfa8934 194 select SYS_SUPPORTS_SH_TMU
b5f42db0
PM
195
196config CPU_SH4
197 bool
198 select CPU_HAS_INTEVT
199 select CPU_HAS_SR_RB
b5f42db0 200 select CPU_HAS_FPU if !CPU_SH4AL_DSP
049d2804 201 select SH_INTC
fbfa8934 202 select SYS_SUPPORTS_SH_TMU
ffb4a73d 203 select SYS_SUPPORTS_HUGETLBFS if MMU
b5f42db0
PM
204
205config CPU_SH4A
206 bool
207 select CPU_SH4
208
209config CPU_SH4AL_DSP
210 bool
211 select CPU_SH4A
212 select CPU_HAS_DSP
213
ea0e1a9a
PM
214config CPU_SH5
215 bool
216 select CPU_HAS_FPU
fbfa8934 217 select SYS_SUPPORTS_SH_TMU
ffb4a73d 218 select SYS_SUPPORTS_HUGETLBFS if MMU
ea0e1a9a 219
b5f42db0
PM
220config CPU_SHX2
221 bool
222
223config CPU_SHX3
224 bool
01be5d63 225 select DMA_COHERENT
4b478ee2
PM
226 select SYS_SUPPORTS_SMP
227 select SYS_SUPPORTS_NUMA
b5f42db0 228
dc65a977
PM
229config ARCH_SHMOBILE
230 bool
77594912 231 select ARCH_SUSPEND_POSSIBLE
464ed18e 232 select PM
dc65a977 233
86c8c047
MF
234config CPU_HAS_PMU
235 depends on CPU_SH4 || CPU_SH4A
236 default y
237 bool
238
3cc000b5
PM
239if SUPERH32
240
b5f42db0
PM
241choice
242 prompt "Processor sub-type selection"
243
244#
245# Processor subtypes
246#
247
248# SH-2 Processor Support
249
250config CPU_SUBTYPE_SH7619
251 bool "Support SH7619 processor"
252 select CPU_SH2
fbfa8934 253 select SYS_SUPPORTS_SH_CMT
b5f42db0 254
5a846aba
RF
255config CPU_SUBTYPE_J2
256 bool "Support J2 processor"
257 select CPU_J2
b4214e41
RF
258 select SYS_SUPPORTS_SMP
259 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
5a846aba 260
b5f42db0
PM
261# SH-2A Processor Support
262
2825999e
PG
263config CPU_SUBTYPE_SH7201
264 bool "Support SH7201 processor"
265 select CPU_SH2A
266 select CPU_HAS_FPU
fbfa8934 267 select SYS_SUPPORTS_SH_MTU2
2825999e 268
6d01f510
PM
269config CPU_SUBTYPE_SH7203
270 bool "Support SH7203 processor"
271 select CPU_SH2A
74d99a5e 272 select CPU_HAS_FPU
fbfa8934
MD
273 select SYS_SUPPORTS_SH_CMT
274 select SYS_SUPPORTS_SH_MTU2
b768ecbc 275 select PINCTRL
6d01f510 276
b5f42db0
PM
277config CPU_SUBTYPE_SH7206
278 bool "Support SH7206 processor"
279 select CPU_SH2A
fbfa8934
MD
280 select SYS_SUPPORTS_SH_CMT
281 select SYS_SUPPORTS_SH_MTU2
b5f42db0 282
a8f67f4b
PM
283config CPU_SUBTYPE_SH7263
284 bool "Support SH7263 processor"
285 select CPU_SH2A
74d99a5e 286 select CPU_HAS_FPU
fbfa8934
MD
287 select SYS_SUPPORTS_SH_CMT
288 select SYS_SUPPORTS_SH_MTU2
a8f67f4b 289
51ce3068
PE
290config CPU_SUBTYPE_SH7264
291 bool "Support SH7264 processor"
292 select CPU_SH2A
293 select CPU_HAS_FPU
fbfa8934
MD
294 select SYS_SUPPORTS_SH_CMT
295 select SYS_SUPPORTS_SH_MTU2
5946e7bb 296 select PINCTRL
51ce3068 297
0b25b7c8
PE
298config CPU_SUBTYPE_SH7269
299 bool "Support SH7269 processor"
300 select CPU_SH2A
301 select CPU_HAS_FPU
fbfa8934
MD
302 select SYS_SUPPORTS_SH_CMT
303 select SYS_SUPPORTS_SH_MTU2
fb872fcc 304 select PINCTRL
0b25b7c8 305
2ad69908
PM
306config CPU_SUBTYPE_MXG
307 bool "Support MX-G processor"
308 select CPU_SH2A
fbfa8934 309 select SYS_SUPPORTS_SH_MTU2
2ad69908
PM
310 help
311 Select MX-G if running on an R8A03022BG part.
312
b5f42db0
PM
313# SH-3 Processor Support
314
315config CPU_SUBTYPE_SH7705
316 bool "Support SH7705 processor"
317 select CPU_SH3
318
319config CPU_SUBTYPE_SH7706
320 bool "Support SH7706 processor"
321 select CPU_SH3
322 help
323 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
324
325config CPU_SUBTYPE_SH7707
326 bool "Support SH7707 processor"
327 select CPU_SH3
328 help
329 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
330
331config CPU_SUBTYPE_SH7708
332 bool "Support SH7708 processor"
333 select CPU_SH3
334 help
335 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
336 if you have a 100 Mhz SH-3 HD6417708R CPU.
337
338config CPU_SUBTYPE_SH7709
339 bool "Support SH7709 processor"
340 select CPU_SH3
341 help
342 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
343
344config CPU_SUBTYPE_SH7710
345 bool "Support SH7710 processor"
346 select CPU_SH3
347 select CPU_HAS_DSP
348 help
349 Select SH7710 if you have a SH3-DSP SH7710 CPU.
350
351config CPU_SUBTYPE_SH7712
352 bool "Support SH7712 processor"
353 select CPU_SH3
354 select CPU_HAS_DSP
355 help
356 Select SH7712 if you have a SH3-DSP SH7712 CPU.
357
358config CPU_SUBTYPE_SH7720
359 bool "Support SH7720 processor"
360 select CPU_SH3
361 select CPU_HAS_DSP
fbfa8934 362 select SYS_SUPPORTS_SH_CMT
7b61ca5d 363 select USB_OHCI_SH if USB_OHCI_HCD
85db6bff 364 select PINCTRL
b5f42db0
PM
365 help
366 Select SH7720 if you have a SH3-DSP SH7720 CPU.
367
31a49c4b
YS
368config CPU_SUBTYPE_SH7721
369 bool "Support SH7721 processor"
370 select CPU_SH3
371 select CPU_HAS_DSP
fbfa8934 372 select SYS_SUPPORTS_SH_CMT
7b61ca5d 373 select USB_OHCI_SH if USB_OHCI_HCD
31a49c4b
YS
374 help
375 Select SH7721 if you have a SH3-DSP SH7721 CPU.
376
b5f42db0
PM
377# SH-4 Processor Support
378
379config CPU_SUBTYPE_SH7750
380 bool "Support SH7750 processor"
381 select CPU_SH4
382 help
383 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
384
385config CPU_SUBTYPE_SH7091
386 bool "Support SH7091 processor"
387 select CPU_SH4
388 help
389 Select SH7091 if you have an SH-4 based Sega device (such as
390 the Dreamcast, Naomi, and Naomi 2).
391
392config CPU_SUBTYPE_SH7750R
393 bool "Support SH7750R processor"
394 select CPU_SH4
395
396config CPU_SUBTYPE_SH7750S
397 bool "Support SH7750S processor"
398 select CPU_SH4
399
400config CPU_SUBTYPE_SH7751
401 bool "Support SH7751 processor"
402 select CPU_SH4
403 help
404 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
405 or if you have a HD6417751R CPU.
406
407config CPU_SUBTYPE_SH7751R
408 bool "Support SH7751R processor"
409 select CPU_SH4
410
411config CPU_SUBTYPE_SH7760
412 bool "Support SH7760 processor"
413 select CPU_SH4
414
415config CPU_SUBTYPE_SH4_202
416 bool "Support SH4-202 processor"
417 select CPU_SH4
418
419# SH-4A Processor Support
420
178dd0cd
PM
421config CPU_SUBTYPE_SH7723
422 bool "Support SH7723 processor"
423 select CPU_SH4A
424 select CPU_SHX2
dc65a977 425 select ARCH_SHMOBILE
178dd0cd 426 select ARCH_SPARSEMEM_ENABLE
fbfa8934 427 select SYS_SUPPORTS_SH_CMT
16941a89 428 select PINCTRL
178dd0cd
PM
429 help
430 Select SH7723 if you have an SH-MobileR2 CPU.
431
0207a2ef
KM
432config CPU_SUBTYPE_SH7724
433 bool "Support SH7724 processor"
434 select CPU_SH4A
435 select CPU_SHX2
59fe700d 436 select ARCH_SHMOBILE
0207a2ef 437 select ARCH_SPARSEMEM_ENABLE
fbfa8934 438 select SYS_SUPPORTS_SH_CMT
18ebd228 439 select PINCTRL
0207a2ef
KM
440 help
441 Select SH7724 if you have an SH-MobileR2R CPU.
442
fea88a0c
NI
443config CPU_SUBTYPE_SH7734
444 bool "Support SH7734 processor"
445 select CPU_SH4A
446 select CPU_SHX2
2c172182 447 select PINCTRL
fea88a0c
NI
448 help
449 Select SH7734 if you have a SH4A SH7734 CPU.
450
c01f0f1a
YS
451config CPU_SUBTYPE_SH7757
452 bool "Support SH7757 processor"
453 select CPU_SH4A
454 select CPU_SHX2
eb61b772 455 select PINCTRL
c01f0f1a
YS
456 help
457 Select SH7757 if you have a SH4A SH7757 CPU.
458
7d740a06
YS
459config CPU_SUBTYPE_SH7763
460 bool "Support SH7763 processor"
461 select CPU_SH4A
7b61ca5d 462 select USB_OHCI_SH if USB_OHCI_HCD
7d740a06
YS
463 help
464 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
465
b5f42db0
PM
466config CPU_SUBTYPE_SH7770
467 bool "Support SH7770 processor"
468 select CPU_SH4A
469
470config CPU_SUBTYPE_SH7780
471 bool "Support SH7780 processor"
472 select CPU_SH4A
473
474config CPU_SUBTYPE_SH7785
475 bool "Support SH7785 processor"
476 select CPU_SH4A
477 select CPU_SHX2
55ba99eb
KM
478 select ARCH_SPARSEMEM_ENABLE
479 select SYS_SUPPORTS_NUMA
77bd27b2 480 select PINCTRL
55ba99eb
KM
481
482config CPU_SUBTYPE_SH7786
483 bool "Support SH7786 processor"
484 select CPU_SH4A
37042fbd 485 select CPU_SHX3
8263a67e 486 select CPU_HAS_PTEAEX
2eb2a436 487 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
7b61ca5d 488 select USB_OHCI_SH if USB_OHCI_HCD
7b61ca5d 489 select USB_EHCI_SH if USB_EHCI_HCD
c0fdbff9 490 select PINCTRL
b5f42db0
PM
491
492config CPU_SUBTYPE_SHX3
493 bool "Support SH-X3 processor"
494 select CPU_SH4A
495 select CPU_SHX3
5840263e 496 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
fdcfdfa1 497 select GPIOLIB
3e347f08 498 select PINCTRL
b5f42db0
PM
499
500# SH4AL-DSP Processor Support
501
502config CPU_SUBTYPE_SH7343
503 bool "Support SH7343 processor"
504 select CPU_SH4AL_DSP
dc65a977 505 select ARCH_SHMOBILE
fbfa8934 506 select SYS_SUPPORTS_SH_CMT
b5f42db0
PM
507
508config CPU_SUBTYPE_SH7722
509 bool "Support SH7722 processor"
510 select CPU_SH4AL_DSP
511 select CPU_SHX2
dc65a977 512 select ARCH_SHMOBILE
b5f42db0
PM
513 select ARCH_SPARSEMEM_ENABLE
514 select SYS_SUPPORTS_NUMA
fbfa8934 515 select SYS_SUPPORTS_SH_CMT
ef97c3c1 516 select PINCTRL
9109a30e
MD
517
518config CPU_SUBTYPE_SH7366
519 bool "Support SH7366 processor"
520 select CPU_SH4AL_DSP
521 select CPU_SHX2
dc65a977 522 select ARCH_SHMOBILE
9109a30e
MD
523 select ARCH_SPARSEMEM_ENABLE
524 select SYS_SUPPORTS_NUMA
fbfa8934 525 select SYS_SUPPORTS_SH_CMT
b5f42db0 526
3cc000b5
PM
527endchoice
528
529endif
530
531if SUPERH64
532
533choice
534 prompt "Processor sub-type selection"
535
ea0e1a9a
PM
536# SH-5 Processor Support
537
538config CPU_SUBTYPE_SH5_101
539 bool "Support SH5-101 processor"
540 select CPU_SH5
541
542config CPU_SUBTYPE_SH5_103
543 bool "Support SH5-103 processor"
8ef97dd7 544 select CPU_SH5
ea0e1a9a 545
b5f42db0
PM
546endchoice
547
3cc000b5
PM
548endif
549
f3d22298 550source "arch/sh/mm/Kconfig"
939a24a6 551
4690bdc7 552source "arch/sh/Kconfig.cpu"
f3d22298 553
939a24a6 554source "arch/sh/boards/Kconfig"
32351a28 555
32351a28
PM
556menu "Timer and clock configuration"
557
cad82448
PM
558config SH_PCLK_FREQ
559 int "Peripheral clock frequency (in Hz)"
8152a74b 560 depends on SH_CLK_CPG_LEGACY
9d4436a6 561 default "31250000" if CPU_SUBTYPE_SH7619
8152a74b
PM
562 default "33333333" if CPU_SUBTYPE_SH7770 || \
563 CPU_SUBTYPE_SH7760 || \
564 CPU_SUBTYPE_SH7705 || \
565 CPU_SUBTYPE_SH7203 || \
566 CPU_SUBTYPE_SH7206 || \
567 CPU_SUBTYPE_SH7263 || \
43a1839c 568 CPU_SUBTYPE_MXG
05627486 569 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 570 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 571 default "50000000"
1da177e4 572 help
cad82448
PM
573 This option is used to specify the peripheral clock frequency.
574 This is necessary for determining the reference clock value on
575 platforms lacking an RTC.
1da177e4 576
36aa1e32
PM
577config SH_CLK_CPG
578 def_bool y
579
253b0887 580config SH_CLK_CPG_LEGACY
36aa1e32 581 depends on SH_CLK_CPG
43a1839c 582 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
51ce3068 583 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
bcb86e0a
PM
584 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
585 !CPU_SUBTYPE_SH7269
253b0887 586
32351a28
PM
587endmenu
588
cad82448 589menu "CPU Frequency scaling"
cad82448 590source "drivers/cpufreq/Kconfig"
cad82448
PM
591endmenu
592
9f5e8eee
PM
593source "arch/sh/drivers/Kconfig"
594
cad82448 595endmenu
1da177e4 596
cad82448
PM
597menu "Kernel features"
598
8636a1f9 599source "kernel/Kconfig.hz"
91b91d01 600
cad82448
PM
601config KEXEC
602 bool "kexec system call (EXPERIMENTAL)"
0d57af1e 603 depends on SUPERH32 && MMU
2965faa5 604 select KEXEC_CORE
1da177e4 605 help
cad82448
PM
606 kexec is a system call that implements the ability to shutdown your
607 current kernel, and to start another kernel. It is like a reboot
1f1332f7 608 but it is independent of the system firmware. And like a reboot
cad82448
PM
609 you can start any kernel with it, not just Linux.
610
1f1332f7 611 The name comes from the similarity to the exec system call.
cad82448
PM
612
613 It is an ongoing process to be certain the hardware in a machine
614 is properly shutdown, so do not be surprised if this code does not
bf220695
GU
615 initially work for you. As of this writing the exact hardware
616 interface is strongly in flux, so no good recommendation can be
617 made.
cad82448 618
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619config CRASH_DUMP
620 bool "kernel crash dumps (EXPERIMENTAL)"
0d57af1e 621 depends on SUPERH32 && BROKEN_ON_SMP
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622 help
623 Generate crash dump after being started by kexec.
624 This should be normally only set in special crash dump kernels
625 which are loaded in the main kernel with kexec-tools into
626 a specially reserved region and then later executed after
627 a crash by kdump/kexec. The crash dump kernel must be compiled
628 to a memory address not used by the main kernel using
e66ac3f2 629 PHYSICAL_START.
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630
631 For more details see Documentation/kdump/kdump.txt
632
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633config KEXEC_JUMP
634 bool "kexec jump (EXPERIMENTAL)"
0d57af1e 635 depends on SUPERH32 && KEXEC && HIBERNATION
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636 help
637 Jump between original kernel and kexeced kernel and invoke
638 code via KEXEC
639
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640config PHYSICAL_START
641 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
642 default MEMORY_START
643 ---help---
644 This gives the physical address where the kernel is loaded
645 and is ordinarily the same as MEMORY_START.
646
647 Different values are primarily used in the case of kexec on panic
648 where the fail safe kernel needs to run at a different address
649 than the panic-ed kernel.
650
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651config SECCOMP
652 bool "Enable seccomp to safely compute untrusted bytecode"
653 depends on PROC_FS
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654 help
655 This kernel feature is useful for number crunching applications
656 that may need to compute untrusted bytecode during their
657 execution. By using pipes or other transports made available to
658 the process as file descriptors supporting the read/write
659 syscalls, it's possible to isolate those applications in
660 their own address space using seccomp. Once seccomp is
661 enabled via prctl, it cannot be disabled and the task is only
662 allowed to execute a few safe syscalls defined by each seccomp
663 mode.
664
665 If unsure, say N.
666
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667config SMP
668 bool "Symmetric multi-processing support"
357d5946 669 depends on SYS_SUPPORTS_SMP
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670 ---help---
671 This enables support for systems with more than one CPU. If you have
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672 a system with only one CPU, say N. If you have a system with more
673 than one CPU, say Y.
1da177e4 674
4a474157 675 If you say N here, the kernel will run on uni- and multiprocessor
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676 machines, but will use only one CPU of a multiprocessor machine. If
677 you say Y here, the kernel will run on many, but not all,
4a474157 678 uniprocessor machines. On a uniprocessor machine, the kernel
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679 will run faster if you say N here.
680
681 People using multiprocessor machines who say Y here should also say
682 Y to "Enhanced Real Time Clock Support", below.
683
ecf38679 684 See also <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO
03502faa 685 available at <http://www.tldp.org/docs.html#howto>.
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686
687 If you don't know what to do here, say N.
688
689config NR_CPUS
690 int "Maximum number of CPUs (2-32)"
691 range 2 32
692 depends on SMP
2eb2a436 693 default "4" if CPU_SUBTYPE_SHX3
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694 default "2"
695 help
696 This allows you to specify the maximum number of CPUs which this
697 kernel will support. The maximum supported value is 32 and the
698 minimum value which makes sense is 2.
699
700 This is purely to save memory - each supported CPU adds
701 approximately eight kilobytes to the kernel image.
702
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703config HOTPLUG_CPU
704 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
40b31360 705 depends on SMP
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706 help
707 Say Y here to experiment with turning CPUs off and on. CPUs
708 can be controlled through /sys/devices/system/cpu.
709
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710config GUSA
711 def_bool y
1efe4ce3 712 depends on !SMP && SUPERH32
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713 help
714 This enables support for gUSA (general UserSpace Atomicity).
715 This is the default implementation for both UP and non-ll/sc
716 CPUs, and is used by the libc, amongst others.
717
718 For additional information, design information can be found
719 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
720
721 This should only be disabled for special cases where alternate
722 atomicity implementations exist.
723
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724config GUSA_RB
725 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
726 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
727 help
728 Enabling this option will allow the kernel to implement some
692105b8 729 atomic operations using a software implementation of load-locked/
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730 store-conditional (LLSC). On machines which do not have hardware
731 LLSC, this should be more efficient than the other alternative of
692105b8 732 disabling interrupts around the atomic sequence.
1efe4ce3 733
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734config HW_PERF_EVENTS
735 bool "Enable hardware performance counter support for perf events"
736 depends on PERF_EVENTS && CPU_HAS_PMU
737 default y
738 help
739 Enable hardware performance counter support for perf events. If
740 disabled, perf events will use software events only.
741
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742source "drivers/sh/Kconfig"
743
cad82448 744endmenu
1da177e4 745
cad82448 746menu "Boot options"
1da177e4 747
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748config USE_BUILTIN_DTB
749 bool "Use builtin DTB"
750 default n
751 depends on SH_DEVICE_TREE
752 help
753 Link a device tree blob for particular hardware into the kernel,
754 suppressing use of the DTB pointer provided by the bootloader.
755 This option should only be used with legacy bootloaders that are
756 not capable of providing a DTB to the kernel, or for experimental
757 hardware without stable device tree bindings.
758
759config BUILTIN_DTB_SOURCE
760 string "Source file for builtin DTB"
761 default ""
762 depends on USE_BUILTIN_DTB
763 help
764 Base name (without suffix, relative to arch/sh/boot/dts) for the
765 a DTS file that will be used to produce the DTB linked into the
766 kernel.
767
cad82448 768config ZERO_PAGE_OFFSET
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769 hex
770 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
771 SH_7751_SOLUTION_ENGINE
772 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
7a847f81 773 default "0x00002000" if PAGE_SIZE_8KB
cad82448 774 default "0x00001000"
1da177e4 775 help
cad82448 776 This sets the default offset of zero page.
1da177e4 777
cad82448 778config BOOT_LINK_OFFSET
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779 hex
780 default "0x00210000" if SH_SHMIN
a2e76c80 781 default "0x00400000" if SH_CAYMAN
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782 default "0x00810000" if SH_7780_SOLUTION_ENGINE
783 default "0x009e0000" if SH_TITAN
784 default "0x01800000" if SH_SDK7780
785 default "0x02000000" if SH_EDOSK7760
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786 default "0x00800000"
787 help
788 This option allows you to set the link address offset of the zImage.
789 This can be useful if you are on a board which has a small amount of
790 memory.
1da177e4 791
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792config ENTRY_OFFSET
793 hex
794 default "0x00001000" if PAGE_SIZE_4KB
795 default "0x00002000" if PAGE_SIZE_8KB
796 default "0x00004000" if PAGE_SIZE_16KB
797 default "0x00010000" if PAGE_SIZE_64KB
798 default "0x00000000"
799
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800config ROMIMAGE_MMCIF
801 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
0d57af1e 802 depends on CPU_SUBTYPE_SH7724
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803 help
804 Say Y here to include experimental MMCIF loading code in
805 romImage. With this enabled it is possible to write the romImage
806 kernel image to an MMC card and boot the kernel straight from
807 the reset vector. At reset the processor Mask ROM will load the
808 first part of the romImage which in turn loads the rest the kernel
809 image to RAM using the MMCIF hardware block.
810
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811choice
812 prompt "Kernel command line"
813 optional
814 default CMDLINE_OVERWRITE
815 help
816 Setting this option allows the kernel command line arguments
817 to be set.
818
819config CMDLINE_OVERWRITE
820 bool "Overwrite bootloader kernel arguments"
821 help
822 Given string will overwrite any arguments passed in by
823 a bootloader.
824
825config CMDLINE_EXTEND
826 bool "Extend bootloader kernel arguments"
827 help
828 Given string will be concatenated with arguments passed in
829 by a bootloader.
830
831endchoice
1da177e4 832
cad82448 833config CMDLINE
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834 string "Kernel command line arguments string"
835 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
cad82448 836 default "console=ttySC1,115200"
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837
838endmenu
839
cad82448 840menu "Bus options"
1da177e4 841
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842config SUPERHYWAY
843 tristate "SuperHyway Bus support"
844 depends on CPU_SUBTYPE_SH4_202
1da177e4 845
17be2d2b 846config MAPLE
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847 bool "Maple Bus support"
848 depends on SH_DREAMCAST
849 help
850 The Maple Bus is SEGA's serial communication bus for peripherals
851 on the Dreamcast. Without this bus support you won't be able to
852 get your Dreamcast keyboard etc to work, so most users
853 probably want to say 'Y' here, unless you are only using the
854 Dreamcast with a serial line terminal or a remote network
855 connection.
17be2d2b 856
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857endmenu
858
3aa770e7 859menu "Power management options (EXPERIMENTAL)"
f4cb5700 860
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861source "kernel/power/Kconfig"
862
863source "drivers/cpuidle/Kconfig"
3aa770e7 864
3aa770e7 865endmenu