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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
f5e706ad SR |
2 | /* smp.h: Sparc specific SMP stuff. |
3 | * | |
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | |
5 | */ | |
6 | ||
7 | #ifndef _SPARC_SMP_H | |
8 | #define _SPARC_SMP_H | |
9 | ||
10 | #include <linux/threads.h> | |
11 | #include <asm/head.h> | |
f5e706ad SR |
12 | |
13 | #ifndef __ASSEMBLY__ | |
14 | ||
15 | #include <linux/cpumask.h> | |
16 | ||
17 | #endif /* __ASSEMBLY__ */ | |
18 | ||
19 | #ifdef CONFIG_SMP | |
20 | ||
21 | #ifndef __ASSEMBLY__ | |
22 | ||
23 | #include <asm/ptrace.h> | |
24 | #include <asm/asi.h> | |
60063497 | 25 | #include <linux/atomic.h> |
f5e706ad SR |
26 | |
27 | /* | |
28 | * Private routines/data | |
29 | */ | |
30 | ||
31 | extern unsigned char boot_cpu_id; | |
b7afdb7e SR |
32 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; |
33 | extern cpumask_t smp_commenced_mask; | |
34 | extern struct linux_prom_registers smp_penguin_ctable; | |
f5e706ad SR |
35 | |
36 | typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, | |
37 | unsigned long, unsigned long); | |
38 | ||
b7afdb7e | 39 | void cpu_panic(void); |
b7afdb7e | 40 | |
f5e706ad SR |
41 | /* |
42 | * General functions that each host system must provide. | |
43 | */ | |
44 | ||
45 | void sun4m_init_smp(void); | |
46 | void sun4d_init_smp(void); | |
47 | ||
48 | void smp_callin(void); | |
f5e706ad SR |
49 | void smp_store_cpu_info(int); |
50 | ||
d6d04819 DH |
51 | void smp_resched_interrupt(void); |
52 | void smp_call_function_single_interrupt(void); | |
53 | void smp_call_function_interrupt(void); | |
54 | ||
f5e706ad SR |
55 | struct seq_file; |
56 | void smp_bogo(struct seq_file *); | |
57 | void smp_info(struct seq_file *); | |
58 | ||
4ba22b16 SR |
59 | struct sparc32_ipi_ops { |
60 | void (*cross_call)(smpfunc_t func, cpumask_t mask, unsigned long arg1, | |
61 | unsigned long arg2, unsigned long arg3, | |
62 | unsigned long arg4); | |
63 | void (*resched)(int cpu); | |
64 | void (*single)(int cpu); | |
65 | void (*mask_one)(int cpu); | |
66 | }; | |
67 | extern const struct sparc32_ipi_ops *sparc32_ipi_ops; | |
68 | ||
69 | static inline void xc0(smpfunc_t func) | |
70 | { | |
71 | sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 0, 0, 0, 0); | |
72 | } | |
f5e706ad | 73 | |
f5e706ad | 74 | static inline void xc1(smpfunc_t func, unsigned long arg1) |
4ba22b16 SR |
75 | { |
76 | sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); | |
77 | } | |
f5e706ad | 78 | static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) |
4ba22b16 SR |
79 | { |
80 | sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); | |
81 | } | |
82 | ||
f5e706ad | 83 | static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, |
4ba22b16 SR |
84 | unsigned long arg3) |
85 | { | |
86 | sparc32_ipi_ops->cross_call(func, *cpu_online_mask, | |
87 | arg1, arg2, arg3, 0); | |
88 | } | |
89 | ||
f5e706ad | 90 | static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, |
4ba22b16 SR |
91 | unsigned long arg3, unsigned long arg4) |
92 | { | |
93 | sparc32_ipi_ops->cross_call(func, *cpu_online_mask, | |
94 | arg1, arg2, arg3, arg4); | |
95 | } | |
f5e706ad | 96 | |
f05a6865 SR |
97 | void arch_send_call_function_single_ipi(int cpu); |
98 | void arch_send_call_function_ipi_mask(const struct cpumask *mask); | |
66e4f8c0 | 99 | |
f5e706ad SR |
100 | static inline int cpu_logical_map(int cpu) |
101 | { | |
102 | return cpu; | |
103 | } | |
104 | ||
f05a6865 | 105 | int hard_smp_processor_id(void); |
f5e706ad SR |
106 | |
107 | #define raw_smp_processor_id() (current_thread_info()->cpu) | |
108 | ||
f5e706ad SR |
109 | void smp_setup_cpu_possible_map(void); |
110 | ||
111 | #endif /* !(__ASSEMBLY__) */ | |
112 | ||
113 | /* Sparc specific messages. */ | |
114 | #define MSG_CROSS_CALL 0x0005 /* run func on cpus */ | |
115 | ||
116 | /* Empirical PROM processor mailbox constants. If the per-cpu mailbox | |
117 | * contains something other than one of these then the ipi is from | |
118 | * Linux's active_kernel_processor. This facility exists so that | |
119 | * the boot monitor can capture all the other cpus when one catches | |
120 | * a watchdog reset or the user enters the monitor using L1-A keys. | |
121 | */ | |
122 | #define MBOX_STOPCPU 0xFB | |
123 | #define MBOX_IDLECPU 0xFC | |
124 | #define MBOX_IDLECPU2 0xFD | |
125 | #define MBOX_STOPCPU2 0xFE | |
126 | ||
127 | #else /* SMP */ | |
128 | ||
129 | #define hard_smp_processor_id() 0 | |
130 | #define smp_setup_cpu_possible_map() do { } while (0) | |
131 | ||
132 | #endif /* !(SMP) */ | |
f5e706ad | 133 | #endif /* !(_SPARC_SMP_H) */ |