[mirror_ubuntu-disco-kernel.git] / arch / x86 / include / asm / invpcid.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_INVPCID
#define _ASM_X86_INVPCID

static inline void __invpcid(unsigned long pcid, unsigned long addr,
			     unsigned long type)
{
	struct { u64 d[2]; } desc = { { pcid, addr } };

	/*
	 * The memory clobber is because the whole point is to invalidate
	 * stale TLB entries and, especially if we're flushing global
	 * mappings, we don't want the compiler to reorder any subsequent
	 * memory accesses before the TLB flush.
	 *
	 * The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
	 * invpcid (%rcx), %rax in long mode.
	 */
	asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
		      : : "m" (desc), "a" (type), "c" (&desc) : "memory");
}

#define INVPCID_TYPE_INDIV_ADDR		0
#define INVPCID_TYPE_SINGLE_CTXT	1
#define INVPCID_TYPE_ALL_INCL_GLOBAL	2
#define INVPCID_TYPE_ALL_NON_GLOBAL	3

/* Flush all mappings for a given pcid and addr, not including globals. */
static inline void invpcid_flush_one(unsigned long pcid,
				     unsigned long addr)
{
	__invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
}

/* Flush all mappings for a given PCID, not including globals. */
static inline void invpcid_flush_single_context(unsigned long pcid)
{
	__invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
}

/* Flush all mappings, including globals, for all PCIDs. */
static inline void invpcid_flush_all(void)
{
	__invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
}

/* Flush all mappings for all PCIDs except globals. */
static inline void invpcid_flush_all_nonglobals(void)
{
	__invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
}

#endif /* _ASM_X86_INVPCID */
Commit	Line	Data
1a3b0cae PZ	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_X86_INVPCID
	3	#define _ASM_X86_INVPCID
	4
	5	static inline void __invpcid(unsigned long pcid, unsigned long addr,
	6	unsigned long type)
	7	{
	8	struct { u64 d[2]; } desc = { { pcid, addr } };
	9
	10	/*
	11	* The memory clobber is because the whole point is to invalidate
	12	* stale TLB entries and, especially if we're flushing global
	13	* mappings, we don't want the compiler to reorder any subsequent
	14	* memory accesses before the TLB flush.
	15	*
	16	* The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
	17	* invpcid (%rcx), %rax in long mode.
	18	*/
	19	asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
	20	: : "m" (desc), "a" (type), "c" (&desc) : "memory");
	21	}
	22
	23	#define INVPCID_TYPE_INDIV_ADDR 0
	24	#define INVPCID_TYPE_SINGLE_CTXT 1
	25	#define INVPCID_TYPE_ALL_INCL_GLOBAL 2
	26	#define INVPCID_TYPE_ALL_NON_GLOBAL 3
	27
	28	/* Flush all mappings for a given pcid and addr, not including globals. */
	29	static inline void invpcid_flush_one(unsigned long pcid,
	30	unsigned long addr)
	31	{
	32	__invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
	33	}
	34
	35	/* Flush all mappings for a given PCID, not including globals. */
	36	static inline void invpcid_flush_single_context(unsigned long pcid)
	37	{
	38	__invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
	39	}
	40
	41	/* Flush all mappings, including globals, for all PCIDs. */
	42	static inline void invpcid_flush_all(void)
	43	{
	44	__invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
	45	}
	46
	47	/* Flush all mappings for all PCIDs except globals. */
	48	static inline void invpcid_flush_all_nonglobals(void)
	49	{
	50	__invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
	51	}
	52
	53	#endif /* _ASM_X86_INVPCID */