]>
Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
229456fc | 17 | #include <linux/tracepoint.h> |
f5f48ee1 | 18 | #include <linux/cpumask.h> |
34c16eec ZX |
19 | |
20 | #include <linux/kvm.h> | |
21 | #include <linux/kvm_para.h> | |
edf88417 | 22 | #include <linux/kvm_types.h> |
34c16eec | 23 | |
50d0a0f9 | 24 | #include <asm/pvclock-abi.h> |
e01a1b57 | 25 | #include <asm/desc.h> |
0bed3b56 | 26 | #include <asm/mtrr.h> |
9962d032 | 27 | #include <asm/msr-index.h> |
e01a1b57 | 28 | |
0680fe52 | 29 | #define KVM_MAX_VCPUS 64 |
69a9f69b AK |
30 | #define KVM_MEMORY_SLOTS 32 |
31 | /* memory slots that does not exposed to userspace */ | |
32 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
33 | ||
34 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 35 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 36 | |
cd6e8f87 ZX |
37 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
38 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
39 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
40 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 41 | |
cd6e8f87 | 42 | #define INVALID_PAGE (~(hpa_t)0) |
dd180b3e XG |
43 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
44 | ||
cd6e8f87 ZX |
45 | #define UNMAPPED_GVA (~(gpa_t)0) |
46 | ||
ec04b260 | 47 | /* KVM Hugepage definitions for x86 */ |
04326caa | 48 | #define KVM_NR_PAGE_SIZES 3 |
82855413 JR |
49 | #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) |
50 | #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) | |
ec04b260 JR |
51 | #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) |
52 | #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) | |
53 | #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) | |
05da4558 | 54 | |
cd6e8f87 | 55 | #define DE_VECTOR 0 |
19bd8afd | 56 | #define DB_VECTOR 1 |
77ab6db0 JK |
57 | #define BP_VECTOR 3 |
58 | #define OF_VECTOR 4 | |
59 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
60 | #define UD_VECTOR 6 |
61 | #define NM_VECTOR 7 | |
62 | #define DF_VECTOR 8 | |
63 | #define TS_VECTOR 10 | |
64 | #define NP_VECTOR 11 | |
65 | #define SS_VECTOR 12 | |
66 | #define GP_VECTOR 13 | |
67 | #define PF_VECTOR 14 | |
77ab6db0 | 68 | #define MF_VECTOR 16 |
53371b50 | 69 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
70 | |
71 | #define SELECTOR_TI_MASK (1 << 2) | |
72 | #define SELECTOR_RPL_MASK 0x03 | |
73 | ||
74 | #define IOPL_SHIFT 12 | |
75 | ||
d657a98e ZX |
76 | #define KVM_PERMILLE_MMU_PAGES 20 |
77 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
78 | #define KVM_MMU_HASH_SHIFT 10 |
79 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
80 | #define KVM_MIN_FREE_MMU_PAGES 5 |
81 | #define KVM_REFILL_PAGES 25 | |
82 | #define KVM_MAX_CPUID_ENTRIES 40 | |
0bed3b56 | 83 | #define KVM_NR_FIXED_MTRR_REGION 88 |
9ba075a6 | 84 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 85 | |
e9b11c17 ZX |
86 | extern spinlock_t kvm_lock; |
87 | extern struct list_head vm_list; | |
88 | ||
d657a98e ZX |
89 | struct kvm_vcpu; |
90 | struct kvm; | |
91 | ||
5fdbf976 | 92 | enum kvm_reg { |
2b3ccfa0 ZX |
93 | VCPU_REGS_RAX = 0, |
94 | VCPU_REGS_RCX = 1, | |
95 | VCPU_REGS_RDX = 2, | |
96 | VCPU_REGS_RBX = 3, | |
97 | VCPU_REGS_RSP = 4, | |
98 | VCPU_REGS_RBP = 5, | |
99 | VCPU_REGS_RSI = 6, | |
100 | VCPU_REGS_RDI = 7, | |
101 | #ifdef CONFIG_X86_64 | |
102 | VCPU_REGS_R8 = 8, | |
103 | VCPU_REGS_R9 = 9, | |
104 | VCPU_REGS_R10 = 10, | |
105 | VCPU_REGS_R11 = 11, | |
106 | VCPU_REGS_R12 = 12, | |
107 | VCPU_REGS_R13 = 13, | |
108 | VCPU_REGS_R14 = 14, | |
109 | VCPU_REGS_R15 = 15, | |
110 | #endif | |
5fdbf976 | 111 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
112 | NR_VCPU_REGS |
113 | }; | |
114 | ||
6de4f3ad AK |
115 | enum kvm_reg_ex { |
116 | VCPU_EXREG_PDPTR = NR_VCPU_REGS, | |
117 | }; | |
118 | ||
2b3ccfa0 | 119 | enum { |
81609e3e | 120 | VCPU_SREG_ES, |
2b3ccfa0 | 121 | VCPU_SREG_CS, |
81609e3e | 122 | VCPU_SREG_SS, |
2b3ccfa0 | 123 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
124 | VCPU_SREG_FS, |
125 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
126 | VCPU_SREG_TR, |
127 | VCPU_SREG_LDTR, | |
128 | }; | |
129 | ||
56e82318 | 130 | #include <asm/kvm_emulate.h> |
2b3ccfa0 | 131 | |
d657a98e ZX |
132 | #define KVM_NR_MEM_OBJS 40 |
133 | ||
42dbaa5a JK |
134 | #define KVM_NR_DB_REGS 4 |
135 | ||
136 | #define DR6_BD (1 << 13) | |
137 | #define DR6_BS (1 << 14) | |
138 | #define DR6_FIXED_1 0xffff0ff0 | |
139 | #define DR6_VOLATILE 0x0000e00f | |
140 | ||
141 | #define DR7_BP_EN_MASK 0x000000ff | |
142 | #define DR7_GE (1 << 9) | |
143 | #define DR7_GD (1 << 13) | |
144 | #define DR7_FIXED_1 0x00000400 | |
145 | #define DR7_VOLATILE 0xffff23ff | |
146 | ||
d657a98e ZX |
147 | /* |
148 | * We don't want allocation failures within the mmu code, so we preallocate | |
149 | * enough memory for a single page fault in a cache. | |
150 | */ | |
151 | struct kvm_mmu_memory_cache { | |
152 | int nobjs; | |
153 | void *objects[KVM_NR_MEM_OBJS]; | |
154 | }; | |
155 | ||
156 | #define NR_PTE_CHAIN_ENTRIES 5 | |
157 | ||
158 | struct kvm_pte_chain { | |
159 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
160 | struct hlist_node link; | |
161 | }; | |
162 | ||
163 | /* | |
164 | * kvm_mmu_page_role, below, is defined as: | |
165 | * | |
166 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
167 | * bits 4:7 - page table level for this shadow (1-4) | |
168 | * bits 8:9 - page table quadrant for 2-level guests | |
f6e2c02b AK |
169 | * bit 16 - direct mapping of virtual to physical mapping at gfn |
170 | * used for real mode and two-dimensional paging | |
d657a98e ZX |
171 | * bits 17:19 - common access permissions for all ptes in this shadow page |
172 | */ | |
173 | union kvm_mmu_page_role { | |
174 | unsigned word; | |
175 | struct { | |
7d76b4d3 | 176 | unsigned level:4; |
5b7e0102 | 177 | unsigned cr4_pae:1; |
7d76b4d3 JP |
178 | unsigned quadrant:2; |
179 | unsigned pad_for_nice_hex_output:6; | |
f6e2c02b | 180 | unsigned direct:1; |
7d76b4d3 | 181 | unsigned access:3; |
2e53d63a | 182 | unsigned invalid:1; |
9645bb56 | 183 | unsigned nxe:1; |
3dbe1415 | 184 | unsigned cr0_wp:1; |
d657a98e ZX |
185 | }; |
186 | }; | |
187 | ||
188 | struct kvm_mmu_page { | |
189 | struct list_head link; | |
190 | struct hlist_node hash_link; | |
191 | ||
192 | /* | |
193 | * The following two entries are used to key the shadow page in the | |
194 | * hash table. | |
195 | */ | |
196 | gfn_t gfn; | |
197 | union kvm_mmu_page_role role; | |
198 | ||
199 | u64 *spt; | |
200 | /* hold the gfn of each spte inside spt */ | |
201 | gfn_t *gfns; | |
291f26bc SY |
202 | /* |
203 | * One bit set per slot which has memory | |
204 | * in this shadow page. | |
205 | */ | |
206 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | |
0571d366 | 207 | bool multimapped; /* More than one parent_pte? */ |
4731d4c7 | 208 | bool unsync; |
0571d366 | 209 | int root_count; /* Currently serving as active root */ |
60c8aec6 | 210 | unsigned int unsync_children; |
d657a98e ZX |
211 | union { |
212 | u64 *parent_pte; /* !multimapped */ | |
213 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
214 | }; | |
0074ff63 | 215 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
216 | }; |
217 | ||
6ad18fba DH |
218 | struct kvm_pv_mmu_op_buffer { |
219 | void *ptr; | |
220 | unsigned len; | |
221 | unsigned processed; | |
222 | char buf[512] __aligned(sizeof(long)); | |
223 | }; | |
224 | ||
1c08364c AK |
225 | struct kvm_pio_request { |
226 | unsigned long count; | |
1c08364c AK |
227 | int in; |
228 | int port; | |
229 | int size; | |
1c08364c AK |
230 | }; |
231 | ||
d657a98e ZX |
232 | /* |
233 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
234 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
235 | * mode. | |
236 | */ | |
237 | struct kvm_mmu { | |
238 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
f43addd4 | 239 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); |
d657a98e ZX |
240 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); |
241 | void (*free)(struct kvm_vcpu *vcpu); | |
1871c602 GN |
242 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, |
243 | u32 *error); | |
d657a98e ZX |
244 | void (*prefetch_page)(struct kvm_vcpu *vcpu, |
245 | struct kvm_mmu_page *page); | |
e8bc217a | 246 | int (*sync_page)(struct kvm_vcpu *vcpu, |
be71e061 | 247 | struct kvm_mmu_page *sp, bool clear_unsync); |
a7052897 | 248 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
249 | hpa_t root_hpa; |
250 | int root_level; | |
251 | int shadow_root_level; | |
a770f6f2 | 252 | union kvm_mmu_page_role base_role; |
c5a78f2b | 253 | bool direct_map; |
d657a98e ZX |
254 | |
255 | u64 *pae_root; | |
82725b20 | 256 | u64 rsvd_bits_mask[2][4]; |
d657a98e ZX |
257 | }; |
258 | ||
ad312c7c | 259 | struct kvm_vcpu_arch { |
5fdbf976 MT |
260 | /* |
261 | * rip and regs accesses must go through | |
262 | * kvm_{register,rip}_{read,write} functions. | |
263 | */ | |
264 | unsigned long regs[NR_VCPU_REGS]; | |
265 | u32 regs_avail; | |
266 | u32 regs_dirty; | |
34c16eec ZX |
267 | |
268 | unsigned long cr0; | |
e8467fda | 269 | unsigned long cr0_guest_owned_bits; |
34c16eec ZX |
270 | unsigned long cr2; |
271 | unsigned long cr3; | |
272 | unsigned long cr4; | |
fc78f519 | 273 | unsigned long cr4_guest_owned_bits; |
34c16eec | 274 | unsigned long cr8; |
1371d904 | 275 | u32 hflags; |
34c16eec | 276 | u64 pdptrs[4]; /* pae */ |
f6801dff | 277 | u64 efer; |
34c16eec ZX |
278 | u64 apic_base; |
279 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
e1035715 | 280 | int32_t apic_arb_prio; |
34c16eec ZX |
281 | int mp_state; |
282 | int sipi_vector; | |
283 | u64 ia32_misc_enable_msr; | |
b209749f | 284 | bool tpr_access_reporting; |
34c16eec ZX |
285 | |
286 | struct kvm_mmu mmu; | |
6ad18fba DH |
287 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
288 | * put it here to avoid allocation */ | |
289 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
290 | |
291 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
292 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
293 | struct kvm_mmu_memory_cache mmu_page_cache; | |
294 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
295 | ||
296 | gfn_t last_pt_write_gfn; | |
297 | int last_pt_write_count; | |
298 | u64 *last_pte_updated; | |
1b7fcd32 | 299 | gfn_t last_pte_gfn; |
34c16eec | 300 | |
d7824fff | 301 | struct { |
35149e21 AL |
302 | gfn_t gfn; /* presumed gfn during guest pte update */ |
303 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
e930bffe | 304 | unsigned long mmu_seq; |
d7824fff AK |
305 | } update_pte; |
306 | ||
98918833 | 307 | struct fpu guest_fpu; |
2acf923e | 308 | u64 xcr0; |
34c16eec ZX |
309 | |
310 | gva_t mmio_fault_cr2; | |
311 | struct kvm_pio_request pio; | |
312 | void *pio_data; | |
313 | ||
66fd3f7f GN |
314 | u8 event_exit_inst_len; |
315 | ||
298101da AK |
316 | struct kvm_queued_exception { |
317 | bool pending; | |
318 | bool has_error_code; | |
ce7ddec4 | 319 | bool reinject; |
298101da AK |
320 | u8 nr; |
321 | u32 error_code; | |
322 | } exception; | |
323 | ||
937a7eae AK |
324 | struct kvm_queued_interrupt { |
325 | bool pending; | |
66fd3f7f | 326 | bool soft; |
937a7eae AK |
327 | u8 nr; |
328 | } interrupt; | |
329 | ||
34c16eec ZX |
330 | int halt_request; /* real mode on Intel only */ |
331 | ||
332 | int cpuid_nent; | |
07716717 | 333 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
334 | /* emulate context */ |
335 | ||
336 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
337 | |
338 | gpa_t time; | |
50d0a0f9 | 339 | struct pvclock_vcpu_time_info hv_clock; |
e48672fa | 340 | unsigned int hw_tsc_khz; |
18068523 GOC |
341 | unsigned int time_offset; |
342 | struct page *time_page; | |
e48672fa | 343 | u64 last_host_tsc; |
1d5f066e ZA |
344 | u64 last_guest_tsc; |
345 | u64 last_kernel_ns; | |
3419ffc8 SY |
346 | |
347 | bool nmi_pending; | |
668f612f | 348 | bool nmi_injected; |
9ba075a6 | 349 | |
0bed3b56 SY |
350 | struct mtrr_state_type mtrr_state; |
351 | u32 pat; | |
42dbaa5a JK |
352 | |
353 | int switch_db_regs; | |
42dbaa5a JK |
354 | unsigned long db[KVM_NR_DB_REGS]; |
355 | unsigned long dr6; | |
356 | unsigned long dr7; | |
357 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
890ca9ae HY |
358 | |
359 | u64 mcg_cap; | |
360 | u64 mcg_status; | |
361 | u64 mcg_ctl; | |
362 | u64 *mce_banks; | |
94fe45da JK |
363 | |
364 | /* used for guest single stepping over the given code position */ | |
94fe45da | 365 | unsigned long singlestep_rip; |
f92653ee | 366 | |
10388a07 GN |
367 | /* fields used by HYPER-V emulation */ |
368 | u64 hv_vapic; | |
f5f48ee1 SY |
369 | |
370 | cpumask_var_t wbinvd_dirty_mask; | |
34c16eec ZX |
371 | }; |
372 | ||
fef9cce0 | 373 | struct kvm_arch { |
49d5ca26 | 374 | unsigned int n_used_mmu_pages; |
f05e70ac | 375 | unsigned int n_requested_mmu_pages; |
39de71ec | 376 | unsigned int n_max_mmu_pages; |
08e850c6 | 377 | atomic_t invlpg_counter; |
f05e70ac ZX |
378 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; |
379 | /* | |
380 | * Hash table of struct kvm_mmu_page. | |
381 | */ | |
382 | struct list_head active_mmu_pages; | |
4d5c5d0f | 383 | struct list_head assigned_dev_head; |
19de40a8 | 384 | struct iommu_domain *iommu_domain; |
522c68c4 | 385 | int iommu_flags; |
d7deeeb0 ZX |
386 | struct kvm_pic *vpic; |
387 | struct kvm_ioapic *vioapic; | |
7837699f | 388 | struct kvm_pit *vpit; |
cc6e462c | 389 | int vapics_in_nmi_mode; |
bfc6d222 | 390 | |
bfc6d222 ZX |
391 | unsigned int tss_addr; |
392 | struct page *apic_access_page; | |
18068523 GOC |
393 | |
394 | gpa_t wall_clock; | |
b7ebfb05 SY |
395 | |
396 | struct page *ept_identity_pagetable; | |
397 | bool ept_identity_pagetable_done; | |
b927a3ce | 398 | gpa_t ept_identity_map_addr; |
5550af4d SY |
399 | |
400 | unsigned long irq_sources_bitmap; | |
afbcf7ab | 401 | s64 kvmclock_offset; |
99e3e30a | 402 | spinlock_t tsc_write_lock; |
f38e098f ZA |
403 | u64 last_tsc_nsec; |
404 | u64 last_tsc_offset; | |
405 | u64 last_tsc_write; | |
ffde22ac ES |
406 | |
407 | struct kvm_xen_hvm_config xen_hvm_config; | |
55cd8e5a GN |
408 | |
409 | /* fields used by HYPER-V emulation */ | |
410 | u64 hv_guest_os_id; | |
411 | u64 hv_hypercall; | |
d69fb81f ZX |
412 | }; |
413 | ||
0711456c ZX |
414 | struct kvm_vm_stat { |
415 | u32 mmu_shadow_zapped; | |
416 | u32 mmu_pte_write; | |
417 | u32 mmu_pte_updated; | |
418 | u32 mmu_pde_zapped; | |
419 | u32 mmu_flooded; | |
420 | u32 mmu_recycled; | |
dfc5aa00 | 421 | u32 mmu_cache_miss; |
4731d4c7 | 422 | u32 mmu_unsync; |
0711456c | 423 | u32 remote_tlb_flush; |
05da4558 | 424 | u32 lpages; |
0711456c ZX |
425 | }; |
426 | ||
77b4c255 ZX |
427 | struct kvm_vcpu_stat { |
428 | u32 pf_fixed; | |
429 | u32 pf_guest; | |
430 | u32 tlb_flush; | |
431 | u32 invlpg; | |
432 | ||
433 | u32 exits; | |
434 | u32 io_exits; | |
435 | u32 mmio_exits; | |
436 | u32 signal_exits; | |
437 | u32 irq_window_exits; | |
f08864b4 | 438 | u32 nmi_window_exits; |
77b4c255 ZX |
439 | u32 halt_exits; |
440 | u32 halt_wakeup; | |
441 | u32 request_irq_exits; | |
442 | u32 irq_exits; | |
443 | u32 host_state_reload; | |
444 | u32 efer_reload; | |
445 | u32 fpu_reload; | |
446 | u32 insn_emulation; | |
447 | u32 insn_emulation_fail; | |
f11c3a8d | 448 | u32 hypercalls; |
fa89a817 | 449 | u32 irq_injections; |
c4abb7c9 | 450 | u32 nmi_injections; |
77b4c255 | 451 | }; |
ad312c7c | 452 | |
ea4a5ff8 ZX |
453 | struct kvm_x86_ops { |
454 | int (*cpu_has_kvm_support)(void); /* __init */ | |
455 | int (*disabled_by_bios)(void); /* __init */ | |
10474ae8 | 456 | int (*hardware_enable)(void *dummy); |
ea4a5ff8 ZX |
457 | void (*hardware_disable)(void *dummy); |
458 | void (*check_processor_compatibility)(void *rtn); | |
459 | int (*hardware_setup)(void); /* __init */ | |
460 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 461 | bool (*cpu_has_accelerated_tpr)(void); |
0e851880 | 462 | void (*cpuid_update)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
463 | |
464 | /* Create, but do not attach this VCPU */ | |
465 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
466 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
467 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
468 | ||
469 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
470 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
471 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 472 | |
355be0b9 JK |
473 | void (*set_guest_debug)(struct kvm_vcpu *vcpu, |
474 | struct kvm_guest_debug *dbg); | |
ea4a5ff8 ZX |
475 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); |
476 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
477 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
478 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
479 | struct kvm_segment *var, int seg); | |
2e4d2653 | 480 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
481 | void (*set_segment)(struct kvm_vcpu *vcpu, |
482 | struct kvm_segment *var, int seg); | |
483 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
e8467fda | 484 | void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
485 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); |
486 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
487 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
488 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
489 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
89a27f4d GN |
490 | void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
491 | void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
492 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
493 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
020df079 | 494 | void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); |
5fdbf976 | 495 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
496 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
497 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
6b52d186 | 498 | void (*fpu_activate)(struct kvm_vcpu *vcpu); |
02daab21 | 499 | void (*fpu_deactivate)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
500 | |
501 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 502 | |
851ba692 AK |
503 | void (*run)(struct kvm_vcpu *vcpu); |
504 | int (*handle_exit)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 505 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); |
2809f5d2 GC |
506 | void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); |
507 | u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
ea4a5ff8 ZX |
508 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, |
509 | unsigned char *hypercall_addr); | |
66fd3f7f | 510 | void (*set_irq)(struct kvm_vcpu *vcpu); |
95ba8273 | 511 | void (*set_nmi)(struct kvm_vcpu *vcpu); |
298101da | 512 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
ce7ddec4 JR |
513 | bool has_error_code, u32 error_code, |
514 | bool reinject); | |
78646121 | 515 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
95ba8273 | 516 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); |
3cfc3092 JK |
517 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); |
518 | void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); | |
95ba8273 GN |
519 | void (*enable_nmi_window)(struct kvm_vcpu *vcpu); |
520 | void (*enable_irq_window)(struct kvm_vcpu *vcpu); | |
521 | void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); | |
ea4a5ff8 | 522 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
67253af5 | 523 | int (*get_tdp_level)(void); |
4b12f0de | 524 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); |
17cc3935 | 525 | int (*get_lpage_level)(void); |
4e47c7a6 | 526 | bool (*rdtscp_supported)(void); |
e48672fa | 527 | void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment); |
344f414f | 528 | |
1c97f0a0 JR |
529 | void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); |
530 | ||
d4330ef2 JR |
531 | void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); |
532 | ||
f5f48ee1 SY |
533 | bool (*has_wbinvd_exit)(void); |
534 | ||
99e3e30a ZA |
535 | void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); |
536 | ||
229456fc | 537 | const struct trace_print_flags *exit_reasons_str; |
ea4a5ff8 ZX |
538 | }; |
539 | ||
97896d04 ZX |
540 | extern struct kvm_x86_ops *kvm_x86_ops; |
541 | ||
54f1585a ZX |
542 | int kvm_mmu_module_init(void); |
543 | void kvm_mmu_module_exit(void); | |
544 | ||
545 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
546 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
547 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
548 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
549 | void kvm_mmu_set_base_ptes(u64 base_pte); |
550 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 551 | u64 dirty_mask, u64 nx_mask, u64 x_mask); |
54f1585a ZX |
552 | |
553 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
554 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
555 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 556 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
557 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
558 | ||
cc4b6871 JR |
559 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
560 | ||
3200f405 | 561 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 562 | const void *val, int bytes); |
2f333bcb MT |
563 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
564 | gpa_t addr, unsigned long *ret); | |
4b12f0de | 565 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); |
2f333bcb MT |
566 | |
567 | extern bool tdp_enabled; | |
9f811285 | 568 | |
54f1585a ZX |
569 | enum emulation_result { |
570 | EMULATE_DONE, /* no further processing */ | |
571 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
572 | EMULATE_FAIL, /* can't emulate this instruction */ | |
573 | }; | |
574 | ||
571008da SY |
575 | #define EMULTYPE_NO_DECODE (1 << 0) |
576 | #define EMULTYPE_TRAP_UD (1 << 1) | |
ba8afb6b | 577 | #define EMULTYPE_SKIP (1 << 2) |
851ba692 | 578 | int emulate_instruction(struct kvm_vcpu *vcpu, |
571008da | 579 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
580 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); |
581 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
54f1585a | 582 | |
f2b4b7dd | 583 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
584 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
585 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
586 | ||
587 | struct x86_emulate_ctxt; | |
588 | ||
cf8f70bf | 589 | int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); |
54f1585a ZX |
590 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); |
591 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
592 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
593 | int emulate_clts(struct kvm_vcpu *vcpu); | |
f5f48ee1 | 594 | int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); |
54f1585a | 595 | |
3e6e0aab | 596 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
c697518a | 597 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); |
3e6e0aab | 598 | |
e269fb21 JK |
599 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason, |
600 | bool has_error_code, u32 error_code); | |
37817f29 | 601 | |
49a9b07e | 602 | int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
2390218b | 603 | int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
a83b29c6 | 604 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); |
9c20456a | 605 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); |
020df079 GN |
606 | int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); |
607 | int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); | |
2d3ad1f4 AK |
608 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
609 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a | 610 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
2acf923e | 611 | int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); |
54f1585a ZX |
612 | |
613 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
614 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
615 | ||
91586a3b JK |
616 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); |
617 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); | |
618 | ||
298101da AK |
619 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
620 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
ce7ddec4 JR |
621 | void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
622 | void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
623 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
624 | u32 error_code); | |
0a79b009 | 625 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); |
298101da | 626 | |
4925663a | 627 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
3de42dc0 | 628 | |
3419ffc8 SY |
629 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
630 | ||
10ab25cd | 631 | int fx_init(struct kvm_vcpu *vcpu); |
54f1585a | 632 | |
d835dfec | 633 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a | 634 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
635 | const u8 *new, int bytes, |
636 | bool guest_initiated); | |
54f1585a ZX |
637 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
638 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
639 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
640 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 641 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
1871c602 GN |
642 | gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); |
643 | gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
644 | gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
645 | gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
54f1585a ZX |
646 | |
647 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
648 | ||
649 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
650 | ||
3067714c | 651 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 652 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 653 | |
18552672 | 654 | void kvm_enable_tdp(void); |
5f4cb662 | 655 | void kvm_disable_tdp(void); |
18552672 | 656 | |
de7d789a | 657 | int complete_pio(struct kvm_vcpu *vcpu); |
f850e2e6 | 658 | bool kvm_check_iopl(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
659 | |
660 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
661 | { | |
662 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
663 | ||
664 | return (struct kvm_mmu_page *)page_private(page); | |
665 | } | |
666 | ||
d6e88aec | 667 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
668 | { |
669 | u16 ldt; | |
670 | asm("sldt %0" : "=g"(ldt)); | |
671 | return ldt; | |
672 | } | |
673 | ||
d6e88aec | 674 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
675 | { |
676 | asm("lldt %0" : : "rm"(sel)); | |
677 | } | |
ec6d273d | 678 | |
ec6d273d ZX |
679 | #ifdef CONFIG_X86_64 |
680 | static inline unsigned long read_msr(unsigned long msr) | |
681 | { | |
682 | u64 value; | |
683 | ||
684 | rdmsrl(msr, value); | |
685 | return value; | |
686 | } | |
687 | #endif | |
688 | ||
ec6d273d ZX |
689 | static inline u32 get_rdx_init_val(void) |
690 | { | |
691 | return 0x600; /* P6 family */ | |
692 | } | |
693 | ||
c1a5d4f9 AK |
694 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
695 | { | |
696 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
697 | } | |
698 | ||
ec6d273d ZX |
699 | #define TSS_IOPB_BASE_OFFSET 0x66 |
700 | #define TSS_BASE_SIZE 0x68 | |
701 | #define TSS_IOPB_SIZE (65536 / 8) | |
702 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
703 | #define RMODE_TSS_SIZE \ |
704 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 705 | |
37817f29 IE |
706 | enum { |
707 | TASK_SWITCH_CALL = 0, | |
708 | TASK_SWITCH_IRET = 1, | |
709 | TASK_SWITCH_JMP = 2, | |
710 | TASK_SWITCH_GATE = 3, | |
711 | }; | |
712 | ||
1371d904 | 713 | #define HF_GIF_MASK (1 << 0) |
3d6368ef AG |
714 | #define HF_HIF_MASK (1 << 1) |
715 | #define HF_VINTR_MASK (1 << 2) | |
95ba8273 | 716 | #define HF_NMI_MASK (1 << 3) |
44c11430 | 717 | #define HF_IRET_MASK (1 << 4) |
1371d904 | 718 | |
4ecac3fd AK |
719 | /* |
720 | * Hardware virtualization extension instructions may fault if a | |
721 | * reboot turns off virtualization while processes are running. | |
722 | * Trap the fault and ignore the instruction if that happens. | |
723 | */ | |
724 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
725 | ||
726 | #define __kvm_handle_fault_on_reboot(insn) \ | |
727 | "666: " insn "\n\t" \ | |
18b13e54 | 728 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 729 | "667: \n\t" \ |
8ceed347 | 730 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
731 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
732 | ".popsection \n\t" \ | |
733 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 734 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
735 | ".popsection" |
736 | ||
e930bffe AA |
737 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
738 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
739 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
3da0dd43 | 740 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); |
82725b20 | 741 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
a1b37100 GN |
742 | int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); |
743 | int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); | |
0b71785d | 744 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); |
e930bffe | 745 | |
18863bdd | 746 | void kvm_define_shared_msr(unsigned index, u32 msr); |
d5696725 | 747 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); |
18863bdd | 748 | |
f92653ee JK |
749 | bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); |
750 | ||
1965aae3 | 751 | #endif /* _ASM_X86_KVM_HOST_H */ |