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KVM: SVM: Improve nested interrupt injection
[mirror_ubuntu-disco-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
9962d032 25#include <asm/msr-index.h>
e01a1b57 26
69a9f69b
AK		 27#define KVM_MAX_VCPUS 16
28#define KVM_MEMORY_SLOTS 32
29/* memory slots that does not exposed to userspace */
30#define KVM_PRIVATE_MEM_SLOTS 4
31
32#define KVM_PIO_PAGE_OFFSET 1
542472b5 33#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 34
cd6e8f87
ZX		 35#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
36#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 37#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
38 0xFFFFFF0000000000ULL)
cd6e8f87 39
3a624e29
NK		 40#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST \
41 (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
42#define KVM_GUEST_CR0_MASK \
43 (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
44#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST \
45 (X86_CR0_WP | X86_CR0_NE | X86_CR0_TS | X86_CR0_MP)
7d76b4d3 46#define KVM_VM_CR0_ALWAYS_ON \
3a624e29 47 (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
7d76b4d3 48#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 49 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
50#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
51#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
52
53#define INVALID_PAGE (~(hpa_t)0)
54#define UNMAPPED_GVA (~(gpa_t)0)
55
05da4558
MT		 56/* shadow tables are PAE even on non-PAE hosts */
57#define KVM_HPAGE_SHIFT 21
58#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
59#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
60
61#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
62
cd6e8f87 63#define DE_VECTOR 0
19bd8afd 64#define DB_VECTOR 1
77ab6db0
JK		 65#define BP_VECTOR 3
66#define OF_VECTOR 4
67#define BR_VECTOR 5
cd6e8f87
ZX		 68#define UD_VECTOR 6
69#define NM_VECTOR 7
70#define DF_VECTOR 8
71#define TS_VECTOR 10
72#define NP_VECTOR 11
73#define SS_VECTOR 12
74#define GP_VECTOR 13
75#define PF_VECTOR 14
77ab6db0 76#define MF_VECTOR 16
53371b50 77#define MC_VECTOR 18
cd6e8f87
ZX		 78
79#define SELECTOR_TI_MASK (1 << 2)
80#define SELECTOR_RPL_MASK 0x03
81
82#define IOPL_SHIFT 12
83
d69fb81f
ZX		 84#define KVM_ALIAS_SLOTS 4
85
d657a98e
ZX		 86#define KVM_PERMILLE_MMU_PAGES 20
87#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 88#define KVM_MMU_HASH_SHIFT 10
89#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 90#define KVM_MIN_FREE_MMU_PAGES 5
91#define KVM_REFILL_PAGES 25
92#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 93#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 94#define KVM_NR_VAR_MTRR 8
d657a98e 95
e9b11c17
ZX		 96extern spinlock_t kvm_lock;
97extern struct list_head vm_list;
98
d657a98e
ZX		 99struct kvm_vcpu;
100struct kvm;
101
5fdbf976 102enum kvm_reg {
2b3ccfa0
ZX		 103 VCPU_REGS_RAX = 0,
104 VCPU_REGS_RCX = 1,
105 VCPU_REGS_RDX = 2,
106 VCPU_REGS_RBX = 3,
107 VCPU_REGS_RSP = 4,
108 VCPU_REGS_RBP = 5,
109 VCPU_REGS_RSI = 6,
110 VCPU_REGS_RDI = 7,
111#ifdef CONFIG_X86_64
112 VCPU_REGS_R8 = 8,
113 VCPU_REGS_R9 = 9,
114 VCPU_REGS_R10 = 10,
115 VCPU_REGS_R11 = 11,
116 VCPU_REGS_R12 = 12,
117 VCPU_REGS_R13 = 13,
118 VCPU_REGS_R14 = 14,
119 VCPU_REGS_R15 = 15,
120#endif
5fdbf976 121 VCPU_REGS_RIP,
2b3ccfa0
ZX		 122 NR_VCPU_REGS
123};
124
6de4f3ad
AK		 125enum kvm_reg_ex {
126 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
127};
128
2b3ccfa0 129enum {
81609e3e 130 VCPU_SREG_ES,
2b3ccfa0 131 VCPU_SREG_CS,
81609e3e 132 VCPU_SREG_SS,
2b3ccfa0 133 VCPU_SREG_DS,
2b3ccfa0
ZX		 134 VCPU_SREG_FS,
135 VCPU_SREG_GS,
2b3ccfa0
ZX		 136 VCPU_SREG_TR,
137 VCPU_SREG_LDTR,
138};
139
edf88417 140#include <asm/kvm_x86_emulate.h>
2b3ccfa0 141
d657a98e
ZX		 142#define KVM_NR_MEM_OBJS 40
143
42dbaa5a
JK		 144#define KVM_NR_DB_REGS 4
145
146#define DR6_BD (1 << 13)
147#define DR6_BS (1 << 14)
148#define DR6_FIXED_1 0xffff0ff0
149#define DR6_VOLATILE 0x0000e00f
150
151#define DR7_BP_EN_MASK 0x000000ff
152#define DR7_GE (1 << 9)
153#define DR7_GD (1 << 13)
154#define DR7_FIXED_1 0x00000400
155#define DR7_VOLATILE 0xffff23ff
156
d657a98e
ZX		 157/*
158 * We don't want allocation failures within the mmu code, so we preallocate
159 * enough memory for a single page fault in a cache.
160 */
161struct kvm_mmu_memory_cache {
162 int nobjs;
163 void *objects[KVM_NR_MEM_OBJS];
164};
165
166#define NR_PTE_CHAIN_ENTRIES 5
167
168struct kvm_pte_chain {
169 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
170 struct hlist_node link;
171};
172
173/*
174 * kvm_mmu_page_role, below, is defined as:
175 *
176 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
177 * bits 4:7 - page table level for this shadow (1-4)
178 * bits 8:9 - page table quadrant for 2-level guests
f6e2c02b
AK		 179 * bit 16 - direct mapping of virtual to physical mapping at gfn
180 * used for real mode and two-dimensional paging
d657a98e
ZX		 181 * bits 17:19 - common access permissions for all ptes in this shadow page
182 */
183union kvm_mmu_page_role {
184 unsigned word;
185 struct {
7d76b4d3
JP		 186 unsigned glevels:4;
187 unsigned level:4;
188 unsigned quadrant:2;
189 unsigned pad_for_nice_hex_output:6;
f6e2c02b 190 unsigned direct:1;
7d76b4d3 191 unsigned access:3;
2e53d63a 192 unsigned invalid:1;
2f0b3d60 193 unsigned cr4_pge:1;
9645bb56 194 unsigned nxe:1;
d657a98e
ZX		 195 };
196};
197
198struct kvm_mmu_page {
199 struct list_head link;
200 struct hlist_node hash_link;
201
6cffe8ca
MT		 202 struct list_head oos_link;
203
d657a98e
ZX		 204 /*
205 * The following two entries are used to key the shadow page in the
206 * hash table.
207 */
208 gfn_t gfn;
209 union kvm_mmu_page_role role;
210
211 u64 *spt;
212 /* hold the gfn of each spte inside spt */
213 gfn_t *gfns;
291f26bc
SY		 214 /*
215 * One bit set per slot which has memory
216 * in this shadow page.
217 */
218 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 219 int multimapped; /* More than one parent_pte? */
220 int root_count; /* Currently serving as active root */
4731d4c7 221 bool unsync;
60c8aec6 222 unsigned int unsync_children;
d657a98e
ZX		 223 union {
224 u64 *parent_pte; /* !multimapped */
225 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
226 };
0074ff63 227 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 228};
229
6ad18fba
DH		 230struct kvm_pv_mmu_op_buffer {
231 void *ptr;
232 unsigned len;
233 unsigned processed;
234 char buf[512] __aligned(sizeof(long));
235};
236
1c08364c
AK		 237struct kvm_pio_request {
238 unsigned long count;
239 int cur_count;
240 gva_t guest_gva;
241 int in;
242 int port;
243 int size;
244 int string;
245 int down;
246 int rep;
247};
248
d657a98e
ZX		 249/*
250 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
251 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
252 * mode.
253 */
254struct kvm_mmu {
255 void (*new_cr3)(struct kvm_vcpu *vcpu);
256 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
257 void (*free)(struct kvm_vcpu *vcpu);
258 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
259 void (*prefetch_page)(struct kvm_vcpu *vcpu,
260 struct kvm_mmu_page *page);
e8bc217a
MT		 261 int (*sync_page)(struct kvm_vcpu *vcpu,
262 struct kvm_mmu_page *sp);
a7052897 263 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 264 hpa_t root_hpa;
265 int root_level;
266 int shadow_root_level;
a770f6f2 267 union kvm_mmu_page_role base_role;
d657a98e
ZX		 268
269 u64 *pae_root;
82725b20 270 u64 rsvd_bits_mask[2][4];
d657a98e
ZX		 271};
272
ad312c7c 273struct kvm_vcpu_arch {
34c16eec 274 u64 host_tsc;
5fdbf976
MT		 275 /*
276 * rip and regs accesses must go through
277 * kvm_{register,rip}_{read,write} functions.
278 */
279 unsigned long regs[NR_VCPU_REGS];
280 u32 regs_avail;
281 u32 regs_dirty;
34c16eec
ZX		 282
283 unsigned long cr0;
284 unsigned long cr2;
285 unsigned long cr3;
286 unsigned long cr4;
287 unsigned long cr8;
1371d904 288 u32 hflags;
34c16eec
ZX		 289 u64 pdptrs[4]; /* pae */
290 u64 shadow_efer;
291 u64 apic_base;
292 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 293 int32_t apic_arb_prio;
34c16eec
ZX		 294 int mp_state;
295 int sipi_vector;
296 u64 ia32_misc_enable_msr;
b209749f 297 bool tpr_access_reporting;
34c16eec
ZX		 298
299 struct kvm_mmu mmu;
6ad18fba
DH		 300 /* only needed in kvm_pv_mmu_op() path, but it's hot so
301 * put it here to avoid allocation */
302 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 303
304 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
305 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
306 struct kvm_mmu_memory_cache mmu_page_cache;
307 struct kvm_mmu_memory_cache mmu_page_header_cache;
308
309 gfn_t last_pt_write_gfn;
310 int last_pt_write_count;
311 u64 *last_pte_updated;
1b7fcd32 312 gfn_t last_pte_gfn;
34c16eec 313
d7824fff 314 struct {
35149e21
AL		 315 gfn_t gfn; /* presumed gfn during guest pte update */
316 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 317 int largepage;
e930bffe 318 unsigned long mmu_seq;
d7824fff
AK		 319 } update_pte;
320
34c16eec
ZX		 321 struct i387_fxsave_struct host_fx_image;
322 struct i387_fxsave_struct guest_fx_image;
323
324 gva_t mmio_fault_cr2;
325 struct kvm_pio_request pio;
326 void *pio_data;
327
66fd3f7f
GN		 328 u8 event_exit_inst_len;
329
298101da
AK		 330 struct kvm_queued_exception {
331 bool pending;
332 bool has_error_code;
333 u8 nr;
334 u32 error_code;
335 } exception;
336
937a7eae
AK		 337 struct kvm_queued_interrupt {
338 bool pending;
66fd3f7f 339 bool soft;
937a7eae
AK		 340 u8 nr;
341 } interrupt;
342
34c16eec
ZX		 343 int halt_request; /* real mode on Intel only */
344
345 int cpuid_nent;
07716717 346 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 347 /* emulate context */
348
349 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 350
351 gpa_t time;
50d0a0f9
GH		 352 struct pvclock_vcpu_time_info hv_clock;
353 unsigned int hv_clock_tsc_khz;
18068523
GOC		 354 unsigned int time_offset;
355 struct page *time_page;
3419ffc8 356
44c11430 357 bool singlestep; /* guest is single stepped by KVM */
3419ffc8 358 bool nmi_pending;
668f612f 359 bool nmi_injected;
9ba075a6 360
0bed3b56
SY		 361 struct mtrr_state_type mtrr_state;
362 u32 pat;
42dbaa5a
JK		 363
364 int switch_db_regs;
365 unsigned long host_db[KVM_NR_DB_REGS];
366 unsigned long host_dr6;
367 unsigned long host_dr7;
368 unsigned long db[KVM_NR_DB_REGS];
369 unsigned long dr6;
370 unsigned long dr7;
371 unsigned long eff_db[KVM_NR_DB_REGS];
890ca9ae
HY		 372
373 u64 mcg_cap;
374 u64 mcg_status;
375 u64 mcg_ctl;
376 u64 *mce_banks;
34c16eec
ZX		 377};
378
d69fb81f
ZX		 379struct kvm_mem_alias {
380 gfn_t base_gfn;
381 unsigned long npages;
382 gfn_t target_gfn;
383};
384
385struct kvm_arch{
386 int naliases;
387 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 388
389 unsigned int n_free_mmu_pages;
390 unsigned int n_requested_mmu_pages;
391 unsigned int n_alloc_mmu_pages;
392 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
393 /*
394 * Hash table of struct kvm_mmu_page.
395 */
396 struct list_head active_mmu_pages;
4d5c5d0f 397 struct list_head assigned_dev_head;
19de40a8 398 struct iommu_domain *iommu_domain;
522c68c4 399 int iommu_flags;
d7deeeb0
ZX		 400 struct kvm_pic *vpic;
401 struct kvm_ioapic *vioapic;
7837699f 402 struct kvm_pit *vpit;
564f1537 403 struct hlist_head irq_ack_notifier_list;
cc6e462c 404 int vapics_in_nmi_mode;
bfc6d222 405
bfc6d222
ZX		 406 unsigned int tss_addr;
407 struct page *apic_access_page;
18068523
GOC		 408
409 gpa_t wall_clock;
b7ebfb05
SY		 410
411 struct page *ept_identity_pagetable;
412 bool ept_identity_pagetable_done;
5550af4d
SY		 413
414 unsigned long irq_sources_bitmap;
415 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
53f658b3 416 u64 vm_init_tsc;
d69fb81f
ZX		 417};
418
0711456c
ZX		 419struct kvm_vm_stat {
420 u32 mmu_shadow_zapped;
421 u32 mmu_pte_write;
422 u32 mmu_pte_updated;
423 u32 mmu_pde_zapped;
424 u32 mmu_flooded;
425 u32 mmu_recycled;
dfc5aa00 426 u32 mmu_cache_miss;
4731d4c7 427 u32 mmu_unsync;
0711456c 428 u32 remote_tlb_flush;
05da4558 429 u32 lpages;
0711456c
ZX		 430};
431
77b4c255
ZX		 432struct kvm_vcpu_stat {
433 u32 pf_fixed;
434 u32 pf_guest;
435 u32 tlb_flush;
436 u32 invlpg;
437
438 u32 exits;
439 u32 io_exits;
440 u32 mmio_exits;
441 u32 signal_exits;
442 u32 irq_window_exits;
f08864b4 443 u32 nmi_window_exits;
77b4c255
ZX		 444 u32 halt_exits;
445 u32 halt_wakeup;
446 u32 request_irq_exits;
447 u32 irq_exits;
448 u32 host_state_reload;
449 u32 efer_reload;
450 u32 fpu_reload;
451 u32 insn_emulation;
452 u32 insn_emulation_fail;
f11c3a8d 453 u32 hypercalls;
fa89a817 454 u32 irq_injections;
c4abb7c9 455 u32 nmi_injections;
77b4c255 456};
ad312c7c 457
e01a1b57
HB		 458struct descriptor_table {
459 u16 limit;
460 unsigned long base;
461} __attribute__((packed));
462
ea4a5ff8
ZX		 463struct kvm_x86_ops {
464 int (*cpu_has_kvm_support)(void); /* __init */
465 int (*disabled_by_bios)(void); /* __init */
466 void (*hardware_enable)(void *dummy); /* __init */
467 void (*hardware_disable)(void *dummy);
468 void (*check_processor_compatibility)(void *rtn);
469 int (*hardware_setup)(void); /* __init */
470 void (*hardware_unsetup)(void); /* __exit */
774ead3a 471 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 472
473 /* Create, but do not attach this VCPU */
474 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
475 void (*vcpu_free)(struct kvm_vcpu *vcpu);
476 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
477
478 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
479 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
480 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 481
482 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
d0bfb940 483 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX		 484 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
485 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
486 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
487 void (*get_segment)(struct kvm_vcpu *vcpu,
488 struct kvm_segment *var, int seg);
2e4d2653 489 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 490 void (*set_segment)(struct kvm_vcpu *vcpu,
491 struct kvm_segment *var, int seg);
492 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
493 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
494 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
495 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
496 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
497 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
498 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
499 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
500 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
501 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
502 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
503 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
504 int *exception);
5fdbf976 505 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 506 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
507 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
508
509 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 510
ea4a5ff8
ZX		 511 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
512 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
513 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
2809f5d2
GC		 514 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
515 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
ea4a5ff8
ZX		 516 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
517 unsigned char *hypercall_addr);
66fd3f7f 518 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 519 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da
AK		 520 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
521 bool has_error_code, u32 error_code);
78646121 522 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273
GN		 523 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
524 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
525 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
526 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 527 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 528 int (*get_tdp_level)(void);
4b12f0de 529 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
ea4a5ff8
ZX		 530};
531
97896d04
ZX		 532extern struct kvm_x86_ops *kvm_x86_ops;
533
54f1585a
ZX		 534int kvm_mmu_module_init(void);
535void kvm_mmu_module_exit(void);
536
537void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
538int kvm_mmu_create(struct kvm_vcpu *vcpu);
539int kvm_mmu_setup(struct kvm_vcpu *vcpu);
540void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 541void kvm_mmu_set_base_ptes(u64 base_pte);
542void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 543 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX		 544
545int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
546void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
547void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 548unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 549void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
550
cc4b6871
JR		 551int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
552
3200f405 553int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 554 const void *val, int bytes);
2f333bcb
MT		 555int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
556 gpa_t addr, unsigned long *ret);
4b12f0de 557u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT		 558
559extern bool tdp_enabled;
9f811285 560
54f1585a
ZX		 561enum emulation_result {
562 EMULATE_DONE, /* no further processing */
563 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
564 EMULATE_FAIL, /* can't emulate this instruction */
565};
566
571008da
SY		 567#define EMULTYPE_NO_DECODE (1 << 0)
568#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 569#define EMULTYPE_SKIP (1 << 2)
54f1585a 570int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 571 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 572void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
573void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
574void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
575void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
576 unsigned long *rflags);
577
578unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
579void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
580 unsigned long *rflags);
f2b4b7dd 581void kvm_enable_efer_bits(u64);
54f1585a
ZX		 582int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
583int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
584
585struct x86_emulate_ctxt;
586
587int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
588 int size, unsigned port);
589int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
590 int size, unsigned long count, int down,
591 gva_t address, int rep, unsigned port);
592void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
593int kvm_emulate_halt(struct kvm_vcpu *vcpu);
594int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
595int emulate_clts(struct kvm_vcpu *vcpu);
596int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
597 unsigned long *dest);
598int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
599 unsigned long value);
600
3e6e0aab
GT		 601void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
602int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
603 int type_bits, int seg);
604
37817f29
IE		 605int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
606
2d3ad1f4 607void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 608void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
609void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
610void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 611unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
612void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 613void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
614
615int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
616int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
617
298101da
AK		 618void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
619void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 620void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
621 u32 error_code);
298101da 622
4925663a 623int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 624
3419ffc8
SY		 625void kvm_inject_nmi(struct kvm_vcpu *vcpu);
626
54f1585a
ZX		 627void fx_init(struct kvm_vcpu *vcpu);
628
54f1585a
ZX		 629int emulator_write_emulated(unsigned long addr,
630 const void *val,
631 unsigned int bytes,
632 struct kvm_vcpu *vcpu);
633
634unsigned long segment_base(u16 selector);
635
d835dfec 636void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 637void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 638 const u8 *new, int bytes,
639 bool guest_initiated);
54f1585a
ZX		 640int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
641void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
642int kvm_mmu_load(struct kvm_vcpu *vcpu);
643void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 644void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 645
646int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
647
648int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
649
3067714c 650int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 651void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 652
18552672 653void kvm_enable_tdp(void);
5f4cb662 654void kvm_disable_tdp(void);
18552672 655
a03490ed 656int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 657int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 658
2843099f
IE		 659struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
660
ec6d273d
ZX		 661static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
662{
663 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
664
665 return (struct kvm_mmu_page *)page_private(page);
666}
667
d6e88aec 668static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 669{
670 u16 seg;
671 asm("mov %%fs, %0" : "=g"(seg));
672 return seg;
673}
674
d6e88aec 675static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 676{
677 u16 seg;
678 asm("mov %%gs, %0" : "=g"(seg));
679 return seg;
680}
681
d6e88aec 682static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 683{
684 u16 ldt;
685 asm("sldt %0" : "=g"(ldt));
686 return ldt;
687}
688
d6e88aec 689static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 690{
691 asm("mov %0, %%fs" : : "rm"(sel));
692}
693
d6e88aec 694static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 695{
696 asm("mov %0, %%gs" : : "rm"(sel));
697}
698
d6e88aec 699static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 700{
701 asm("lldt %0" : : "rm"(sel));
702}
ec6d273d 703
d6e88aec 704static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 705{
706 asm("sidt %0" : "=m"(*table));
707}
708
d6e88aec 709static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 710{
711 asm("sgdt %0" : "=m"(*table));
712}
713
d6e88aec 714static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 715{
716 u16 tr;
717 asm("str %0" : "=g"(tr));
718 return segment_base(tr);
719}
720
721#ifdef CONFIG_X86_64
722static inline unsigned long read_msr(unsigned long msr)
723{
724 u64 value;
725
726 rdmsrl(msr, value);
727 return value;
728}
729#endif
730
d6e88aec 731static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 732{
733 asm("fxsave (%0)":: "r" (image));
734}
735
d6e88aec 736static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 737{
738 asm("fxrstor (%0)":: "r" (image));
739}
740
d6e88aec 741static inline void kvm_fx_finit(void)
ec6d273d
ZX		 742{
743 asm("finit");
744}
745
746static inline u32 get_rdx_init_val(void)
747{
748 return 0x600; /* P6 family */
749}
750
c1a5d4f9
AK		 751static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
752{
753 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
754}
755
ec6d273d
ZX		 756#define TSS_IOPB_BASE_OFFSET 0x66
757#define TSS_BASE_SIZE 0x68
758#define TSS_IOPB_SIZE (65536 / 8)
759#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 760#define RMODE_TSS_SIZE \
761 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 762
37817f29
IE		 763enum {
764 TASK_SWITCH_CALL = 0,
765 TASK_SWITCH_IRET = 1,
766 TASK_SWITCH_JMP = 2,
767 TASK_SWITCH_GATE = 3,
768};
769
1371d904 770#define HF_GIF_MASK (1 << 0)
3d6368ef
AG		 771#define HF_HIF_MASK (1 << 1)
772#define HF_VINTR_MASK (1 << 2)
95ba8273 773#define HF_NMI_MASK (1 << 3)
44c11430 774#define HF_IRET_MASK (1 << 4)
1371d904 775
4ecac3fd
AK		 776/*
777 * Hardware virtualization extension instructions may fault if a
778 * reboot turns off virtualization while processes are running.
779 * Trap the fault and ignore the instruction if that happens.
780 */
781asmlinkage void kvm_handle_fault_on_reboot(void);
782
783#define __kvm_handle_fault_on_reboot(insn) \
784 "666: " insn "\n\t" \
18b13e54 785 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 786 "667: \n\t" \
8ceed347 787 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 788 "jmp kvm_handle_fault_on_reboot \n\t" \
789 ".popsection \n\t" \
790 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 791 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 792 ".popsection"
793
e930bffe
AA		 794#define KVM_ARCH_WANT_MMU_NOTIFIER
795int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
796int kvm_age_hva(struct kvm *kvm, unsigned long hva);
82725b20 797int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
e930bffe 798
1965aae3 799#endif /* _ASM_X86_KVM_HOST_H */
Ubuntu Disco kernel mirror for Proxmox VE and PMG