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thp: add pmd paravirt ops
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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
55a6ca25
PA
19#include <asm/x86_init.h>
20
8405b122
JF
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
3cbaeafe 25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
26#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
27
e3ed910d
JF
28extern spinlock_t pgd_lock;
29extern struct list_head pgd_list;
8405b122 30
617d34d9
JF
31extern struct mm_struct *pgd_page_get_mm(struct page *page);
32
54321d94
JF
33#ifdef CONFIG_PARAVIRT
34#include <asm/paravirt.h>
35#else /* !CONFIG_PARAVIRT */
36#define set_pte(ptep, pte) native_set_pte(ptep, pte)
37#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
38
54321d94
JF
39#define set_pte_atomic(ptep, pte) \
40 native_set_pte_atomic(ptep, pte)
41
42#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
43
44#ifndef __PAGETABLE_PUD_FOLDED
45#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
46#define pgd_clear(pgd) native_pgd_clear(pgd)
47#endif
48
49#ifndef set_pud
50# define set_pud(pudp, pud) native_set_pud(pudp, pud)
51#endif
52
53#ifndef __PAGETABLE_PMD_FOLDED
54#define pud_clear(pud) native_pud_clear(pud)
55#endif
56
57#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
58#define pmd_clear(pmd) native_pmd_clear(pmd)
59
60#define pte_update(mm, addr, ptep) do { } while (0)
61#define pte_update_defer(mm, addr, ptep) do { } while (0)
62
54321d94
JF
63#define pgd_val(x) native_pgd_val(x)
64#define __pgd(x) native_make_pgd(x)
65
66#ifndef __PAGETABLE_PUD_FOLDED
67#define pud_val(x) native_pud_val(x)
68#define __pud(x) native_make_pud(x)
69#endif
70
71#ifndef __PAGETABLE_PMD_FOLDED
72#define pmd_val(x) native_pmd_val(x)
73#define __pmd(x) native_make_pmd(x)
74#endif
75
76#define pte_val(x) native_pte_val(x)
77#define __pte(x) native_make_pte(x)
78
224101ed
JF
79#define arch_end_context_switch(prev) do {} while(0)
80
54321d94
JF
81#endif /* CONFIG_PARAVIRT */
82
4614139c
JF
83/*
84 * The following only work if pte_present() is true.
85 * Undefined behaviour if not..
86 */
3cbaeafe
JP
87static inline int pte_dirty(pte_t pte)
88{
a15af1c9 89 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
90}
91
92static inline int pte_young(pte_t pte)
93{
a15af1c9 94 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
95}
96
97static inline int pte_write(pte_t pte)
98{
a15af1c9 99 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
100}
101
102static inline int pte_file(pte_t pte)
103{
a15af1c9 104 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
105}
106
107static inline int pte_huge(pte_t pte)
108{
a15af1c9 109 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
110}
111
3cbaeafe
JP
112static inline int pte_global(pte_t pte)
113{
a15af1c9 114 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
115}
116
117static inline int pte_exec(pte_t pte)
118{
a15af1c9 119 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
120}
121
7e675137
NP
122static inline int pte_special(pte_t pte)
123{
606ee44d 124 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
125}
126
91030ca1
HD
127static inline unsigned long pte_pfn(pte_t pte)
128{
129 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
130}
131
087975b0
AM
132static inline unsigned long pmd_pfn(pmd_t pmd)
133{
134 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
135}
136
91030ca1
HD
137#define pte_page(pte) pfn_to_page(pte_pfn(pte))
138
3cbaeafe
JP
139static inline int pmd_large(pmd_t pte)
140{
18a7a199 141 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3cbaeafe
JP
142 (_PAGE_PSE | _PAGE_PRESENT);
143}
144
6522869c
JF
145static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
146{
147 pteval_t v = native_pte_val(pte);
148
149 return native_make_pte(v | set);
150}
151
152static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
153{
154 pteval_t v = native_pte_val(pte);
155
156 return native_make_pte(v & ~clear);
157}
158
3cbaeafe
JP
159static inline pte_t pte_mkclean(pte_t pte)
160{
6522869c 161 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
162}
163
164static inline pte_t pte_mkold(pte_t pte)
165{
6522869c 166 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
167}
168
169static inline pte_t pte_wrprotect(pte_t pte)
170{
6522869c 171 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
172}
173
174static inline pte_t pte_mkexec(pte_t pte)
175{
6522869c 176 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
177}
178
179static inline pte_t pte_mkdirty(pte_t pte)
180{
6522869c 181 return pte_set_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
182}
183
184static inline pte_t pte_mkyoung(pte_t pte)
185{
6522869c 186 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
187}
188
189static inline pte_t pte_mkwrite(pte_t pte)
190{
6522869c 191 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
192}
193
194static inline pte_t pte_mkhuge(pte_t pte)
195{
6522869c 196 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
197}
198
199static inline pte_t pte_clrhuge(pte_t pte)
200{
6522869c 201 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
202}
203
204static inline pte_t pte_mkglobal(pte_t pte)
205{
6522869c 206 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
207}
208
209static inline pte_t pte_clrglobal(pte_t pte)
210{
6522869c 211 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 212}
4614139c 213
7e675137
NP
214static inline pte_t pte_mkspecial(pte_t pte)
215{
6522869c 216 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
217}
218
b534816b
JF
219/*
220 * Mask out unsupported bits in a present pgprot. Non-present pgprots
221 * can use those bits for other purposes, so leave them be.
222 */
223static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
224{
225 pgprotval_t protval = pgprot_val(pgprot);
226
227 if (protval & _PAGE_PRESENT)
228 protval &= __supported_pte_mask;
229
230 return protval;
231}
232
6fdc05d4
JF
233static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
234{
b534816b
JF
235 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
236 massage_pgprot(pgprot));
6fdc05d4
JF
237}
238
239static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
240{
b534816b
JF
241 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
242 massage_pgprot(pgprot));
6fdc05d4
JF
243}
244
38472311
IM
245static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
246{
247 pteval_t val = pte_val(pte);
248
249 /*
250 * Chop off the NX bit (if present), and add the NX portion of
251 * the newprot (if present):
252 */
1c12c4cf 253 val &= _PAGE_CHG_MASK;
b534816b 254 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
255
256 return __pte(val);
257}
258
1c12c4cf
VP
259/* mprotect needs to preserve PAT bits when updating vm_page_prot */
260#define pgprot_modify pgprot_modify
261static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
262{
263 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
264 pgprotval_t addbits = pgprot_val(newprot);
265 return __pgprot(preservebits | addbits);
266}
267
77be1fab 268#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 269
b534816b 270#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 271
1adcaafe
SS
272static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
273 unsigned long flags,
274 unsigned long new_flags)
afc7d20c 275{
1adcaafe 276 /*
55a6ca25 277 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 278 */
8a271389 279 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
280 return 1;
281
afc7d20c 282 /*
283 * Certain new memtypes are not allowed with certain
284 * requested memtype:
285 * - request is uncached, return cannot be write-back
286 * - request is write-combine, return cannot be write-back
287 */
288 if ((flags == _PAGE_CACHE_UC_MINUS &&
289 new_flags == _PAGE_CACHE_WB) ||
290 (flags == _PAGE_CACHE_WC &&
291 new_flags == _PAGE_CACHE_WB)) {
292 return 0;
293 }
294
295 return 1;
296}
297
458a3e64
TH
298pmd_t *populate_extra_pmd(unsigned long vaddr);
299pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
300#endif /* __ASSEMBLY__ */
301
96a388de
TG
302#ifdef CONFIG_X86_32
303# include "pgtable_32.h"
304#else
305# include "pgtable_64.h"
306#endif
6c386655 307
aca159db 308#ifndef __ASSEMBLY__
f476961c 309#include <linux/mm_types.h>
aca159db 310
a034a010
JF
311static inline int pte_none(pte_t pte)
312{
313 return !pte.pte;
314}
315
8de01da3
JF
316#define __HAVE_ARCH_PTE_SAME
317static inline int pte_same(pte_t a, pte_t b)
318{
319 return a.pte == b.pte;
320}
321
7c683851
JF
322static inline int pte_present(pte_t a)
323{
324 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
325}
326
eb63657e 327static inline int pte_hidden(pte_t pte)
dfec072e 328{
eb63657e 329 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
330}
331
649e8ef6
JF
332static inline int pmd_present(pmd_t pmd)
333{
18a7a199 334 return pmd_flags(pmd) & _PAGE_PRESENT;
649e8ef6
JF
335}
336
4fea801a
JF
337static inline int pmd_none(pmd_t pmd)
338{
339 /* Only check low word on 32-bit platforms, since it might be
340 out of sync with upper half. */
26c8e317 341 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
342}
343
3ffb3564
JF
344static inline unsigned long pmd_page_vaddr(pmd_t pmd)
345{
346 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
347}
348
e5f7f202
IM
349/*
350 * Currently stuck as a macro due to indirect forward reference to
351 * linux/mmzone.h's __section_mem_map_addr() definition:
352 */
353#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
20063ca4 354
e24d7eee
JF
355/*
356 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
357 *
358 * this macro returns the index of the entry in the pmd page which would
359 * control the given virtual address
360 */
ce0c0f9e 361static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
362{
363 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
364}
365
97e2817d
JF
366/*
367 * Conversion functions: convert a page and protection to a page entry,
368 * and a page entry and page directory to the page they refer to.
369 *
370 * (Currently stuck as a macro because of indirect forward reference
371 * to linux/mm.h:page_to_nid())
372 */
373#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
374
346309cf
JF
375/*
376 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
377 *
378 * this function returns the index of the entry in the pte page which would
379 * control the given virtual address
380 */
ce0c0f9e 381static inline unsigned long pte_index(unsigned long address)
346309cf
JF
382{
383 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
384}
385
3fbc2444
JF
386static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
387{
388 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
389}
390
99510238
JF
391static inline int pmd_bad(pmd_t pmd)
392{
18a7a199 393 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
394}
395
cc290ca3
JF
396static inline unsigned long pages_to_mb(unsigned long npg)
397{
398 return npg >> (20 - PAGE_SHIFT);
399}
400
6cf71500
JF
401#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
402 remap_pfn_range(vma, vaddr, pfn, size, prot)
403
5ba7c913 404#if PAGETABLE_LEVELS > 2
deb79cfb
JF
405static inline int pud_none(pud_t pud)
406{
26c8e317 407 return native_pud_val(pud) == 0;
deb79cfb
JF
408}
409
5ba7c913
JF
410static inline int pud_present(pud_t pud)
411{
18a7a199 412 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 413}
6fff47e3
JF
414
415static inline unsigned long pud_page_vaddr(pud_t pud)
416{
417 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
418}
f476961c 419
e5f7f202
IM
420/*
421 * Currently stuck as a macro due to indirect forward reference to
422 * linux/mmzone.h's __section_mem_map_addr() definition:
423 */
424#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
425
426/* Find an entry in the second-level page table.. */
427static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
428{
429 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
430}
3180fba0 431
3f6cbef1
JF
432static inline int pud_large(pud_t pud)
433{
e2f5bda9 434 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
435 (_PAGE_PSE | _PAGE_PRESENT);
436}
a61bb29a
JF
437
438static inline int pud_bad(pud_t pud)
439{
18a7a199 440 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 441}
e2f5bda9
JF
442#else
443static inline int pud_large(pud_t pud)
444{
445 return 0;
446}
5ba7c913
JF
447#endif /* PAGETABLE_LEVELS > 2 */
448
9f38d7e8
JF
449#if PAGETABLE_LEVELS > 3
450static inline int pgd_present(pgd_t pgd)
451{
18a7a199 452 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 453}
c5f040b1
JF
454
455static inline unsigned long pgd_page_vaddr(pgd_t pgd)
456{
457 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
458}
777cba16 459
e5f7f202
IM
460/*
461 * Currently stuck as a macro due to indirect forward reference to
462 * linux/mmzone.h's __section_mem_map_addr() definition:
463 */
464#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
465
466/* to find an entry in a page-table-directory. */
ce0c0f9e 467static inline unsigned long pud_index(unsigned long address)
7cfb8102
JF
468{
469 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
470}
3d081b18
JF
471
472static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
473{
474 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
475}
30f10316
JF
476
477static inline int pgd_bad(pgd_t pgd)
478{
18a7a199 479 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 480}
7325cc2e
JF
481
482static inline int pgd_none(pgd_t pgd)
483{
26c8e317 484 return !native_pgd_val(pgd);
7325cc2e 485}
9f38d7e8
JF
486#endif /* PAGETABLE_LEVELS > 3 */
487
4614139c
JF
488#endif /* __ASSEMBLY__ */
489
fb15a9b3
JF
490/*
491 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
492 *
493 * this macro returns the index of the entry in the pgd page which would
494 * control the given virtual address
495 */
496#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
497
498/*
499 * pgd_offset() returns a (pgd_t *)
500 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
501 */
502#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
503/*
504 * a shortcut which implies the use of the kernel's pgd, instead
505 * of a process's
506 */
507#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
508
509
68db065c
JF
510#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
511#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
512
195466dc
JF
513#ifndef __ASSEMBLY__
514
2c1b284e
JSR
515extern int direct_gbpages;
516
4891645e
JF
517/* local pte updates need not use xchg for locking */
518static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
519{
520 pte_t res = *ptep;
521
522 /* Pure native function needs no input for mm, addr */
523 native_pte_clear(NULL, 0, ptep);
524 return res;
525}
526
527static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
528 pte_t *ptep , pte_t pte)
529{
530 native_set_pte(ptep, pte);
531}
532
0a47de52
AA
533static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
534 pmd_t *pmdp , pmd_t pmd)
535{
536 native_set_pmd(pmdp, pmd);
537}
538
195466dc
JF
539#ifndef CONFIG_PARAVIRT
540/*
541 * Rules for using pte_update - it must be called after any PTE update which
542 * has not been done using the set_pte / clear_pte interfaces. It is used by
543 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
544 * updates should either be sets, clears, or set_pte_atomic for P->P
545 * transitions, which means this hook should only be called for user PTEs.
546 * This hook implies a P->P protection or access change has taken place, which
547 * requires a subsequent TLB flush. The notification can optionally be delayed
548 * until the TLB flush event by using the pte_update_defer form of the
549 * interface, but care must be taken to assure that the flush happens while
550 * still holding the same page table lock so that the shadow and primary pages
551 * do not become out of sync on SMP.
552 */
553#define pte_update(mm, addr, ptep) do { } while (0)
554#define pte_update_defer(mm, addr, ptep) do { } while (0)
555#endif
556
195466dc
JF
557/*
558 * We only update the dirty/accessed state if we set
559 * the dirty bit by hand in the kernel, since the hardware
560 * will do the accessed bit for us, and we don't want to
561 * race with other CPU's that might be updating the dirty
562 * bit at the same time.
563 */
bea41808
JF
564struct vm_area_struct;
565
195466dc 566#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
567extern int ptep_set_access_flags(struct vm_area_struct *vma,
568 unsigned long address, pte_t *ptep,
569 pte_t entry, int dirty);
195466dc
JF
570
571#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
572extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
573 unsigned long addr, pte_t *ptep);
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574
575#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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576extern int ptep_clear_flush_young(struct vm_area_struct *vma,
577 unsigned long address, pte_t *ptep);
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578
579#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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580static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
581 pte_t *ptep)
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582{
583 pte_t pte = native_ptep_get_and_clear(ptep);
584 pte_update(mm, addr, ptep);
585 return pte;
586}
587
588#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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589static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
590 unsigned long addr, pte_t *ptep,
591 int full)
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592{
593 pte_t pte;
594 if (full) {
595 /*
596 * Full address destruction in progress; paravirt does not
597 * care about updates and native needs no locking
598 */
599 pte = native_local_ptep_get_and_clear(ptep);
600 } else {
601 pte = ptep_get_and_clear(mm, addr, ptep);
602 }
603 return pte;
604}
605
606#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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607static inline void ptep_set_wrprotect(struct mm_struct *mm,
608 unsigned long addr, pte_t *ptep)
195466dc 609{
d8d89827 610 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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611 pte_update(mm, addr, ptep);
612}
613
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614#define flush_tlb_fix_spurious_fault(vma, address)
615
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616/*
617 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
618 *
619 * dst - pointer to pgd range anwhere on a pgd page
620 * src - ""
621 * count - the number of pgds to copy.
622 *
623 * dst and src can be on the same page, but the range must not overlap,
624 * and must not cross a page boundary.
625 */
626static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
627{
628 memcpy(dst, src, count * sizeof(pgd_t));
629}
630
631
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632#include <asm-generic/pgtable.h>
633#endif /* __ASSEMBLY__ */
634
1965aae3 635#endif /* _ASM_X86_PGTABLE_H */