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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
55a6ca25
PA
19#include <asm/x86_init.h>
20
8405b122
JF
21/*
22 * ZERO_PAGE is a global shared page that is always zero: used
23 * for zero-mapped memory areas etc..
24 */
3cbaeafe 25extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
26#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
27
e3ed910d
JF
28extern spinlock_t pgd_lock;
29extern struct list_head pgd_list;
8405b122 30
54321d94
JF
31#ifdef CONFIG_PARAVIRT
32#include <asm/paravirt.h>
33#else /* !CONFIG_PARAVIRT */
34#define set_pte(ptep, pte) native_set_pte(ptep, pte)
35#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
36
54321d94
JF
37#define set_pte_atomic(ptep, pte) \
38 native_set_pte_atomic(ptep, pte)
39
40#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
41
42#ifndef __PAGETABLE_PUD_FOLDED
43#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
44#define pgd_clear(pgd) native_pgd_clear(pgd)
45#endif
46
47#ifndef set_pud
48# define set_pud(pudp, pud) native_set_pud(pudp, pud)
49#endif
50
51#ifndef __PAGETABLE_PMD_FOLDED
52#define pud_clear(pud) native_pud_clear(pud)
53#endif
54
55#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
56#define pmd_clear(pmd) native_pmd_clear(pmd)
57
58#define pte_update(mm, addr, ptep) do { } while (0)
59#define pte_update_defer(mm, addr, ptep) do { } while (0)
60
54321d94
JF
61#define pgd_val(x) native_pgd_val(x)
62#define __pgd(x) native_make_pgd(x)
63
64#ifndef __PAGETABLE_PUD_FOLDED
65#define pud_val(x) native_pud_val(x)
66#define __pud(x) native_make_pud(x)
67#endif
68
69#ifndef __PAGETABLE_PMD_FOLDED
70#define pmd_val(x) native_pmd_val(x)
71#define __pmd(x) native_make_pmd(x)
72#endif
73
74#define pte_val(x) native_pte_val(x)
75#define __pte(x) native_make_pte(x)
76
224101ed
JF
77#define arch_end_context_switch(prev) do {} while(0)
78
54321d94
JF
79#endif /* CONFIG_PARAVIRT */
80
4614139c
JF
81/*
82 * The following only work if pte_present() is true.
83 * Undefined behaviour if not..
84 */
3cbaeafe
JP
85static inline int pte_dirty(pte_t pte)
86{
a15af1c9 87 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
88}
89
90static inline int pte_young(pte_t pte)
91{
a15af1c9 92 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
93}
94
95static inline int pte_write(pte_t pte)
96{
a15af1c9 97 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
98}
99
100static inline int pte_file(pte_t pte)
101{
a15af1c9 102 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
103}
104
105static inline int pte_huge(pte_t pte)
106{
a15af1c9 107 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
108}
109
3cbaeafe
JP
110static inline int pte_global(pte_t pte)
111{
a15af1c9 112 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
113}
114
115static inline int pte_exec(pte_t pte)
116{
a15af1c9 117 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
118}
119
7e675137
NP
120static inline int pte_special(pte_t pte)
121{
606ee44d 122 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
123}
124
91030ca1
HD
125static inline unsigned long pte_pfn(pte_t pte)
126{
127 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
128}
129
087975b0
AM
130static inline unsigned long pmd_pfn(pmd_t pmd)
131{
132 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
133}
134
91030ca1
HD
135#define pte_page(pte) pfn_to_page(pte_pfn(pte))
136
3cbaeafe
JP
137static inline int pmd_large(pmd_t pte)
138{
18a7a199 139 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3cbaeafe
JP
140 (_PAGE_PSE | _PAGE_PRESENT);
141}
142
6522869c
JF
143static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
144{
145 pteval_t v = native_pte_val(pte);
146
147 return native_make_pte(v | set);
148}
149
150static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
151{
152 pteval_t v = native_pte_val(pte);
153
154 return native_make_pte(v & ~clear);
155}
156
3cbaeafe
JP
157static inline pte_t pte_mkclean(pte_t pte)
158{
6522869c 159 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
160}
161
162static inline pte_t pte_mkold(pte_t pte)
163{
6522869c 164 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
165}
166
167static inline pte_t pte_wrprotect(pte_t pte)
168{
6522869c 169 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
170}
171
172static inline pte_t pte_mkexec(pte_t pte)
173{
6522869c 174 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
175}
176
177static inline pte_t pte_mkdirty(pte_t pte)
178{
6522869c 179 return pte_set_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
180}
181
182static inline pte_t pte_mkyoung(pte_t pte)
183{
6522869c 184 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
185}
186
187static inline pte_t pte_mkwrite(pte_t pte)
188{
6522869c 189 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
190}
191
192static inline pte_t pte_mkhuge(pte_t pte)
193{
6522869c 194 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
195}
196
197static inline pte_t pte_clrhuge(pte_t pte)
198{
6522869c 199 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
200}
201
202static inline pte_t pte_mkglobal(pte_t pte)
203{
6522869c 204 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
205}
206
207static inline pte_t pte_clrglobal(pte_t pte)
208{
6522869c 209 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 210}
4614139c 211
7e675137
NP
212static inline pte_t pte_mkspecial(pte_t pte)
213{
6522869c 214 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
215}
216
b534816b
JF
217/*
218 * Mask out unsupported bits in a present pgprot. Non-present pgprots
219 * can use those bits for other purposes, so leave them be.
220 */
221static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
222{
223 pgprotval_t protval = pgprot_val(pgprot);
224
225 if (protval & _PAGE_PRESENT)
226 protval &= __supported_pte_mask;
227
228 return protval;
229}
230
6fdc05d4
JF
231static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
232{
b534816b
JF
233 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
234 massage_pgprot(pgprot));
6fdc05d4
JF
235}
236
237static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
238{
b534816b
JF
239 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
240 massage_pgprot(pgprot));
6fdc05d4
JF
241}
242
38472311
IM
243static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
244{
245 pteval_t val = pte_val(pte);
246
247 /*
248 * Chop off the NX bit (if present), and add the NX portion of
249 * the newprot (if present):
250 */
1c12c4cf 251 val &= _PAGE_CHG_MASK;
b534816b 252 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
253
254 return __pte(val);
255}
256
1c12c4cf
VP
257/* mprotect needs to preserve PAT bits when updating vm_page_prot */
258#define pgprot_modify pgprot_modify
259static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
260{
261 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
262 pgprotval_t addbits = pgprot_val(newprot);
263 return __pgprot(preservebits | addbits);
264}
265
77be1fab 266#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 267
b534816b 268#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 269
1adcaafe
SS
270static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
271 unsigned long flags,
272 unsigned long new_flags)
afc7d20c 273{
1adcaafe 274 /*
55a6ca25 275 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 276 */
55a6ca25 277 if (x86_platform.is_untracked_pat_range(paddr, paddr + size - 1))
1adcaafe
SS
278 return 1;
279
afc7d20c 280 /*
281 * Certain new memtypes are not allowed with certain
282 * requested memtype:
283 * - request is uncached, return cannot be write-back
284 * - request is write-combine, return cannot be write-back
285 */
286 if ((flags == _PAGE_CACHE_UC_MINUS &&
287 new_flags == _PAGE_CACHE_WB) ||
288 (flags == _PAGE_CACHE_WC &&
289 new_flags == _PAGE_CACHE_WB)) {
290 return 0;
291 }
292
293 return 1;
294}
295
458a3e64
TH
296pmd_t *populate_extra_pmd(unsigned long vaddr);
297pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
298#endif /* __ASSEMBLY__ */
299
96a388de
TG
300#ifdef CONFIG_X86_32
301# include "pgtable_32.h"
302#else
303# include "pgtable_64.h"
304#endif
6c386655 305
aca159db 306#ifndef __ASSEMBLY__
f476961c 307#include <linux/mm_types.h>
aca159db 308
a034a010
JF
309static inline int pte_none(pte_t pte)
310{
311 return !pte.pte;
312}
313
8de01da3
JF
314#define __HAVE_ARCH_PTE_SAME
315static inline int pte_same(pte_t a, pte_t b)
316{
317 return a.pte == b.pte;
318}
319
7c683851
JF
320static inline int pte_present(pte_t a)
321{
322 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
323}
324
eb63657e 325static inline int pte_hidden(pte_t pte)
dfec072e 326{
eb63657e 327 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
328}
329
649e8ef6
JF
330static inline int pmd_present(pmd_t pmd)
331{
18a7a199 332 return pmd_flags(pmd) & _PAGE_PRESENT;
649e8ef6
JF
333}
334
4fea801a
JF
335static inline int pmd_none(pmd_t pmd)
336{
337 /* Only check low word on 32-bit platforms, since it might be
338 out of sync with upper half. */
26c8e317 339 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
340}
341
3ffb3564
JF
342static inline unsigned long pmd_page_vaddr(pmd_t pmd)
343{
344 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
345}
346
e5f7f202
IM
347/*
348 * Currently stuck as a macro due to indirect forward reference to
349 * linux/mmzone.h's __section_mem_map_addr() definition:
350 */
351#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
20063ca4 352
e24d7eee
JF
353/*
354 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
355 *
356 * this macro returns the index of the entry in the pmd page which would
357 * control the given virtual address
358 */
ce0c0f9e 359static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
360{
361 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
362}
363
97e2817d
JF
364/*
365 * Conversion functions: convert a page and protection to a page entry,
366 * and a page entry and page directory to the page they refer to.
367 *
368 * (Currently stuck as a macro because of indirect forward reference
369 * to linux/mm.h:page_to_nid())
370 */
371#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
372
346309cf
JF
373/*
374 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
375 *
376 * this function returns the index of the entry in the pte page which would
377 * control the given virtual address
378 */
ce0c0f9e 379static inline unsigned long pte_index(unsigned long address)
346309cf
JF
380{
381 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
382}
383
3fbc2444
JF
384static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
385{
386 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
387}
388
99510238
JF
389static inline int pmd_bad(pmd_t pmd)
390{
18a7a199 391 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
392}
393
cc290ca3
JF
394static inline unsigned long pages_to_mb(unsigned long npg)
395{
396 return npg >> (20 - PAGE_SHIFT);
397}
398
6cf71500
JF
399#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
400 remap_pfn_range(vma, vaddr, pfn, size, prot)
401
5ba7c913 402#if PAGETABLE_LEVELS > 2
deb79cfb
JF
403static inline int pud_none(pud_t pud)
404{
26c8e317 405 return native_pud_val(pud) == 0;
deb79cfb
JF
406}
407
5ba7c913
JF
408static inline int pud_present(pud_t pud)
409{
18a7a199 410 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 411}
6fff47e3
JF
412
413static inline unsigned long pud_page_vaddr(pud_t pud)
414{
415 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
416}
f476961c 417
e5f7f202
IM
418/*
419 * Currently stuck as a macro due to indirect forward reference to
420 * linux/mmzone.h's __section_mem_map_addr() definition:
421 */
422#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
423
424/* Find an entry in the second-level page table.. */
425static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
426{
427 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
428}
3180fba0 429
3f6cbef1
JF
430static inline int pud_large(pud_t pud)
431{
e2f5bda9 432 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
433 (_PAGE_PSE | _PAGE_PRESENT);
434}
a61bb29a
JF
435
436static inline int pud_bad(pud_t pud)
437{
18a7a199 438 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 439}
e2f5bda9
JF
440#else
441static inline int pud_large(pud_t pud)
442{
443 return 0;
444}
5ba7c913
JF
445#endif /* PAGETABLE_LEVELS > 2 */
446
9f38d7e8
JF
447#if PAGETABLE_LEVELS > 3
448static inline int pgd_present(pgd_t pgd)
449{
18a7a199 450 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 451}
c5f040b1
JF
452
453static inline unsigned long pgd_page_vaddr(pgd_t pgd)
454{
455 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
456}
777cba16 457
e5f7f202
IM
458/*
459 * Currently stuck as a macro due to indirect forward reference to
460 * linux/mmzone.h's __section_mem_map_addr() definition:
461 */
462#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
463
464/* to find an entry in a page-table-directory. */
ce0c0f9e 465static inline unsigned long pud_index(unsigned long address)
7cfb8102
JF
466{
467 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
468}
3d081b18
JF
469
470static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
471{
472 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
473}
30f10316
JF
474
475static inline int pgd_bad(pgd_t pgd)
476{
18a7a199 477 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 478}
7325cc2e
JF
479
480static inline int pgd_none(pgd_t pgd)
481{
26c8e317 482 return !native_pgd_val(pgd);
7325cc2e 483}
9f38d7e8
JF
484#endif /* PAGETABLE_LEVELS > 3 */
485
4614139c
JF
486#endif /* __ASSEMBLY__ */
487
fb15a9b3
JF
488/*
489 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
490 *
491 * this macro returns the index of the entry in the pgd page which would
492 * control the given virtual address
493 */
494#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
495
496/*
497 * pgd_offset() returns a (pgd_t *)
498 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
499 */
500#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
501/*
502 * a shortcut which implies the use of the kernel's pgd, instead
503 * of a process's
504 */
505#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
506
507
68db065c
JF
508#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
509#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
510
195466dc
JF
511#ifndef __ASSEMBLY__
512
2c1b284e
JSR
513extern int direct_gbpages;
514
4891645e
JF
515/* local pte updates need not use xchg for locking */
516static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
517{
518 pte_t res = *ptep;
519
520 /* Pure native function needs no input for mm, addr */
521 native_pte_clear(NULL, 0, ptep);
522 return res;
523}
524
525static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
526 pte_t *ptep , pte_t pte)
527{
528 native_set_pte(ptep, pte);
529}
530
195466dc
JF
531#ifndef CONFIG_PARAVIRT
532/*
533 * Rules for using pte_update - it must be called after any PTE update which
534 * has not been done using the set_pte / clear_pte interfaces. It is used by
535 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
536 * updates should either be sets, clears, or set_pte_atomic for P->P
537 * transitions, which means this hook should only be called for user PTEs.
538 * This hook implies a P->P protection or access change has taken place, which
539 * requires a subsequent TLB flush. The notification can optionally be delayed
540 * until the TLB flush event by using the pte_update_defer form of the
541 * interface, but care must be taken to assure that the flush happens while
542 * still holding the same page table lock so that the shadow and primary pages
543 * do not become out of sync on SMP.
544 */
545#define pte_update(mm, addr, ptep) do { } while (0)
546#define pte_update_defer(mm, addr, ptep) do { } while (0)
547#endif
548
195466dc
JF
549/*
550 * We only update the dirty/accessed state if we set
551 * the dirty bit by hand in the kernel, since the hardware
552 * will do the accessed bit for us, and we don't want to
553 * race with other CPU's that might be updating the dirty
554 * bit at the same time.
555 */
bea41808
JF
556struct vm_area_struct;
557
195466dc 558#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
559extern int ptep_set_access_flags(struct vm_area_struct *vma,
560 unsigned long address, pte_t *ptep,
561 pte_t entry, int dirty);
195466dc
JF
562
563#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
564extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
565 unsigned long addr, pte_t *ptep);
195466dc
JF
566
567#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
568extern int ptep_clear_flush_young(struct vm_area_struct *vma,
569 unsigned long address, pte_t *ptep);
195466dc
JF
570
571#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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572static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
573 pte_t *ptep)
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574{
575 pte_t pte = native_ptep_get_and_clear(ptep);
576 pte_update(mm, addr, ptep);
577 return pte;
578}
579
580#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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581static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
582 unsigned long addr, pte_t *ptep,
583 int full)
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584{
585 pte_t pte;
586 if (full) {
587 /*
588 * Full address destruction in progress; paravirt does not
589 * care about updates and native needs no locking
590 */
591 pte = native_local_ptep_get_and_clear(ptep);
592 } else {
593 pte = ptep_get_and_clear(mm, addr, ptep);
594 }
595 return pte;
596}
597
598#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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599static inline void ptep_set_wrprotect(struct mm_struct *mm,
600 unsigned long addr, pte_t *ptep)
195466dc 601{
d8d89827 602 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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603 pte_update(mm, addr, ptep);
604}
605
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606/*
607 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
608 *
609 * dst - pointer to pgd range anwhere on a pgd page
610 * src - ""
611 * count - the number of pgds to copy.
612 *
613 * dst and src can be on the same page, but the range must not overlap,
614 * and must not cross a page boundary.
615 */
616static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
617{
618 memcpy(dst, src, count * sizeof(pgd_t));
619}
620
621
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622#include <asm-generic/pgtable.h>
623#endif /* __ASSEMBLY__ */
624
1965aae3 625#endif /* _ASM_X86_PGTABLE_H */