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x86: PAT: implement track/untrack of pfnmap regions for x86 - v3
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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
6c386655
JF
4#define FIRST_USER_ADDRESS 0
5
43cdf5d6
JS
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
6c386655
JF
13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
9bf5a475 15#define _PAGE_BIT_PAT 7 /* on 4KB pages */
6c386655
JF
16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
17#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
be43d728 18#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
6c386655 19#define _PAGE_BIT_UNUSED3 11
9bf5a475 20#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
a0a8f536 21#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
110e0358 22#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
6c386655
JF
23#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
24
4226ab93
JF
25#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
26#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
27#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
28#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
29#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
30#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
31#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
32#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
33#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
34#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
be43d728 35#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
4226ab93
JF
36#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
37#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
38#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
a0a8f536 39#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
110e0358 40#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
a0a8f536 41#define __HAVE_ARCH_PTE_SPECIAL
6c386655
JF
42
43#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
4226ab93 44#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
6c386655 45#else
4226ab93 46#define _PAGE_NX (_AT(pteval_t, 0))
6c386655
JF
47#endif
48
49/* If _PAGE_PRESENT is clear, we use these: */
3cbaeafe
JP
50#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
51 * saved PTE; unset:swap */
6c386655
JF
52#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
53 pte_present gives true */
54
3cbaeafe
JP
55#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
56 _PAGE_ACCESSED | _PAGE_DIRTY)
57#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
58 _PAGE_DIRTY)
6c386655 59
86aaf4fd 60/* Set of bits not changed in pte_modify */
59438c9f 61#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
a0a8f536 62 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
6c386655 63
2e5d9c85 64#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
65#define _PAGE_CACHE_WB (0)
66#define _PAGE_CACHE_WC (_PAGE_PWT)
67#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
68#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
69
6c386655 70#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
3cbaeafe
JP
71#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
72 _PAGE_ACCESSED | _PAGE_NX)
73
74#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
75 _PAGE_USER | _PAGE_ACCESSED)
76#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED)
6c386655 80#define PAGE_COPY PAGE_COPY_NOEXEC
3cbaeafe
JP
81#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
6c386655 85
6c386655 86#define __PAGE_KERNEL_EXEC \
8490638c 87 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
6c386655 88#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
6c386655
JF
89
90#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
91#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
d2e626f4 92#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
b310f381 93#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
6c386655 94#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
d546b67a 95#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
6c386655
JF
96#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
97#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
3a9e189d 99#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
6c386655
JF
100#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
101
be43d728
JF
102#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
103#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
104#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
105#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
106
8490638c
JF
107#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
108#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
109#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
110#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
111#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
112#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
113#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
114#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
115#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
3a9e189d 116#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
8490638c
JF
117#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
118#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
119#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
6c386655 120
be43d728
JF
121#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
122#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
123#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
124#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
125
6c386655
JF
126/* xwr */
127#define __P000 PAGE_NONE
128#define __P001 PAGE_READONLY
129#define __P010 PAGE_COPY
130#define __P011 PAGE_COPY
131#define __P100 PAGE_READONLY_EXEC
132#define __P101 PAGE_READONLY_EXEC
133#define __P110 PAGE_COPY_EXEC
134#define __P111 PAGE_COPY_EXEC
135
136#define __S000 PAGE_NONE
137#define __S001 PAGE_READONLY
138#define __S010 PAGE_SHARED
139#define __S011 PAGE_SHARED
140#define __S100 PAGE_READONLY_EXEC
141#define __S101 PAGE_READONLY_EXEC
142#define __S110 PAGE_SHARED_EXEC
143#define __S111 PAGE_SHARED_EXEC
144
b2bc2731
SS
145/*
146 * early identity mapping pte attrib macros.
147 */
148#ifdef CONFIG_X86_64
149#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
150#else
f61f1b57
SS
151/*
152 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
153 * bits are combined, this will alow user to access the high address mapped
154 * VDSO in the presence of CONFIG_COMPAT_VDSO
155 */
3a85e770 156#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
f61f1b57 157#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
b2bc2731
SS
158#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
159#endif
160
4614139c 161#ifndef __ASSEMBLY__
195466dc 162
8405b122
JF
163/*
164 * ZERO_PAGE is a global shared page that is always zero: used
165 * for zero-mapped memory areas etc..
166 */
3cbaeafe 167extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
168#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
169
e3ed910d
JF
170extern spinlock_t pgd_lock;
171extern struct list_head pgd_list;
8405b122 172
4614139c
JF
173/*
174 * The following only work if pte_present() is true.
175 * Undefined behaviour if not..
176 */
3cbaeafe
JP
177static inline int pte_dirty(pte_t pte)
178{
a15af1c9 179 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
180}
181
182static inline int pte_young(pte_t pte)
183{
a15af1c9 184 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
185}
186
187static inline int pte_write(pte_t pte)
188{
a15af1c9 189 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
190}
191
192static inline int pte_file(pte_t pte)
193{
a15af1c9 194 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
195}
196
197static inline int pte_huge(pte_t pte)
198{
a15af1c9 199 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
200}
201
3cbaeafe
JP
202static inline int pte_global(pte_t pte)
203{
a15af1c9 204 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
205}
206
207static inline int pte_exec(pte_t pte)
208{
a15af1c9 209 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
210}
211
7e675137
NP
212static inline int pte_special(pte_t pte)
213{
606ee44d 214 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
215}
216
91030ca1
HD
217static inline unsigned long pte_pfn(pte_t pte)
218{
219 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
220}
221
5899329b 222static inline u64 pte_pa(pte_t pte)
223{
224 return pte_val(pte) & PTE_PFN_MASK;
225}
226
91030ca1
HD
227#define pte_page(pte) pfn_to_page(pte_pfn(pte))
228
3cbaeafe
JP
229static inline int pmd_large(pmd_t pte)
230{
231 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
232 (_PAGE_PSE | _PAGE_PRESENT);
233}
234
235static inline pte_t pte_mkclean(pte_t pte)
236{
4226ab93 237 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
3cbaeafe
JP
238}
239
240static inline pte_t pte_mkold(pte_t pte)
241{
4226ab93 242 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
3cbaeafe
JP
243}
244
245static inline pte_t pte_wrprotect(pte_t pte)
246{
4226ab93 247 return __pte(pte_val(pte) & ~_PAGE_RW);
3cbaeafe
JP
248}
249
250static inline pte_t pte_mkexec(pte_t pte)
251{
4226ab93 252 return __pte(pte_val(pte) & ~_PAGE_NX);
3cbaeafe
JP
253}
254
255static inline pte_t pte_mkdirty(pte_t pte)
256{
257 return __pte(pte_val(pte) | _PAGE_DIRTY);
258}
259
260static inline pte_t pte_mkyoung(pte_t pte)
261{
262 return __pte(pte_val(pte) | _PAGE_ACCESSED);
263}
264
265static inline pte_t pte_mkwrite(pte_t pte)
266{
267 return __pte(pte_val(pte) | _PAGE_RW);
268}
269
270static inline pte_t pte_mkhuge(pte_t pte)
271{
272 return __pte(pte_val(pte) | _PAGE_PSE);
273}
274
275static inline pte_t pte_clrhuge(pte_t pte)
276{
4226ab93 277 return __pte(pte_val(pte) & ~_PAGE_PSE);
3cbaeafe
JP
278}
279
280static inline pte_t pte_mkglobal(pte_t pte)
281{
282 return __pte(pte_val(pte) | _PAGE_GLOBAL);
283}
284
285static inline pte_t pte_clrglobal(pte_t pte)
286{
4226ab93 287 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
3cbaeafe 288}
4614139c 289
7e675137
NP
290static inline pte_t pte_mkspecial(pte_t pte)
291{
a0a8f536 292 return __pte(pte_val(pte) | _PAGE_SPECIAL);
7e675137
NP
293}
294
6fdc05d4
JF
295extern pteval_t __supported_pte_mask;
296
297static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
298{
299 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
300 pgprot_val(pgprot)) & __supported_pte_mask);
301}
302
303static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
304{
305 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
306 pgprot_val(pgprot)) & __supported_pte_mask);
307}
308
38472311
IM
309static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
310{
311 pteval_t val = pte_val(pte);
312
313 /*
314 * Chop off the NX bit (if present), and add the NX portion of
315 * the newprot (if present):
316 */
1c12c4cf
VP
317 val &= _PAGE_CHG_MASK;
318 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
38472311
IM
319
320 return __pte(val);
321}
322
1c12c4cf
VP
323/* mprotect needs to preserve PAT bits when updating vm_page_prot */
324#define pgprot_modify pgprot_modify
325static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
326{
327 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
328 pgprotval_t addbits = pgprot_val(newprot);
329 return __pgprot(preservebits | addbits);
330}
331
77be1fab 332#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 333
1e8e23bc
AK
334#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
335
5899329b 336/* Indicate that x86 has its own track and untrack pfn vma functions */
337#define track_pfn_vma_new track_pfn_vma_new
338#define track_pfn_vma_copy track_pfn_vma_copy
339#define untrack_pfn_vma untrack_pfn_vma
340
f0970c13 341#ifndef __ASSEMBLY__
342#define __HAVE_PHYS_MEM_ACCESS_PROT
343struct file;
344pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
345 unsigned long size, pgprot_t vma_prot);
346int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
347 unsigned long size, pgprot_t *vma_prot);
348#endif
349
d494a961
JF
350/* Install a pte for a particular vaddr in kernel space. */
351void set_pte_vaddr(unsigned long vaddr, pte_t pte);
352
a312b37b
EH
353#ifdef CONFIG_X86_32
354extern void native_pagetable_setup_start(pgd_t *base);
355extern void native_pagetable_setup_done(pgd_t *base);
356#else
357static inline void native_pagetable_setup_start(pgd_t *base) {}
358static inline void native_pagetable_setup_done(pgd_t *base) {}
359#endif
360
e1759c21
AD
361struct seq_file;
362extern void arch_report_meminfo(struct seq_file *m);
e0b7c819 363
4891645e
JF
364#ifdef CONFIG_PARAVIRT
365#include <asm/paravirt.h>
366#else /* !CONFIG_PARAVIRT */
367#define set_pte(ptep, pte) native_set_pte(ptep, pte)
368#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
369
370#define set_pte_present(mm, addr, ptep, pte) \
371 native_set_pte_present(mm, addr, ptep, pte)
372#define set_pte_atomic(ptep, pte) \
373 native_set_pte_atomic(ptep, pte)
374
375#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
376
377#ifndef __PAGETABLE_PUD_FOLDED
378#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
379#define pgd_clear(pgd) native_pgd_clear(pgd)
380#endif
381
382#ifndef set_pud
383# define set_pud(pudp, pud) native_set_pud(pudp, pud)
384#endif
385
386#ifndef __PAGETABLE_PMD_FOLDED
387#define pud_clear(pud) native_pud_clear(pud)
388#endif
389
390#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
391#define pmd_clear(pmd) native_pmd_clear(pmd)
392
393#define pte_update(mm, addr, ptep) do { } while (0)
394#define pte_update_defer(mm, addr, ptep) do { } while (0)
a312b37b
EH
395
396static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
397{
398 native_pagetable_setup_start(base);
399}
400
401static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
402{
403 native_pagetable_setup_done(base);
404}
4891645e
JF
405#endif /* CONFIG_PARAVIRT */
406
4614139c
JF
407#endif /* __ASSEMBLY__ */
408
96a388de
TG
409#ifdef CONFIG_X86_32
410# include "pgtable_32.h"
411#else
412# include "pgtable_64.h"
413#endif
6c386655 414
fb15a9b3
JF
415/*
416 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
417 *
418 * this macro returns the index of the entry in the pgd page which would
419 * control the given virtual address
420 */
421#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
422
423/*
424 * pgd_offset() returns a (pgd_t *)
425 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
426 */
427#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
428/*
429 * a shortcut which implies the use of the kernel's pgd, instead
430 * of a process's
431 */
432#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
433
434
68db065c
JF
435#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
436#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
437
195466dc
JF
438#ifndef __ASSEMBLY__
439
30551bb3
TG
440enum {
441 PG_LEVEL_NONE,
442 PG_LEVEL_4K,
443 PG_LEVEL_2M,
86f03989 444 PG_LEVEL_1G,
ce0c0e50 445 PG_LEVEL_NUM
30551bb3
TG
446};
447
65280e61
TG
448#ifdef CONFIG_PROC_FS
449extern void update_page_count(int level, unsigned long pages);
450#else
451static inline void update_page_count(int level, unsigned long pages) { }
452#endif
ce0c0e50 453
0a663088
TG
454/*
455 * Helper function that returns the kernel pagetable entry controlling
456 * the virtual address 'address'. NULL means no pagetable entry present.
457 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
458 * as a pte too.
459 */
da7bfc50 460extern pte_t *lookup_address(unsigned long address, unsigned int *level);
0a663088 461
4891645e
JF
462/* local pte updates need not use xchg for locking */
463static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
464{
465 pte_t res = *ptep;
466
467 /* Pure native function needs no input for mm, addr */
468 native_pte_clear(NULL, 0, ptep);
469 return res;
470}
471
472static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
473 pte_t *ptep , pte_t pte)
474{
475 native_set_pte(ptep, pte);
476}
477
195466dc
JF
478#ifndef CONFIG_PARAVIRT
479/*
480 * Rules for using pte_update - it must be called after any PTE update which
481 * has not been done using the set_pte / clear_pte interfaces. It is used by
482 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
483 * updates should either be sets, clears, or set_pte_atomic for P->P
484 * transitions, which means this hook should only be called for user PTEs.
485 * This hook implies a P->P protection or access change has taken place, which
486 * requires a subsequent TLB flush. The notification can optionally be delayed
487 * until the TLB flush event by using the pte_update_defer form of the
488 * interface, but care must be taken to assure that the flush happens while
489 * still holding the same page table lock so that the shadow and primary pages
490 * do not become out of sync on SMP.
491 */
492#define pte_update(mm, addr, ptep) do { } while (0)
493#define pte_update_defer(mm, addr, ptep) do { } while (0)
494#endif
495
195466dc
JF
496/*
497 * We only update the dirty/accessed state if we set
498 * the dirty bit by hand in the kernel, since the hardware
499 * will do the accessed bit for us, and we don't want to
500 * race with other CPU's that might be updating the dirty
501 * bit at the same time.
502 */
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503struct vm_area_struct;
504
195466dc 505#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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506extern int ptep_set_access_flags(struct vm_area_struct *vma,
507 unsigned long address, pte_t *ptep,
508 pte_t entry, int dirty);
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509
510#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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511extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
512 unsigned long addr, pte_t *ptep);
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513
514#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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515extern int ptep_clear_flush_young(struct vm_area_struct *vma,
516 unsigned long address, pte_t *ptep);
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517
518#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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519static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
520 pte_t *ptep)
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521{
522 pte_t pte = native_ptep_get_and_clear(ptep);
523 pte_update(mm, addr, ptep);
524 return pte;
525}
526
527#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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528static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
529 unsigned long addr, pte_t *ptep,
530 int full)
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531{
532 pte_t pte;
533 if (full) {
534 /*
535 * Full address destruction in progress; paravirt does not
536 * care about updates and native needs no locking
537 */
538 pte = native_local_ptep_get_and_clear(ptep);
539 } else {
540 pte = ptep_get_and_clear(mm, addr, ptep);
541 }
542 return pte;
543}
544
545#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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546static inline void ptep_set_wrprotect(struct mm_struct *mm,
547 unsigned long addr, pte_t *ptep)
195466dc 548{
d8d89827 549 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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550 pte_update(mm, addr, ptep);
551}
552
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553/*
554 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
555 *
556 * dst - pointer to pgd range anwhere on a pgd page
557 * src - ""
558 * count - the number of pgds to copy.
559 *
560 * dst and src can be on the same page, but the range must not overlap,
561 * and must not cross a page boundary.
562 */
563static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
564{
565 memcpy(dst, src, count * sizeof(pgd_t));
566}
567
568
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569#include <asm-generic/pgtable.h>
570#endif /* __ASSEMBLY__ */
571
1965aae3 572#endif /* _ASM_X86_PGTABLE_H */