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x86/asm: Fix pud/pmd interfaces to handle large PAT bit
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d
BP
21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
22
8405b122
JF
23/*
24 * ZERO_PAGE is a global shared page that is always zero: used
25 * for zero-mapped memory areas etc..
26 */
277d5b40
AK
27extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
28 __visible;
8405b122
JF
29#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
30
e3ed910d
JF
31extern spinlock_t pgd_lock;
32extern struct list_head pgd_list;
8405b122 33
617d34d9
JF
34extern struct mm_struct *pgd_page_get_mm(struct page *page);
35
54321d94
JF
36#ifdef CONFIG_PARAVIRT
37#include <asm/paravirt.h>
38#else /* !CONFIG_PARAVIRT */
39#define set_pte(ptep, pte) native_set_pte(ptep, pte)
40#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 41#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 42
54321d94
JF
43#define set_pte_atomic(ptep, pte) \
44 native_set_pte_atomic(ptep, pte)
45
46#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
47
48#ifndef __PAGETABLE_PUD_FOLDED
49#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
50#define pgd_clear(pgd) native_pgd_clear(pgd)
51#endif
52
53#ifndef set_pud
54# define set_pud(pudp, pud) native_set_pud(pudp, pud)
55#endif
56
57#ifndef __PAGETABLE_PMD_FOLDED
58#define pud_clear(pud) native_pud_clear(pud)
59#endif
60
61#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
62#define pmd_clear(pmd) native_pmd_clear(pmd)
63
64#define pte_update(mm, addr, ptep) do { } while (0)
65#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
66#define pmd_update(mm, addr, ptep) do { } while (0)
67#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 68
54321d94
JF
69#define pgd_val(x) native_pgd_val(x)
70#define __pgd(x) native_make_pgd(x)
71
72#ifndef __PAGETABLE_PUD_FOLDED
73#define pud_val(x) native_pud_val(x)
74#define __pud(x) native_make_pud(x)
75#endif
76
77#ifndef __PAGETABLE_PMD_FOLDED
78#define pmd_val(x) native_pmd_val(x)
79#define __pmd(x) native_make_pmd(x)
80#endif
81
82#define pte_val(x) native_pte_val(x)
83#define __pte(x) native_make_pte(x)
84
224101ed
JF
85#define arch_end_context_switch(prev) do {} while(0)
86
54321d94
JF
87#endif /* CONFIG_PARAVIRT */
88
4614139c
JF
89/*
90 * The following only work if pte_present() is true.
91 * Undefined behaviour if not..
92 */
3cbaeafe
JP
93static inline int pte_dirty(pte_t pte)
94{
a15af1c9 95 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
96}
97
98static inline int pte_young(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
101}
102
c164e038
KS
103static inline int pmd_dirty(pmd_t pmd)
104{
105 return pmd_flags(pmd) & _PAGE_DIRTY;
106}
3cbaeafe 107
f2d6bfe9
JW
108static inline int pmd_young(pmd_t pmd)
109{
110 return pmd_flags(pmd) & _PAGE_ACCESSED;
111}
112
3cbaeafe
JP
113static inline int pte_write(pte_t pte)
114{
a15af1c9 115 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
116}
117
3cbaeafe
JP
118static inline int pte_huge(pte_t pte)
119{
a15af1c9 120 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
121}
122
3cbaeafe
JP
123static inline int pte_global(pte_t pte)
124{
a15af1c9 125 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
126}
127
128static inline int pte_exec(pte_t pte)
129{
a15af1c9 130 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
131}
132
7e675137
NP
133static inline int pte_special(pte_t pte)
134{
c819f37e 135 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
136}
137
91030ca1
HD
138static inline unsigned long pte_pfn(pte_t pte)
139{
140 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
141}
142
087975b0
AM
143static inline unsigned long pmd_pfn(pmd_t pmd)
144{
f70abb0f 145 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
146}
147
0ee364eb
MG
148static inline unsigned long pud_pfn(pud_t pud)
149{
f70abb0f 150 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
151}
152
91030ca1
HD
153#define pte_page(pte) pfn_to_page(pte_pfn(pte))
154
3cbaeafe
JP
155static inline int pmd_large(pmd_t pte)
156{
027ef6c8 157 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
158}
159
f2d6bfe9
JW
160#ifdef CONFIG_TRANSPARENT_HUGEPAGE
161static inline int pmd_trans_splitting(pmd_t pmd)
162{
163 return pmd_val(pmd) & _PAGE_SPLITTING;
164}
165
166static inline int pmd_trans_huge(pmd_t pmd)
167{
168 return pmd_val(pmd) & _PAGE_PSE;
169}
4b7167b9
AA
170
171static inline int has_transparent_hugepage(void)
172{
173 return cpu_has_pse;
174}
f2d6bfe9
JW
175#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
176
6522869c
JF
177static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
178{
179 pteval_t v = native_pte_val(pte);
180
181 return native_make_pte(v | set);
182}
183
184static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
185{
186 pteval_t v = native_pte_val(pte);
187
188 return native_make_pte(v & ~clear);
189}
190
3cbaeafe
JP
191static inline pte_t pte_mkclean(pte_t pte)
192{
6522869c 193 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
194}
195
196static inline pte_t pte_mkold(pte_t pte)
197{
6522869c 198 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
199}
200
201static inline pte_t pte_wrprotect(pte_t pte)
202{
6522869c 203 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
204}
205
206static inline pte_t pte_mkexec(pte_t pte)
207{
6522869c 208 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
209}
210
211static inline pte_t pte_mkdirty(pte_t pte)
212{
0f8975ec 213 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
214}
215
216static inline pte_t pte_mkyoung(pte_t pte)
217{
6522869c 218 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
219}
220
221static inline pte_t pte_mkwrite(pte_t pte)
222{
6522869c 223 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
224}
225
226static inline pte_t pte_mkhuge(pte_t pte)
227{
6522869c 228 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
229}
230
231static inline pte_t pte_clrhuge(pte_t pte)
232{
6522869c 233 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
234}
235
236static inline pte_t pte_mkglobal(pte_t pte)
237{
6522869c 238 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
239}
240
241static inline pte_t pte_clrglobal(pte_t pte)
242{
6522869c 243 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 244}
4614139c 245
7e675137
NP
246static inline pte_t pte_mkspecial(pte_t pte)
247{
6522869c 248 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
249}
250
f2d6bfe9
JW
251static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
252{
253 pmdval_t v = native_pmd_val(pmd);
254
255 return __pmd(v | set);
256}
257
258static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
259{
260 pmdval_t v = native_pmd_val(pmd);
261
262 return __pmd(v & ~clear);
263}
264
265static inline pmd_t pmd_mkold(pmd_t pmd)
266{
267 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
268}
269
270static inline pmd_t pmd_wrprotect(pmd_t pmd)
271{
272 return pmd_clear_flags(pmd, _PAGE_RW);
273}
274
275static inline pmd_t pmd_mkdirty(pmd_t pmd)
276{
0f8975ec 277 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
278}
279
280static inline pmd_t pmd_mkhuge(pmd_t pmd)
281{
282 return pmd_set_flags(pmd, _PAGE_PSE);
283}
284
285static inline pmd_t pmd_mkyoung(pmd_t pmd)
286{
287 return pmd_set_flags(pmd, _PAGE_ACCESSED);
288}
289
290static inline pmd_t pmd_mkwrite(pmd_t pmd)
291{
292 return pmd_set_flags(pmd, _PAGE_RW);
293}
294
295static inline pmd_t pmd_mknotpresent(pmd_t pmd)
296{
21d9ee3e 297 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
298}
299
2bf01f9f 300#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
301static inline int pte_soft_dirty(pte_t pte)
302{
303 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
304}
305
306static inline int pmd_soft_dirty(pmd_t pmd)
307{
308 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
309}
310
311static inline pte_t pte_mksoft_dirty(pte_t pte)
312{
313 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
314}
315
316static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
317{
318 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
319}
320
2bf01f9f
CG
321#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
322
b534816b
JF
323/*
324 * Mask out unsupported bits in a present pgprot. Non-present pgprots
325 * can use those bits for other purposes, so leave them be.
326 */
327static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
328{
329 pgprotval_t protval = pgprot_val(pgprot);
330
331 if (protval & _PAGE_PRESENT)
332 protval &= __supported_pte_mask;
333
334 return protval;
335}
336
6fdc05d4
JF
337static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
338{
b534816b
JF
339 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
340 massage_pgprot(pgprot));
6fdc05d4
JF
341}
342
343static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
344{
b534816b
JF
345 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
346 massage_pgprot(pgprot));
6fdc05d4
JF
347}
348
38472311
IM
349static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
350{
351 pteval_t val = pte_val(pte);
352
353 /*
354 * Chop off the NX bit (if present), and add the NX portion of
355 * the newprot (if present):
356 */
1c12c4cf 357 val &= _PAGE_CHG_MASK;
b534816b 358 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
359
360 return __pte(val);
361}
362
c489f125
JW
363static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
364{
365 pmdval_t val = pmd_val(pmd);
366
367 val &= _HPAGE_CHG_MASK;
368 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
369
370 return __pmd(val);
371}
372
1c12c4cf
VP
373/* mprotect needs to preserve PAT bits when updating vm_page_prot */
374#define pgprot_modify pgprot_modify
375static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
376{
377 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
378 pgprotval_t addbits = pgprot_val(newprot);
379 return __pgprot(preservebits | addbits);
380}
381
77be1fab 382#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 383
b534816b 384#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 385
1adcaafe 386static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
387 enum page_cache_mode pcm,
388 enum page_cache_mode new_pcm)
afc7d20c 389{
1adcaafe 390 /*
55a6ca25 391 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 392 */
8a271389 393 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
394 return 1;
395
afc7d20c 396 /*
397 * Certain new memtypes are not allowed with certain
398 * requested memtype:
399 * - request is uncached, return cannot be write-back
400 * - request is write-combine, return cannot be write-back
ecb2feba
TK
401 * - request is write-through, return cannot be write-back
402 * - request is write-through, return cannot be write-combine
afc7d20c 403 */
d85f3334
JG
404 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
405 new_pcm == _PAGE_CACHE_MODE_WB) ||
406 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
407 new_pcm == _PAGE_CACHE_MODE_WB) ||
408 (pcm == _PAGE_CACHE_MODE_WT &&
409 new_pcm == _PAGE_CACHE_MODE_WB) ||
410 (pcm == _PAGE_CACHE_MODE_WT &&
411 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 412 return 0;
413 }
414
415 return 1;
416}
417
458a3e64
TH
418pmd_t *populate_extra_pmd(unsigned long vaddr);
419pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
420#endif /* __ASSEMBLY__ */
421
96a388de 422#ifdef CONFIG_X86_32
a1ce3928 423# include <asm/pgtable_32.h>
96a388de 424#else
a1ce3928 425# include <asm/pgtable_64.h>
96a388de 426#endif
6c386655 427
aca159db 428#ifndef __ASSEMBLY__
f476961c 429#include <linux/mm_types.h>
fa0f281c 430#include <linux/mmdebug.h>
4cbeb51b 431#include <linux/log2.h>
aca159db 432
a034a010
JF
433static inline int pte_none(pte_t pte)
434{
435 return !pte.pte;
436}
437
8de01da3
JF
438#define __HAVE_ARCH_PTE_SAME
439static inline int pte_same(pte_t a, pte_t b)
440{
441 return a.pte == b.pte;
442}
443
7c683851 444static inline int pte_present(pte_t a)
c46a7c81
MG
445{
446 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
447}
448
2c3cf556 449#define pte_accessible pte_accessible
20841405 450static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 451{
20841405
RR
452 if (pte_flags(a) & _PAGE_PRESENT)
453 return true;
454
21d9ee3e 455 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
456 mm_tlb_flush_pending(mm))
457 return true;
458
459 return false;
2c3cf556
RR
460}
461
eb63657e 462static inline int pte_hidden(pte_t pte)
dfec072e 463{
eb63657e 464 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
465}
466
649e8ef6
JF
467static inline int pmd_present(pmd_t pmd)
468{
027ef6c8
AA
469 /*
470 * Checking for _PAGE_PSE is needed too because
471 * split_huge_page will temporarily clear the present bit (but
472 * the _PAGE_PSE flag will remain set at all times while the
473 * _PAGE_PRESENT bit is clear).
474 */
21d9ee3e 475 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
476}
477
e7bb4b6d
MG
478#ifdef CONFIG_NUMA_BALANCING
479/*
480 * These work without NUMA balancing but the kernel does not care. See the
481 * comment in include/asm-generic/pgtable.h
482 */
483static inline int pte_protnone(pte_t pte)
484{
e3a1f6ca
DV
485 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
486 == _PAGE_PROTNONE;
e7bb4b6d
MG
487}
488
489static inline int pmd_protnone(pmd_t pmd)
490{
e3a1f6ca
DV
491 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
492 == _PAGE_PROTNONE;
e7bb4b6d
MG
493}
494#endif /* CONFIG_NUMA_BALANCING */
495
4fea801a
JF
496static inline int pmd_none(pmd_t pmd)
497{
498 /* Only check low word on 32-bit platforms, since it might be
499 out of sync with upper half. */
26c8e317 500 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
501}
502
3ffb3564
JF
503static inline unsigned long pmd_page_vaddr(pmd_t pmd)
504{
f70abb0f 505 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
506}
507
e5f7f202
IM
508/*
509 * Currently stuck as a macro due to indirect forward reference to
510 * linux/mmzone.h's __section_mem_map_addr() definition:
511 */
f70abb0f
TK
512#define pmd_page(pmd) \
513 pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
20063ca4 514
e24d7eee
JF
515/*
516 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
517 *
518 * this macro returns the index of the entry in the pmd page which would
519 * control the given virtual address
520 */
ce0c0f9e 521static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
522{
523 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
524}
525
97e2817d
JF
526/*
527 * Conversion functions: convert a page and protection to a page entry,
528 * and a page entry and page directory to the page they refer to.
529 *
530 * (Currently stuck as a macro because of indirect forward reference
531 * to linux/mm.h:page_to_nid())
532 */
533#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
534
346309cf
JF
535/*
536 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
537 *
538 * this function returns the index of the entry in the pte page which would
539 * control the given virtual address
540 */
ce0c0f9e 541static inline unsigned long pte_index(unsigned long address)
346309cf
JF
542{
543 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
544}
545
3fbc2444
JF
546static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
547{
548 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
549}
550
99510238
JF
551static inline int pmd_bad(pmd_t pmd)
552{
18a7a199 553 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
554}
555
cc290ca3
JF
556static inline unsigned long pages_to_mb(unsigned long npg)
557{
558 return npg >> (20 - PAGE_SHIFT);
559}
560
98233368 561#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
562static inline int pud_none(pud_t pud)
563{
26c8e317 564 return native_pud_val(pud) == 0;
deb79cfb
JF
565}
566
5ba7c913
JF
567static inline int pud_present(pud_t pud)
568{
18a7a199 569 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 570}
6fff47e3
JF
571
572static inline unsigned long pud_page_vaddr(pud_t pud)
573{
f70abb0f 574 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 575}
f476961c 576
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577/*
578 * Currently stuck as a macro due to indirect forward reference to
579 * linux/mmzone.h's __section_mem_map_addr() definition:
580 */
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581#define pud_page(pud) \
582 pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
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583
584/* Find an entry in the second-level page table.. */
585static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
586{
587 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
588}
3180fba0 589
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590static inline int pud_large(pud_t pud)
591{
e2f5bda9 592 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
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593 (_PAGE_PSE | _PAGE_PRESENT);
594}
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595
596static inline int pud_bad(pud_t pud)
597{
18a7a199 598 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 599}
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600#else
601static inline int pud_large(pud_t pud)
602{
603 return 0;
604}
98233368 605#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 606
98233368 607#if CONFIG_PGTABLE_LEVELS > 3
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608static inline int pgd_present(pgd_t pgd)
609{
18a7a199 610 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 611}
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612
613static inline unsigned long pgd_page_vaddr(pgd_t pgd)
614{
615 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
616}
777cba16 617
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618/*
619 * Currently stuck as a macro due to indirect forward reference to
620 * linux/mmzone.h's __section_mem_map_addr() definition:
621 */
622#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
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623
624/* to find an entry in a page-table-directory. */
ce0c0f9e 625static inline unsigned long pud_index(unsigned long address)
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626{
627 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
628}
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629
630static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
631{
632 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
633}
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634
635static inline int pgd_bad(pgd_t pgd)
636{
18a7a199 637 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 638}
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639
640static inline int pgd_none(pgd_t pgd)
641{
26c8e317 642 return !native_pgd_val(pgd);
7325cc2e 643}
98233368 644#endif /* CONFIG_PGTABLE_LEVELS > 3 */
9f38d7e8 645
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646#endif /* __ASSEMBLY__ */
647
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648/*
649 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
650 *
651 * this macro returns the index of the entry in the pgd page which would
652 * control the given virtual address
653 */
654#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
655
656/*
657 * pgd_offset() returns a (pgd_t *)
658 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
659 */
660#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
661/*
662 * a shortcut which implies the use of the kernel's pgd, instead
663 * of a process's
664 */
665#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
666
667
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668#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
669#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
670
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671#ifndef __ASSEMBLY__
672
2c1b284e 673extern int direct_gbpages;
22ddfcaa 674void init_mem_mapping(void);
8d57470d 675void early_alloc_pgt_buf(void);
2c1b284e 676
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677/* local pte updates need not use xchg for locking */
678static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
679{
680 pte_t res = *ptep;
681
682 /* Pure native function needs no input for mm, addr */
683 native_pte_clear(NULL, 0, ptep);
684 return res;
685}
686
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687static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
688{
689 pmd_t res = *pmdp;
690
691 native_pmd_clear(pmdp);
692 return res;
693}
694
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695static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
696 pte_t *ptep , pte_t pte)
697{
698 native_set_pte(ptep, pte);
699}
700
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AA
701static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
702 pmd_t *pmdp , pmd_t pmd)
703{
704 native_set_pmd(pmdp, pmd);
705}
706
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707#ifndef CONFIG_PARAVIRT
708/*
709 * Rules for using pte_update - it must be called after any PTE update which
710 * has not been done using the set_pte / clear_pte interfaces. It is used by
711 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
712 * updates should either be sets, clears, or set_pte_atomic for P->P
713 * transitions, which means this hook should only be called for user PTEs.
714 * This hook implies a P->P protection or access change has taken place, which
715 * requires a subsequent TLB flush. The notification can optionally be delayed
716 * until the TLB flush event by using the pte_update_defer form of the
717 * interface, but care must be taken to assure that the flush happens while
718 * still holding the same page table lock so that the shadow and primary pages
719 * do not become out of sync on SMP.
720 */
721#define pte_update(mm, addr, ptep) do { } while (0)
722#define pte_update_defer(mm, addr, ptep) do { } while (0)
723#endif
724
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725/*
726 * We only update the dirty/accessed state if we set
727 * the dirty bit by hand in the kernel, since the hardware
728 * will do the accessed bit for us, and we don't want to
729 * race with other CPU's that might be updating the dirty
730 * bit at the same time.
731 */
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732struct vm_area_struct;
733
195466dc 734#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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JF
735extern int ptep_set_access_flags(struct vm_area_struct *vma,
736 unsigned long address, pte_t *ptep,
737 pte_t entry, int dirty);
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738
739#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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740extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
741 unsigned long addr, pte_t *ptep);
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742
743#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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744extern int ptep_clear_flush_young(struct vm_area_struct *vma,
745 unsigned long address, pte_t *ptep);
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746
747#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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JP
748static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
749 pte_t *ptep)
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JF
750{
751 pte_t pte = native_ptep_get_and_clear(ptep);
752 pte_update(mm, addr, ptep);
753 return pte;
754}
755
756#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
757static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
758 unsigned long addr, pte_t *ptep,
759 int full)
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760{
761 pte_t pte;
762 if (full) {
763 /*
764 * Full address destruction in progress; paravirt does not
765 * care about updates and native needs no locking
766 */
767 pte = native_local_ptep_get_and_clear(ptep);
768 } else {
769 pte = ptep_get_and_clear(mm, addr, ptep);
770 }
771 return pte;
772}
773
774#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
775static inline void ptep_set_wrprotect(struct mm_struct *mm,
776 unsigned long addr, pte_t *ptep)
195466dc 777{
d8d89827 778 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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JF
779 pte_update(mm, addr, ptep);
780}
781
2ac13462 782#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 783
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784#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
785
786#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
787extern int pmdp_set_access_flags(struct vm_area_struct *vma,
788 unsigned long address, pmd_t *pmdp,
789 pmd_t entry, int dirty);
790
791#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
792extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
793 unsigned long addr, pmd_t *pmdp);
794
795#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
796extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
797 unsigned long address, pmd_t *pmdp);
798
799
800#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
801extern void pmdp_splitting_flush(struct vm_area_struct *vma,
802 unsigned long addr, pmd_t *pmdp);
803
804#define __HAVE_ARCH_PMD_WRITE
805static inline int pmd_write(pmd_t pmd)
806{
807 return pmd_flags(pmd) & _PAGE_RW;
808}
809
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AK
810#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
811static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
812 pmd_t *pmdp)
813{
814 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
815 pmd_update(mm, addr, pmdp);
816 return pmd;
817}
818
819#define __HAVE_ARCH_PMDP_SET_WRPROTECT
820static inline void pmdp_set_wrprotect(struct mm_struct *mm,
821 unsigned long addr, pmd_t *pmdp)
822{
823 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
824 pmd_update(mm, addr, pmdp);
825}
826
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JF
827/*
828 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
829 *
830 * dst - pointer to pgd range anwhere on a pgd page
831 * src - ""
832 * count - the number of pgds to copy.
833 *
834 * dst and src can be on the same page, but the range must not overlap,
835 * and must not cross a page boundary.
836 */
837static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
838{
839 memcpy(dst, src, count * sizeof(pgd_t));
840}
841
4cbeb51b
DH
842#define PTE_SHIFT ilog2(PTRS_PER_PTE)
843static inline int page_level_shift(enum pg_level level)
844{
845 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
846}
847static inline unsigned long page_level_size(enum pg_level level)
848{
849 return 1UL << page_level_shift(level);
850}
851static inline unsigned long page_level_mask(enum pg_level level)
852{
853 return ~(page_level_size(level) - 1);
854}
85958b46 855
602e0186
KS
856/*
857 * The x86 doesn't have any external MMU info: the kernel page
858 * tables contain all the necessary information.
859 */
860static inline void update_mmu_cache(struct vm_area_struct *vma,
861 unsigned long addr, pte_t *ptep)
862{
863}
864static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
865 unsigned long addr, pmd_t *pmd)
866{
867}
85958b46 868
2bf01f9f 869#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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CG
870static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
871{
fa0f281c
CG
872 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
873}
874
875static inline int pte_swp_soft_dirty(pte_t pte)
876{
fa0f281c
CG
877 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
878}
879
880static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
881{
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CG
882 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
883}
2bf01f9f 884#endif
fa0f281c 885
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886#include <asm-generic/pgtable.h>
887#endif /* __ASSEMBLY__ */
888
1965aae3 889#endif /* _ASM_X86_PGTABLE_H */