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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
35de5b06
AL
2#ifndef _ASM_X86_TEXT_PATCHING_H
3#define _ASM_X86_TEXT_PATCHING_H
4
5#include <linux/types.h>
6#include <linux/stddef.h>
7#include <asm/ptrace.h>
8
9struct paravirt_patch_site;
10#ifdef CONFIG_PARAVIRT
11void apply_paravirt(struct paravirt_patch_site *start,
12 struct paravirt_patch_site *end);
13#else
14static inline void apply_paravirt(struct paravirt_patch_site *start,
15 struct paravirt_patch_site *end)
16{}
17#define __parainstructions NULL
18#define __parainstructions_end NULL
19#endif
20
21extern void *text_poke_early(void *addr, const void *opcode, size_t len);
22
23/*
24 * Clear and restore the kernel write-protection flag on the local CPU.
25 * Allows the kernel to edit read-only pages.
26 * Side-effect: any interrupt handler running between save and restore will have
27 * the ability to write to read-only pages.
28 *
29 * Warning:
30 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
31 * no thread can be preempted in the instructions being modified (no iret to an
32 * invalid instruction possible) or if the instructions are changed from a
33 * consistent state to another consistent state atomically.
34 * On the local CPU you need to be protected again NMI or MCE handlers seeing an
35 * inconsistent instruction while you patch.
36 */
37extern void *text_poke(void *addr, const void *opcode, size_t len);
38extern int poke_int3_handler(struct pt_regs *regs);
39extern void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler);
40
41#endif /* _ASM_X86_TEXT_PATCHING_H */