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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
c767a54b JP |
12 | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
14 | ||
56dd9470 | 15 | #include <linux/context_tracking.h> |
b5964405 IM |
16 | #include <linux/interrupt.h> |
17 | #include <linux/kallsyms.h> | |
18 | #include <linux/spinlock.h> | |
b5964405 IM |
19 | #include <linux/kprobes.h> |
20 | #include <linux/uaccess.h> | |
b5964405 | 21 | #include <linux/kdebug.h> |
f503b5ae | 22 | #include <linux/kgdb.h> |
1da177e4 | 23 | #include <linux/kernel.h> |
b5964405 IM |
24 | #include <linux/module.h> |
25 | #include <linux/ptrace.h> | |
1da177e4 | 26 | #include <linux/string.h> |
b5964405 | 27 | #include <linux/delay.h> |
1da177e4 | 28 | #include <linux/errno.h> |
b5964405 IM |
29 | #include <linux/kexec.h> |
30 | #include <linux/sched.h> | |
1da177e4 | 31 | #include <linux/timer.h> |
1da177e4 | 32 | #include <linux/init.h> |
91768d6c | 33 | #include <linux/bug.h> |
b5964405 IM |
34 | #include <linux/nmi.h> |
35 | #include <linux/mm.h> | |
c1d518c8 AH |
36 | #include <linux/smp.h> |
37 | #include <linux/io.h> | |
1da177e4 LT |
38 | |
39 | #ifdef CONFIG_EISA | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/eisa.h> | |
42 | #endif | |
43 | ||
c0d12172 DJ |
44 | #if defined(CONFIG_EDAC) |
45 | #include <linux/edac.h> | |
46 | #endif | |
47 | ||
f8561296 | 48 | #include <asm/kmemcheck.h> |
b5964405 | 49 | #include <asm/stacktrace.h> |
1da177e4 | 50 | #include <asm/processor.h> |
1da177e4 | 51 | #include <asm/debugreg.h> |
60063497 | 52 | #include <linux/atomic.h> |
08d636b6 | 53 | #include <asm/ftrace.h> |
c1d518c8 | 54 | #include <asm/traps.h> |
1da177e4 LT |
55 | #include <asm/desc.h> |
56 | #include <asm/i387.h> | |
1361b83a | 57 | #include <asm/fpu-internal.h> |
9e55e44e | 58 | #include <asm/mce.h> |
4eefbe79 | 59 | #include <asm/fixmap.h> |
1164dd00 | 60 | #include <asm/mach_traps.h> |
17f41571 | 61 | #include <asm/alternative.h> |
c1d518c8 | 62 | |
081f75bb | 63 | #ifdef CONFIG_X86_64 |
428cf902 | 64 | #include <asm/x86_init.h> |
081f75bb AH |
65 | #include <asm/pgalloc.h> |
66 | #include <asm/proto.h> | |
4df05f36 KC |
67 | |
68 | /* No need to be aligned, but done to keep all IDTs defined the same way. */ | |
69 | gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss; | |
081f75bb | 70 | #else |
c1d518c8 | 71 | #include <asm/processor-flags.h> |
8e6dafd6 | 72 | #include <asm/setup.h> |
1da177e4 | 73 | |
1da177e4 | 74 | asmlinkage int system_call(void); |
081f75bb | 75 | #endif |
1da177e4 | 76 | |
4df05f36 KC |
77 | /* Must be page-aligned because the real IDT is used in a fixmap. */ |
78 | gate_desc idt_table[NR_VECTORS] __page_aligned_bss; | |
79 | ||
b77b881f YL |
80 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
81 | EXPORT_SYMBOL_GPL(used_vectors); | |
82 | ||
762db434 AH |
83 | static inline void conditional_sti(struct pt_regs *regs) |
84 | { | |
85 | if (regs->flags & X86_EFLAGS_IF) | |
86 | local_irq_enable(); | |
87 | } | |
88 | ||
3d2a71a5 AH |
89 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
90 | { | |
bdb43806 | 91 | preempt_count_inc(); |
3d2a71a5 AH |
92 | if (regs->flags & X86_EFLAGS_IF) |
93 | local_irq_enable(); | |
94 | } | |
95 | ||
be716615 TG |
96 | static inline void conditional_cli(struct pt_regs *regs) |
97 | { | |
98 | if (regs->flags & X86_EFLAGS_IF) | |
99 | local_irq_disable(); | |
100 | } | |
101 | ||
3d2a71a5 AH |
102 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
103 | { | |
104 | if (regs->flags & X86_EFLAGS_IF) | |
105 | local_irq_disable(); | |
bdb43806 | 106 | preempt_count_dec(); |
3d2a71a5 AH |
107 | } |
108 | ||
c416ddf5 FW |
109 | static int __kprobes |
110 | do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, | |
111 | struct pt_regs *regs, long error_code) | |
1da177e4 | 112 | { |
081f75bb | 113 | #ifdef CONFIG_X86_32 |
6b6891f9 | 114 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 | 115 | /* |
c416ddf5 | 116 | * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. |
3c1326f8 AH |
117 | * On nmi (interrupt 2), do_trap should not be called. |
118 | */ | |
c416ddf5 FW |
119 | if (trapnr < X86_TRAP_UD) { |
120 | if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
121 | error_code, trapnr)) | |
122 | return 0; | |
123 | } | |
124 | return -1; | |
1da177e4 | 125 | } |
081f75bb | 126 | #endif |
c416ddf5 FW |
127 | if (!user_mode(regs)) { |
128 | if (!fixup_exception(regs)) { | |
129 | tsk->thread.error_code = error_code; | |
130 | tsk->thread.trap_nr = trapnr; | |
131 | die(str, regs, error_code); | |
132 | } | |
133 | return 0; | |
134 | } | |
1da177e4 | 135 | |
c416ddf5 FW |
136 | return -1; |
137 | } | |
1da177e4 | 138 | |
1c326c4d ON |
139 | static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr, |
140 | siginfo_t *info) | |
958d3d72 ON |
141 | { |
142 | unsigned long siaddr; | |
143 | int sicode; | |
144 | ||
145 | switch (trapnr) { | |
1c326c4d ON |
146 | default: |
147 | return SEND_SIG_PRIV; | |
148 | ||
958d3d72 ON |
149 | case X86_TRAP_DE: |
150 | sicode = FPE_INTDIV; | |
151 | siaddr = regs->ip; | |
152 | break; | |
153 | case X86_TRAP_UD: | |
154 | sicode = ILL_ILLOPN; | |
155 | siaddr = regs->ip; | |
156 | break; | |
157 | case X86_TRAP_AC: | |
158 | sicode = BUS_ADRALN; | |
159 | siaddr = 0; | |
160 | break; | |
161 | } | |
162 | ||
163 | info->si_signo = signr; | |
164 | info->si_errno = 0; | |
165 | info->si_code = sicode; | |
166 | info->si_addr = (void __user *)siaddr; | |
1c326c4d | 167 | return info; |
958d3d72 ON |
168 | } |
169 | ||
c416ddf5 FW |
170 | static void __kprobes |
171 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, | |
172 | long error_code, siginfo_t *info) | |
173 | { | |
174 | struct task_struct *tsk = current; | |
175 | ||
176 | ||
177 | if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) | |
178 | return; | |
b5964405 | 179 | /* |
51e7dc70 | 180 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
181 | * kernelspace faults which result in die(), but not |
182 | * kernelspace faults which are fixed up. die() gives the | |
183 | * process no chance to handle the signal and notice the | |
184 | * kernel fault information, so that won't result in polluting | |
185 | * the information about previously queued, but not yet | |
186 | * delivered, faults. See also do_general_protection below. | |
187 | */ | |
188 | tsk->thread.error_code = error_code; | |
51e7dc70 | 189 | tsk->thread.trap_nr = trapnr; |
d1895183 | 190 | |
081f75bb AH |
191 | #ifdef CONFIG_X86_64 |
192 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
193 | printk_ratelimit()) { | |
c767a54b JP |
194 | pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", |
195 | tsk->comm, tsk->pid, str, | |
196 | regs->ip, regs->sp, error_code); | |
081f75bb | 197 | print_vma_addr(" in ", regs->ip); |
c767a54b | 198 | pr_cont("\n"); |
081f75bb AH |
199 | } |
200 | #endif | |
201 | ||
38cad57b | 202 | force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk); |
1da177e4 LT |
203 | } |
204 | ||
dff0796e | 205 | static void do_error_trap(struct pt_regs *regs, long error_code, char *str, |
1c326c4d | 206 | unsigned long trapnr, int signr) |
dff0796e ON |
207 | { |
208 | enum ctx_state prev_state = exception_enter(); | |
1c326c4d | 209 | siginfo_t info; |
dff0796e ON |
210 | |
211 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) != | |
212 | NOTIFY_STOP) { | |
213 | conditional_sti(regs); | |
1c326c4d ON |
214 | do_trap(trapnr, signr, str, regs, error_code, |
215 | fill_trap_info(regs, signr, trapnr, &info)); | |
dff0796e ON |
216 | } |
217 | ||
218 | exception_exit(prev_state); | |
219 | } | |
220 | ||
b5964405 | 221 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 222 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 | 223 | { \ |
1c326c4d | 224 | do_error_trap(regs, error_code, str, trapnr, signr); \ |
1da177e4 LT |
225 | } |
226 | ||
958d3d72 | 227 | #define DO_ERROR_INFO(trapnr, signr, str, name) \ |
e407d620 | 228 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 | 229 | { \ |
1c326c4d | 230 | do_error_trap(regs, error_code, str, trapnr, signr); \ |
1da177e4 LT |
231 | } |
232 | ||
958d3d72 ON |
233 | DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error) |
234 | DO_ERROR (X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
235 | DO_ERROR (X86_TRAP_BR, SIGSEGV, "bounds", bounds) | |
236 | DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op) | |
237 | DO_ERROR (X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) | |
238 | DO_ERROR (X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
239 | DO_ERROR (X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
081f75bb | 240 | #ifdef CONFIG_X86_32 |
958d3d72 | 241 | DO_ERROR (X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
081f75bb | 242 | #endif |
958d3d72 | 243 | DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check) |
1da177e4 | 244 | |
081f75bb AH |
245 | #ifdef CONFIG_X86_64 |
246 | /* Runs on IST stack */ | |
247 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
248 | { | |
6c1e0256 FW |
249 | enum ctx_state prev_state; |
250 | ||
251 | prev_state = exception_enter(); | |
081f75bb | 252 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, |
6ba3c97a FW |
253 | X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) { |
254 | preempt_conditional_sti(regs); | |
255 | do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL); | |
256 | preempt_conditional_cli(regs); | |
257 | } | |
6c1e0256 | 258 | exception_exit(prev_state); |
081f75bb AH |
259 | } |
260 | ||
261 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
262 | { | |
263 | static const char str[] = "double fault"; | |
264 | struct task_struct *tsk = current; | |
265 | ||
6c1e0256 | 266 | exception_enter(); |
081f75bb | 267 | /* Return not checked because double check cannot be ignored */ |
c9408265 | 268 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
269 | |
270 | tsk->thread.error_code = error_code; | |
51e7dc70 | 271 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 272 | |
4d067d8e BP |
273 | #ifdef CONFIG_DOUBLEFAULT |
274 | df_debug(regs, error_code); | |
275 | #endif | |
bd8b96df IM |
276 | /* |
277 | * This is always a kernel trap and never fixable (and thus must | |
278 | * never return). | |
279 | */ | |
081f75bb AH |
280 | for (;;) |
281 | die(str, regs, error_code); | |
282 | } | |
283 | #endif | |
284 | ||
e407d620 | 285 | dotraplinkage void __kprobes |
13485ab5 | 286 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 287 | { |
13485ab5 | 288 | struct task_struct *tsk; |
6c1e0256 | 289 | enum ctx_state prev_state; |
b5964405 | 290 | |
6c1e0256 | 291 | prev_state = exception_enter(); |
c6df0d71 AH |
292 | conditional_sti(regs); |
293 | ||
081f75bb | 294 | #ifdef CONFIG_X86_32 |
ef3f6288 FW |
295 | if (regs->flags & X86_VM_MASK) { |
296 | local_irq_enable(); | |
297 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
6ba3c97a | 298 | goto exit; |
ef3f6288 | 299 | } |
081f75bb | 300 | #endif |
1da177e4 | 301 | |
13485ab5 | 302 | tsk = current; |
ef3f6288 FW |
303 | if (!user_mode(regs)) { |
304 | if (fixup_exception(regs)) | |
6ba3c97a | 305 | goto exit; |
ef3f6288 FW |
306 | |
307 | tsk->thread.error_code = error_code; | |
308 | tsk->thread.trap_nr = X86_TRAP_GP; | |
6ba3c97a FW |
309 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
310 | X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) | |
ef3f6288 | 311 | die("general protection fault", regs, error_code); |
6ba3c97a | 312 | goto exit; |
ef3f6288 | 313 | } |
1da177e4 | 314 | |
13485ab5 | 315 | tsk->thread.error_code = error_code; |
51e7dc70 | 316 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 317 | |
13485ab5 AH |
318 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
319 | printk_ratelimit()) { | |
c767a54b | 320 | pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", |
13485ab5 AH |
321 | tsk->comm, task_pid_nr(tsk), |
322 | regs->ip, regs->sp, error_code); | |
03252919 | 323 | print_vma_addr(" in ", regs->ip); |
c767a54b | 324 | pr_cont("\n"); |
03252919 | 325 | } |
abd4f750 | 326 | |
38cad57b | 327 | force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); |
6ba3c97a | 328 | exit: |
6c1e0256 | 329 | exception_exit(prev_state); |
1da177e4 LT |
330 | } |
331 | ||
c1d518c8 | 332 | /* May run on IST stack. */ |
08d636b6 | 333 | dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 334 | { |
6c1e0256 FW |
335 | enum ctx_state prev_state; |
336 | ||
08d636b6 | 337 | #ifdef CONFIG_DYNAMIC_FTRACE |
a192cd04 SR |
338 | /* |
339 | * ftrace must be first, everything else may cause a recursive crash. | |
340 | * See note by declaration of modifying_ftrace_code in ftrace.c | |
341 | */ | |
342 | if (unlikely(atomic_read(&modifying_ftrace_code)) && | |
343 | ftrace_int3_handler(regs)) | |
08d636b6 SR |
344 | return; |
345 | #endif | |
17f41571 JK |
346 | if (poke_int3_handler(regs)) |
347 | return; | |
348 | ||
6c1e0256 | 349 | prev_state = exception_enter(); |
f503b5ae | 350 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
351 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
352 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 353 | goto exit; |
f503b5ae | 354 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ |
cc3a1bf5 | 355 | |
c9408265 KC |
356 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
357 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 358 | goto exit; |
b5964405 | 359 | |
42181186 SR |
360 | /* |
361 | * Let others (NMI) know that the debug stack is in use | |
362 | * as we may switch to the interrupt stack. | |
363 | */ | |
364 | debug_stack_usage_inc(); | |
4915a35e | 365 | preempt_conditional_sti(regs); |
c9408265 | 366 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 367 | preempt_conditional_cli(regs); |
42181186 | 368 | debug_stack_usage_dec(); |
6ba3c97a | 369 | exit: |
6c1e0256 | 370 | exception_exit(prev_state); |
1da177e4 | 371 | } |
1da177e4 | 372 | |
081f75bb | 373 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
374 | /* |
375 | * Help handler running on IST stack to switch back to user stack | |
376 | * for scheduling or signal handling. The actual stack switch is done in | |
377 | * entry.S | |
378 | */ | |
081f75bb AH |
379 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
380 | { | |
381 | struct pt_regs *regs = eregs; | |
382 | /* Did already sync */ | |
383 | if (eregs == (struct pt_regs *)eregs->sp) | |
384 | ; | |
385 | /* Exception from user space */ | |
386 | else if (user_mode(eregs)) | |
387 | regs = task_pt_regs(current); | |
bd8b96df IM |
388 | /* |
389 | * Exception from kernel and interrupts are enabled. Move to | |
390 | * kernel process stack. | |
391 | */ | |
081f75bb AH |
392 | else if (eregs->flags & X86_EFLAGS_IF) |
393 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
394 | if (eregs != regs) | |
395 | *regs = *eregs; | |
396 | return regs; | |
397 | } | |
398 | #endif | |
399 | ||
1da177e4 LT |
400 | /* |
401 | * Our handling of the processor debug registers is non-trivial. | |
402 | * We do not clear them on entry and exit from the kernel. Therefore | |
403 | * it is possible to get a watchpoint trap here from inside the kernel. | |
404 | * However, the code in ./ptrace.c has ensured that the user can | |
405 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
406 | * watchpoint trap can only occur in code which is reading/writing | |
407 | * from user space. Such code must not hold kernel locks (since it | |
408 | * can equally take a page fault), therefore it is safe to call | |
409 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 410 | * |
1da177e4 LT |
411 | * Code in ./signal.c ensures that the debug control register |
412 | * is restored before we deliver any signal, and therefore that | |
413 | * user code runs with the correct debug control register even though | |
414 | * we clear it here. | |
415 | * | |
416 | * Being careful here means that we don't have to be as careful in a | |
417 | * lot of more complicated places (task switching can be a bit lazy | |
418 | * about restoring all the debug state, and ptrace doesn't have to | |
419 | * find every occurrence of the TF bit that could be saved away even | |
420 | * by user code) | |
c1d518c8 AH |
421 | * |
422 | * May run on IST stack. | |
1da177e4 | 423 | */ |
e407d620 | 424 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 425 | { |
1da177e4 | 426 | struct task_struct *tsk = current; |
6c1e0256 | 427 | enum ctx_state prev_state; |
a1e80faf | 428 | int user_icebp = 0; |
08d68323 | 429 | unsigned long dr6; |
da654b74 | 430 | int si_code; |
1da177e4 | 431 | |
6c1e0256 | 432 | prev_state = exception_enter(); |
6ba3c97a | 433 | |
08d68323 | 434 | get_debugreg(dr6, 6); |
1da177e4 | 435 | |
40f9249a P |
436 | /* Filter out all the reserved bits which are preset to 1 */ |
437 | dr6 &= ~DR6_RESERVED; | |
438 | ||
a1e80faf FW |
439 | /* |
440 | * If dr6 has no reason to give us about the origin of this trap, | |
441 | * then it's very likely the result of an icebp/int01 trap. | |
442 | * User wants a sigtrap for that. | |
443 | */ | |
444 | if (!dr6 && user_mode(regs)) | |
445 | user_icebp = 1; | |
446 | ||
f8561296 | 447 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 448 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
6ba3c97a | 449 | goto exit; |
f8561296 | 450 | |
08d68323 P |
451 | /* DR6 may or may not be cleared by the CPU */ |
452 | set_debugreg(0, 6); | |
10faa81e | 453 | |
ea8e61b7 PZ |
454 | /* |
455 | * The processor cleared BTF, so don't mark that we need it set. | |
456 | */ | |
457 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
458 | ||
08d68323 P |
459 | /* Store the virtualized DR6 value */ |
460 | tsk->thread.debugreg6 = dr6; | |
461 | ||
5a802e15 | 462 | if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code, |
62edab90 | 463 | SIGTRAP) == NOTIFY_STOP) |
6ba3c97a | 464 | goto exit; |
3d2a71a5 | 465 | |
42181186 SR |
466 | /* |
467 | * Let others (NMI) know that the debug stack is in use | |
468 | * as we may switch to the interrupt stack. | |
469 | */ | |
470 | debug_stack_usage_inc(); | |
471 | ||
1da177e4 | 472 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 473 | preempt_conditional_sti(regs); |
1da177e4 | 474 | |
08d68323 | 475 | if (regs->flags & X86_VM_MASK) { |
c9408265 KC |
476 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
477 | X86_TRAP_DB); | |
6554287b | 478 | preempt_conditional_cli(regs); |
42181186 | 479 | debug_stack_usage_dec(); |
6ba3c97a | 480 | goto exit; |
1da177e4 LT |
481 | } |
482 | ||
1da177e4 | 483 | /* |
08d68323 P |
484 | * Single-stepping through system calls: ignore any exceptions in |
485 | * kernel space, but re-enable TF when returning to user mode. | |
486 | * | |
487 | * We already checked v86 mode above, so we can check for kernel mode | |
488 | * by just checking the CPL of CS. | |
1da177e4 | 489 | */ |
08d68323 P |
490 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
491 | tsk->thread.debugreg6 &= ~DR_STEP; | |
492 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
493 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 494 | } |
08d68323 | 495 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 496 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 497 | send_sigtrap(tsk, regs, error_code, si_code); |
3d2a71a5 | 498 | preempt_conditional_cli(regs); |
42181186 | 499 | debug_stack_usage_dec(); |
1da177e4 | 500 | |
6ba3c97a | 501 | exit: |
6c1e0256 | 502 | exception_exit(prev_state); |
1da177e4 LT |
503 | } |
504 | ||
505 | /* | |
506 | * Note that we play around with the 'TS' bit in an attempt to get | |
507 | * the correct behaviour even in the presence of the asynchronous | |
508 | * IRQ13 behaviour | |
509 | */ | |
5e1b05be | 510 | static void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 511 | { |
e2e75c91 | 512 | struct task_struct *task = current; |
1da177e4 | 513 | siginfo_t info; |
9b6dba9e | 514 | unsigned short err; |
c9408265 KC |
515 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
516 | "simd exception"; | |
e2e75c91 BG |
517 | |
518 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
519 | return; | |
520 | conditional_sti(regs); | |
521 | ||
522 | if (!user_mode_vm(regs)) | |
523 | { | |
524 | if (!fixup_exception(regs)) { | |
525 | task->thread.error_code = error_code; | |
51e7dc70 | 526 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
527 | die(str, regs, error_code); |
528 | } | |
529 | return; | |
530 | } | |
1da177e4 LT |
531 | |
532 | /* | |
533 | * Save the info for the exception handler and clear the error. | |
534 | */ | |
1da177e4 | 535 | save_init_fpu(task); |
51e7dc70 | 536 | task->thread.trap_nr = trapnr; |
9b6dba9e | 537 | task->thread.error_code = error_code; |
1da177e4 LT |
538 | info.si_signo = SIGFPE; |
539 | info.si_errno = 0; | |
9b6dba9e | 540 | info.si_addr = (void __user *)regs->ip; |
c9408265 | 541 | if (trapnr == X86_TRAP_MF) { |
9b6dba9e BG |
542 | unsigned short cwd, swd; |
543 | /* | |
544 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
545 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
546 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
547 | * fault bit. We should only be taking one exception at a time, | |
548 | * so if this combination doesn't produce any single exception, | |
549 | * then we have a bad program that isn't synchronizing its FPU usage | |
550 | * and it will suffer the consequences since we won't be able to | |
551 | * fully reproduce the context of the exception | |
552 | */ | |
553 | cwd = get_fpu_cwd(task); | |
554 | swd = get_fpu_swd(task); | |
adf77bac | 555 | |
9b6dba9e BG |
556 | err = swd & ~cwd; |
557 | } else { | |
558 | /* | |
559 | * The SIMD FPU exceptions are handled a little differently, as there | |
560 | * is only a single status/control register. Thus, to determine which | |
561 | * unmasked exception was caught we must mask the exception mask bits | |
562 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
563 | */ | |
564 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
565 | err = ~(mxcsr >> 7) & mxcsr; | |
566 | } | |
adf77bac PA |
567 | |
568 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
569 | /* |
570 | * swd & 0x240 == 0x040: Stack Underflow | |
571 | * swd & 0x240 == 0x240: Stack Overflow | |
572 | * User must clear the SF bit (0x40) if set | |
573 | */ | |
574 | info.si_code = FPE_FLTINV; | |
adf77bac | 575 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 576 | info.si_code = FPE_FLTDIV; |
adf77bac | 577 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 578 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
579 | } else if (err & 0x012) { /* Denormal, Underflow */ |
580 | info.si_code = FPE_FLTUND; | |
581 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 582 | info.si_code = FPE_FLTRES; |
adf77bac | 583 | } else { |
bd8b96df | 584 | /* |
c9408265 KC |
585 | * If we're using IRQ 13, or supposedly even some trap |
586 | * X86_TRAP_MF implementations, it's possible | |
587 | * we get a spurious trap, which is not an error. | |
bd8b96df | 588 | */ |
c9408265 | 589 | return; |
1da177e4 LT |
590 | } |
591 | force_sig_info(SIGFPE, &info, task); | |
592 | } | |
593 | ||
e407d620 | 594 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 595 | { |
6c1e0256 FW |
596 | enum ctx_state prev_state; |
597 | ||
598 | prev_state = exception_enter(); | |
c9408265 | 599 | math_error(regs, error_code, X86_TRAP_MF); |
6c1e0256 | 600 | exception_exit(prev_state); |
1da177e4 LT |
601 | } |
602 | ||
e407d620 AH |
603 | dotraplinkage void |
604 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 605 | { |
6c1e0256 FW |
606 | enum ctx_state prev_state; |
607 | ||
608 | prev_state = exception_enter(); | |
c9408265 | 609 | math_error(regs, error_code, X86_TRAP_XF); |
6c1e0256 | 610 | exception_exit(prev_state); |
1da177e4 LT |
611 | } |
612 | ||
e407d620 AH |
613 | dotraplinkage void |
614 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 615 | { |
cf81978d | 616 | conditional_sti(regs); |
1da177e4 LT |
617 | #if 0 |
618 | /* No need to warn about this any longer. */ | |
c767a54b | 619 | pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
620 | #endif |
621 | } | |
622 | ||
081f75bb | 623 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 624 | { |
1da177e4 | 625 | } |
4efc0670 | 626 | |
7856f6cc | 627 | asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
628 | { |
629 | } | |
630 | ||
1da177e4 | 631 | /* |
b5964405 | 632 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
633 | * old math state array, and gets the new ones from the current task |
634 | * | |
635 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
636 | * Don't touch unless you *really* know how it works. | |
637 | * | |
be98c2cd LT |
638 | * Must be called with kernel preemption disabled (eg with local |
639 | * local interrupts as in the case of do_device_not_available). | |
1da177e4 | 640 | */ |
be98c2cd | 641 | void math_state_restore(void) |
1da177e4 | 642 | { |
f94edacf | 643 | struct task_struct *tsk = current; |
1da177e4 | 644 | |
aa283f49 SS |
645 | if (!tsk_used_math(tsk)) { |
646 | local_irq_enable(); | |
647 | /* | |
648 | * does a slab alloc which can sleep | |
649 | */ | |
650 | if (init_fpu(tsk)) { | |
651 | /* | |
652 | * ran out of memory! | |
653 | */ | |
654 | do_group_exit(SIGKILL); | |
655 | return; | |
656 | } | |
657 | local_irq_disable(); | |
658 | } | |
659 | ||
f94edacf | 660 | __thread_fpu_begin(tsk); |
304bceda | 661 | |
80ab6f1e LT |
662 | /* |
663 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
664 | */ | |
665 | if (unlikely(restore_fpu_checking(tsk))) { | |
304bceda | 666 | drop_init_fpu(tsk); |
38cad57b | 667 | force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); |
80ab6f1e LT |
668 | return; |
669 | } | |
b3b0870e | 670 | |
c375f15a | 671 | tsk->thread.fpu_counter++; |
1da177e4 | 672 | } |
5992b6da | 673 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 | 674 | |
e407d620 | 675 | dotraplinkage void __kprobes |
aa78bcfa | 676 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 677 | { |
6c1e0256 FW |
678 | enum ctx_state prev_state; |
679 | ||
680 | prev_state = exception_enter(); | |
5d2bd700 | 681 | BUG_ON(use_eager_fpu()); |
304bceda | 682 | |
a334fe43 | 683 | #ifdef CONFIG_MATH_EMULATION |
7643e9b9 | 684 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
685 | struct math_emu_info info = { }; |
686 | ||
7643e9b9 | 687 | conditional_sti(regs); |
d315760f | 688 | |
aa78bcfa | 689 | info.regs = regs; |
d315760f | 690 | math_emulate(&info); |
6c1e0256 | 691 | exception_exit(prev_state); |
a334fe43 | 692 | return; |
7643e9b9 | 693 | } |
a334fe43 BG |
694 | #endif |
695 | math_state_restore(); /* interrupts still off */ | |
696 | #ifdef CONFIG_X86_32 | |
697 | conditional_sti(regs); | |
081f75bb | 698 | #endif |
6c1e0256 | 699 | exception_exit(prev_state); |
7643e9b9 AH |
700 | } |
701 | ||
081f75bb | 702 | #ifdef CONFIG_X86_32 |
e407d620 | 703 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
704 | { |
705 | siginfo_t info; | |
6c1e0256 | 706 | enum ctx_state prev_state; |
6ba3c97a | 707 | |
6c1e0256 | 708 | prev_state = exception_enter(); |
f8e0870f AH |
709 | local_irq_enable(); |
710 | ||
711 | info.si_signo = SIGILL; | |
712 | info.si_errno = 0; | |
713 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 714 | info.si_addr = NULL; |
c9408265 | 715 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
6ba3c97a FW |
716 | X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { |
717 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, | |
718 | &info); | |
719 | } | |
6c1e0256 | 720 | exception_exit(prev_state); |
f8e0870f | 721 | } |
081f75bb | 722 | #endif |
f8e0870f | 723 | |
29c84391 JK |
724 | /* Set of traps needed for early debugging. */ |
725 | void __init early_trap_init(void) | |
726 | { | |
c9408265 | 727 | set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); |
29c84391 | 728 | /* int3 can be called from all */ |
c9408265 | 729 | set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); |
8170e6be | 730 | #ifdef CONFIG_X86_32 |
25c74b10 | 731 | set_intr_gate(X86_TRAP_PF, page_fault); |
8170e6be | 732 | #endif |
29c84391 JK |
733 | load_idt(&idt_descr); |
734 | } | |
735 | ||
8170e6be PA |
736 | void __init early_trap_pf_init(void) |
737 | { | |
738 | #ifdef CONFIG_X86_64 | |
25c74b10 | 739 | set_intr_gate(X86_TRAP_PF, page_fault); |
8170e6be PA |
740 | #endif |
741 | } | |
742 | ||
1da177e4 LT |
743 | void __init trap_init(void) |
744 | { | |
dbeb2be2 RR |
745 | int i; |
746 | ||
1da177e4 | 747 | #ifdef CONFIG_EISA |
927222b1 | 748 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
749 | |
750 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 751 | EISA_bus = 1; |
927222b1 | 752 | early_iounmap(p, 4); |
1da177e4 LT |
753 | #endif |
754 | ||
25c74b10 | 755 | set_intr_gate(X86_TRAP_DE, divide_error); |
c9408265 | 756 | set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); |
699d2937 | 757 | /* int4 can be called from all */ |
c9408265 | 758 | set_system_intr_gate(X86_TRAP_OF, &overflow); |
25c74b10 SA |
759 | set_intr_gate(X86_TRAP_BR, bounds); |
760 | set_intr_gate(X86_TRAP_UD, invalid_op); | |
761 | set_intr_gate(X86_TRAP_NM, device_not_available); | |
081f75bb | 762 | #ifdef CONFIG_X86_32 |
c9408265 | 763 | set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb | 764 | #else |
c9408265 | 765 | set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); |
081f75bb | 766 | #endif |
25c74b10 SA |
767 | set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun); |
768 | set_intr_gate(X86_TRAP_TS, invalid_TSS); | |
769 | set_intr_gate(X86_TRAP_NP, segment_not_present); | |
c9408265 | 770 | set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK); |
25c74b10 SA |
771 | set_intr_gate(X86_TRAP_GP, general_protection); |
772 | set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug); | |
773 | set_intr_gate(X86_TRAP_MF, coprocessor_error); | |
774 | set_intr_gate(X86_TRAP_AC, alignment_check); | |
1da177e4 | 775 | #ifdef CONFIG_X86_MCE |
c9408265 | 776 | set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); |
1da177e4 | 777 | #endif |
25c74b10 | 778 | set_intr_gate(X86_TRAP_XF, simd_coprocessor_error); |
1da177e4 | 779 | |
bb3f0b59 YL |
780 | /* Reserve all the builtin and the syscall vector: */ |
781 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
782 | set_bit(i, used_vectors); | |
783 | ||
081f75bb AH |
784 | #ifdef CONFIG_IA32_EMULATION |
785 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 786 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
787 | #endif |
788 | ||
789 | #ifdef CONFIG_X86_32 | |
699d2937 | 790 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 791 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 792 | #endif |
bb3f0b59 | 793 | |
4eefbe79 KC |
794 | /* |
795 | * Set the IDT descriptor to a fixed read-only location, so that the | |
796 | * "sidt" instruction will not leak the location of the kernel, and | |
797 | * to defend the IDT against arbitrary memory write vulnerabilities. | |
798 | * It will be reloaded in cpu_init() */ | |
799 | __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); | |
800 | idt_descr.address = fix_to_virt(FIX_RO_IDT); | |
801 | ||
1da177e4 | 802 | /* |
b5964405 | 803 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
804 | */ |
805 | cpu_init(); | |
806 | ||
428cf902 | 807 | x86_init.irqs.trap_init(); |
228bdaa9 SR |
808 | |
809 | #ifdef CONFIG_X86_64 | |
629f4f9d | 810 | memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16); |
c9408265 KC |
811 | set_nmi_gate(X86_TRAP_DB, &debug); |
812 | set_nmi_gate(X86_TRAP_BP, &int3); | |
228bdaa9 | 813 | #endif |
1da177e4 | 814 | } |