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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
b5964405
IM
15#include <linux/interrupt.h>
16#include <linux/kallsyms.h>
17#include <linux/spinlock.h>
b5964405
IM
18#include <linux/kprobes.h>
19#include <linux/uaccess.h>
b5964405 20#include <linux/kdebug.h>
f503b5ae 21#include <linux/kgdb.h>
1da177e4 22#include <linux/kernel.h>
b5964405
IM
23#include <linux/module.h>
24#include <linux/ptrace.h>
1da177e4 25#include <linux/string.h>
b5964405 26#include <linux/delay.h>
1da177e4 27#include <linux/errno.h>
b5964405
IM
28#include <linux/kexec.h>
29#include <linux/sched.h>
1da177e4 30#include <linux/timer.h>
1da177e4 31#include <linux/init.h>
91768d6c 32#include <linux/bug.h>
b5964405
IM
33#include <linux/nmi.h>
34#include <linux/mm.h>
c1d518c8
AH
35#include <linux/smp.h>
36#include <linux/io.h>
1da177e4
LT
37
38#ifdef CONFIG_EISA
39#include <linux/ioport.h>
40#include <linux/eisa.h>
41#endif
42
c0d12172
DJ
43#if defined(CONFIG_EDAC)
44#include <linux/edac.h>
45#endif
46
f8561296 47#include <asm/kmemcheck.h>
b5964405 48#include <asm/stacktrace.h>
1da177e4 49#include <asm/processor.h>
1da177e4 50#include <asm/debugreg.h>
60063497 51#include <linux/atomic.h>
08d636b6 52#include <asm/ftrace.h>
c1d518c8 53#include <asm/traps.h>
1da177e4
LT
54#include <asm/desc.h>
55#include <asm/i387.h>
1361b83a 56#include <asm/fpu-internal.h>
9e55e44e 57#include <asm/mce.h>
91d1aa43 58#include <asm/context_tracking.h>
c1d518c8 59
1164dd00 60#include <asm/mach_traps.h>
c1d518c8 61
081f75bb 62#ifdef CONFIG_X86_64
428cf902 63#include <asm/x86_init.h>
081f75bb
AH
64#include <asm/pgalloc.h>
65#include <asm/proto.h>
081f75bb 66#else
c1d518c8 67#include <asm/processor-flags.h>
8e6dafd6 68#include <asm/setup.h>
1da177e4 69
1da177e4
LT
70asmlinkage int system_call(void);
71
1da177e4
LT
72/*
73 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 74 * F0 0F bug workaround.
1da177e4 75 */
07e81d61 76gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 77#endif
1da177e4 78
b77b881f
YL
79DECLARE_BITMAP(used_vectors, NR_VECTORS);
80EXPORT_SYMBOL_GPL(used_vectors);
81
762db434
AH
82static inline void conditional_sti(struct pt_regs *regs)
83{
84 if (regs->flags & X86_EFLAGS_IF)
85 local_irq_enable();
86}
87
3d2a71a5
AH
88static inline void preempt_conditional_sti(struct pt_regs *regs)
89{
90 inc_preempt_count();
91 if (regs->flags & X86_EFLAGS_IF)
92 local_irq_enable();
93}
94
be716615
TG
95static inline void conditional_cli(struct pt_regs *regs)
96{
97 if (regs->flags & X86_EFLAGS_IF)
98 local_irq_disable();
99}
100
3d2a71a5
AH
101static inline void preempt_conditional_cli(struct pt_regs *regs)
102{
103 if (regs->flags & X86_EFLAGS_IF)
104 local_irq_disable();
105 dec_preempt_count();
106}
107
c416ddf5
FW
108static int __kprobes
109do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
110 struct pt_regs *regs, long error_code)
1da177e4 111{
081f75bb 112#ifdef CONFIG_X86_32
6b6891f9 113 if (regs->flags & X86_VM_MASK) {
3c1326f8 114 /*
c416ddf5 115 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
116 * On nmi (interrupt 2), do_trap should not be called.
117 */
c416ddf5
FW
118 if (trapnr < X86_TRAP_UD) {
119 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
120 error_code, trapnr))
121 return 0;
122 }
123 return -1;
1da177e4 124 }
081f75bb 125#endif
c416ddf5
FW
126 if (!user_mode(regs)) {
127 if (!fixup_exception(regs)) {
128 tsk->thread.error_code = error_code;
129 tsk->thread.trap_nr = trapnr;
130 die(str, regs, error_code);
131 }
132 return 0;
133 }
1da177e4 134
c416ddf5
FW
135 return -1;
136}
1da177e4 137
c416ddf5
FW
138static void __kprobes
139do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
140 long error_code, siginfo_t *info)
141{
142 struct task_struct *tsk = current;
143
144
145 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
146 return;
b5964405 147 /*
51e7dc70 148 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
149 * kernelspace faults which result in die(), but not
150 * kernelspace faults which are fixed up. die() gives the
151 * process no chance to handle the signal and notice the
152 * kernel fault information, so that won't result in polluting
153 * the information about previously queued, but not yet
154 * delivered, faults. See also do_general_protection below.
155 */
156 tsk->thread.error_code = error_code;
51e7dc70 157 tsk->thread.trap_nr = trapnr;
d1895183 158
081f75bb
AH
159#ifdef CONFIG_X86_64
160 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
161 printk_ratelimit()) {
c767a54b
JP
162 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
163 tsk->comm, tsk->pid, str,
164 regs->ip, regs->sp, error_code);
081f75bb 165 print_vma_addr(" in ", regs->ip);
c767a54b 166 pr_cont("\n");
081f75bb
AH
167 }
168#endif
169
b5964405
IM
170 if (info)
171 force_sig_info(signr, info, tsk);
172 else
173 force_sig(signr, tsk);
1da177e4
LT
174}
175
b5964405 176#define DO_ERROR(trapnr, signr, str, name) \
e407d620 177dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 178{ \
6ba3c97a
FW
179 exception_enter(regs); \
180 if (notify_die(DIE_TRAP, str, regs, error_code, \
181 trapnr, signr) == NOTIFY_STOP) { \
182 exception_exit(regs); \
b5964405 183 return; \
6ba3c97a 184 } \
61aef7d2 185 conditional_sti(regs); \
3c1326f8 186 do_trap(trapnr, signr, str, regs, error_code, NULL); \
6ba3c97a 187 exception_exit(regs); \
1da177e4
LT
188}
189
3c1326f8 190#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 191dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
192{ \
193 siginfo_t info; \
194 info.si_signo = signr; \
195 info.si_errno = 0; \
196 info.si_code = sicode; \
197 info.si_addr = (void __user *)siaddr; \
6ba3c97a
FW
198 exception_enter(regs); \
199 if (notify_die(DIE_TRAP, str, regs, error_code, \
200 trapnr, signr) == NOTIFY_STOP) { \
201 exception_exit(regs); \
b5964405 202 return; \
6ba3c97a 203 } \
61aef7d2 204 conditional_sti(regs); \
3c1326f8 205 do_trap(trapnr, signr, str, regs, error_code, &info); \
6ba3c97a 206 exception_exit(regs); \
1da177e4
LT
207}
208
c9408265
KC
209DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV,
210 regs->ip)
211DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
212DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds)
213DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN,
214 regs->ip)
215DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",
216 coprocessor_segment_overrun)
217DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
218DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
081f75bb 219#ifdef CONFIG_X86_32
c9408265 220DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
081f75bb 221#endif
c9408265
KC
222DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check,
223 BUS_ADRALN, 0)
1da177e4 224
081f75bb
AH
225#ifdef CONFIG_X86_64
226/* Runs on IST stack */
227dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
228{
6ba3c97a 229 exception_enter(regs);
081f75bb 230 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
6ba3c97a
FW
231 X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) {
232 preempt_conditional_sti(regs);
233 do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL);
234 preempt_conditional_cli(regs);
235 }
236 exception_exit(regs);
081f75bb
AH
237}
238
239dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
240{
241 static const char str[] = "double fault";
242 struct task_struct *tsk = current;
243
6ba3c97a 244 exception_enter(regs);
081f75bb 245 /* Return not checked because double check cannot be ignored */
c9408265 246 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
247
248 tsk->thread.error_code = error_code;
51e7dc70 249 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 250
bd8b96df
IM
251 /*
252 * This is always a kernel trap and never fixable (and thus must
253 * never return).
254 */
081f75bb
AH
255 for (;;)
256 die(str, regs, error_code);
257}
258#endif
259
e407d620 260dotraplinkage void __kprobes
13485ab5 261do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 262{
13485ab5 263 struct task_struct *tsk;
b5964405 264
6ba3c97a 265 exception_enter(regs);
c6df0d71
AH
266 conditional_sti(regs);
267
081f75bb 268#ifdef CONFIG_X86_32
ef3f6288
FW
269 if (regs->flags & X86_VM_MASK) {
270 local_irq_enable();
271 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
6ba3c97a 272 goto exit;
ef3f6288 273 }
081f75bb 274#endif
1da177e4 275
13485ab5 276 tsk = current;
ef3f6288
FW
277 if (!user_mode(regs)) {
278 if (fixup_exception(regs))
6ba3c97a 279 goto exit;
ef3f6288
FW
280
281 tsk->thread.error_code = error_code;
282 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
283 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
284 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 285 die("general protection fault", regs, error_code);
6ba3c97a 286 goto exit;
ef3f6288 287 }
1da177e4 288
13485ab5 289 tsk->thread.error_code = error_code;
51e7dc70 290 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 291
13485ab5
AH
292 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
293 printk_ratelimit()) {
c767a54b 294 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
295 tsk->comm, task_pid_nr(tsk),
296 regs->ip, regs->sp, error_code);
03252919 297 print_vma_addr(" in ", regs->ip);
c767a54b 298 pr_cont("\n");
03252919 299 }
abd4f750 300
13485ab5 301 force_sig(SIGSEGV, tsk);
6ba3c97a
FW
302exit:
303 exception_exit(regs);
1da177e4
LT
304}
305
c1d518c8 306/* May run on IST stack. */
08d636b6 307dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 308{
08d636b6 309#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
310 /*
311 * ftrace must be first, everything else may cause a recursive crash.
312 * See note by declaration of modifying_ftrace_code in ftrace.c
313 */
314 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
315 ftrace_int3_handler(regs))
08d636b6
SR
316 return;
317#endif
6ba3c97a 318 exception_enter(regs);
f503b5ae 319#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
320 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
321 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 322 goto exit;
f503b5ae 323#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 324
c9408265
KC
325 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
326 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 327 goto exit;
b5964405 328
42181186
SR
329 /*
330 * Let others (NMI) know that the debug stack is in use
331 * as we may switch to the interrupt stack.
332 */
333 debug_stack_usage_inc();
4915a35e 334 preempt_conditional_sti(regs);
c9408265 335 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 336 preempt_conditional_cli(regs);
42181186 337 debug_stack_usage_dec();
6ba3c97a
FW
338exit:
339 exception_exit(regs);
1da177e4 340}
1da177e4 341
081f75bb 342#ifdef CONFIG_X86_64
bd8b96df
IM
343/*
344 * Help handler running on IST stack to switch back to user stack
345 * for scheduling or signal handling. The actual stack switch is done in
346 * entry.S
347 */
081f75bb
AH
348asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
349{
350 struct pt_regs *regs = eregs;
351 /* Did already sync */
352 if (eregs == (struct pt_regs *)eregs->sp)
353 ;
354 /* Exception from user space */
355 else if (user_mode(eregs))
356 regs = task_pt_regs(current);
bd8b96df
IM
357 /*
358 * Exception from kernel and interrupts are enabled. Move to
359 * kernel process stack.
360 */
081f75bb
AH
361 else if (eregs->flags & X86_EFLAGS_IF)
362 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
363 if (eregs != regs)
364 *regs = *eregs;
365 return regs;
366}
367#endif
368
1da177e4
LT
369/*
370 * Our handling of the processor debug registers is non-trivial.
371 * We do not clear them on entry and exit from the kernel. Therefore
372 * it is possible to get a watchpoint trap here from inside the kernel.
373 * However, the code in ./ptrace.c has ensured that the user can
374 * only set watchpoints on userspace addresses. Therefore the in-kernel
375 * watchpoint trap can only occur in code which is reading/writing
376 * from user space. Such code must not hold kernel locks (since it
377 * can equally take a page fault), therefore it is safe to call
378 * force_sig_info even though that claims and releases locks.
b5964405 379 *
1da177e4
LT
380 * Code in ./signal.c ensures that the debug control register
381 * is restored before we deliver any signal, and therefore that
382 * user code runs with the correct debug control register even though
383 * we clear it here.
384 *
385 * Being careful here means that we don't have to be as careful in a
386 * lot of more complicated places (task switching can be a bit lazy
387 * about restoring all the debug state, and ptrace doesn't have to
388 * find every occurrence of the TF bit that could be saved away even
389 * by user code)
c1d518c8
AH
390 *
391 * May run on IST stack.
1da177e4 392 */
e407d620 393dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 394{
1da177e4 395 struct task_struct *tsk = current;
a1e80faf 396 int user_icebp = 0;
08d68323 397 unsigned long dr6;
da654b74 398 int si_code;
1da177e4 399
6ba3c97a
FW
400 exception_enter(regs);
401
08d68323 402 get_debugreg(dr6, 6);
1da177e4 403
40f9249a
P
404 /* Filter out all the reserved bits which are preset to 1 */
405 dr6 &= ~DR6_RESERVED;
406
a1e80faf
FW
407 /*
408 * If dr6 has no reason to give us about the origin of this trap,
409 * then it's very likely the result of an icebp/int01 trap.
410 * User wants a sigtrap for that.
411 */
412 if (!dr6 && user_mode(regs))
413 user_icebp = 1;
414
f8561296 415 /* Catch kmemcheck conditions first of all! */
eadb8a09 416 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 417 goto exit;
f8561296 418
08d68323
P
419 /* DR6 may or may not be cleared by the CPU */
420 set_debugreg(0, 6);
10faa81e 421
ea8e61b7
PZ
422 /*
423 * The processor cleared BTF, so don't mark that we need it set.
424 */
425 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
426
08d68323
P
427 /* Store the virtualized DR6 value */
428 tsk->thread.debugreg6 = dr6;
429
62edab90
P
430 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
431 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 432 goto exit;
3d2a71a5 433
42181186
SR
434 /*
435 * Let others (NMI) know that the debug stack is in use
436 * as we may switch to the interrupt stack.
437 */
438 debug_stack_usage_inc();
439
1da177e4 440 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 441 preempt_conditional_sti(regs);
1da177e4 442
08d68323 443 if (regs->flags & X86_VM_MASK) {
c9408265
KC
444 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
445 X86_TRAP_DB);
6554287b 446 preempt_conditional_cli(regs);
42181186 447 debug_stack_usage_dec();
6ba3c97a 448 goto exit;
1da177e4
LT
449 }
450
1da177e4 451 /*
08d68323
P
452 * Single-stepping through system calls: ignore any exceptions in
453 * kernel space, but re-enable TF when returning to user mode.
454 *
455 * We already checked v86 mode above, so we can check for kernel mode
456 * by just checking the CPL of CS.
1da177e4 457 */
08d68323
P
458 if ((dr6 & DR_STEP) && !user_mode(regs)) {
459 tsk->thread.debugreg6 &= ~DR_STEP;
460 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
461 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 462 }
08d68323 463 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 464 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 465 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 466 preempt_conditional_cli(regs);
42181186 467 debug_stack_usage_dec();
1da177e4 468
6ba3c97a
FW
469exit:
470 exception_exit(regs);
1da177e4
LT
471}
472
473/*
474 * Note that we play around with the 'TS' bit in an attempt to get
475 * the correct behaviour even in the presence of the asynchronous
476 * IRQ13 behaviour
477 */
9b6dba9e 478void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 479{
e2e75c91 480 struct task_struct *task = current;
1da177e4 481 siginfo_t info;
9b6dba9e 482 unsigned short err;
c9408265
KC
483 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
484 "simd exception";
e2e75c91
BG
485
486 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
487 return;
488 conditional_sti(regs);
489
490 if (!user_mode_vm(regs))
491 {
492 if (!fixup_exception(regs)) {
493 task->thread.error_code = error_code;
51e7dc70 494 task->thread.trap_nr = trapnr;
e2e75c91
BG
495 die(str, regs, error_code);
496 }
497 return;
498 }
1da177e4
LT
499
500 /*
501 * Save the info for the exception handler and clear the error.
502 */
1da177e4 503 save_init_fpu(task);
51e7dc70 504 task->thread.trap_nr = trapnr;
9b6dba9e 505 task->thread.error_code = error_code;
1da177e4
LT
506 info.si_signo = SIGFPE;
507 info.si_errno = 0;
9b6dba9e 508 info.si_addr = (void __user *)regs->ip;
c9408265 509 if (trapnr == X86_TRAP_MF) {
9b6dba9e
BG
510 unsigned short cwd, swd;
511 /*
512 * (~cwd & swd) will mask out exceptions that are not set to unmasked
513 * status. 0x3f is the exception bits in these regs, 0x200 is the
514 * C1 reg you need in case of a stack fault, 0x040 is the stack
515 * fault bit. We should only be taking one exception at a time,
516 * so if this combination doesn't produce any single exception,
517 * then we have a bad program that isn't synchronizing its FPU usage
518 * and it will suffer the consequences since we won't be able to
519 * fully reproduce the context of the exception
520 */
521 cwd = get_fpu_cwd(task);
522 swd = get_fpu_swd(task);
adf77bac 523
9b6dba9e
BG
524 err = swd & ~cwd;
525 } else {
526 /*
527 * The SIMD FPU exceptions are handled a little differently, as there
528 * is only a single status/control register. Thus, to determine which
529 * unmasked exception was caught we must mask the exception mask bits
530 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
531 */
532 unsigned short mxcsr = get_fpu_mxcsr(task);
533 err = ~(mxcsr >> 7) & mxcsr;
534 }
adf77bac
PA
535
536 if (err & 0x001) { /* Invalid op */
b5964405
IM
537 /*
538 * swd & 0x240 == 0x040: Stack Underflow
539 * swd & 0x240 == 0x240: Stack Overflow
540 * User must clear the SF bit (0x40) if set
541 */
542 info.si_code = FPE_FLTINV;
adf77bac 543 } else if (err & 0x004) { /* Divide by Zero */
b5964405 544 info.si_code = FPE_FLTDIV;
adf77bac 545 } else if (err & 0x008) { /* Overflow */
b5964405 546 info.si_code = FPE_FLTOVF;
adf77bac
PA
547 } else if (err & 0x012) { /* Denormal, Underflow */
548 info.si_code = FPE_FLTUND;
549 } else if (err & 0x020) { /* Precision */
b5964405 550 info.si_code = FPE_FLTRES;
adf77bac 551 } else {
bd8b96df 552 /*
c9408265
KC
553 * If we're using IRQ 13, or supposedly even some trap
554 * X86_TRAP_MF implementations, it's possible
555 * we get a spurious trap, which is not an error.
bd8b96df 556 */
c9408265 557 return;
1da177e4
LT
558 }
559 force_sig_info(SIGFPE, &info, task);
560}
561
e407d620 562dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 563{
6ba3c97a 564 exception_enter(regs);
c9408265 565 math_error(regs, error_code, X86_TRAP_MF);
6ba3c97a 566 exception_exit(regs);
1da177e4
LT
567}
568
e407d620
AH
569dotraplinkage void
570do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 571{
6ba3c97a 572 exception_enter(regs);
c9408265 573 math_error(regs, error_code, X86_TRAP_XF);
6ba3c97a 574 exception_exit(regs);
1da177e4
LT
575}
576
e407d620
AH
577dotraplinkage void
578do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 579{
cf81978d 580 conditional_sti(regs);
1da177e4
LT
581#if 0
582 /* No need to warn about this any longer. */
c767a54b 583 pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
584#endif
585}
586
081f75bb 587asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 588{
1da177e4 589}
4efc0670 590
7856f6cc 591asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
592{
593}
594
1da177e4 595/*
b5964405 596 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
597 * old math state array, and gets the new ones from the current task
598 *
599 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
600 * Don't touch unless you *really* know how it works.
601 *
be98c2cd
LT
602 * Must be called with kernel preemption disabled (eg with local
603 * local interrupts as in the case of do_device_not_available).
1da177e4 604 */
be98c2cd 605void math_state_restore(void)
1da177e4 606{
f94edacf 607 struct task_struct *tsk = current;
1da177e4 608
aa283f49
SS
609 if (!tsk_used_math(tsk)) {
610 local_irq_enable();
611 /*
612 * does a slab alloc which can sleep
613 */
614 if (init_fpu(tsk)) {
615 /*
616 * ran out of memory!
617 */
618 do_group_exit(SIGKILL);
619 return;
620 }
621 local_irq_disable();
622 }
623
f94edacf 624 __thread_fpu_begin(tsk);
304bceda 625
80ab6f1e
LT
626 /*
627 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
628 */
629 if (unlikely(restore_fpu_checking(tsk))) {
304bceda 630 drop_init_fpu(tsk);
80ab6f1e
LT
631 force_sig(SIGSEGV, tsk);
632 return;
633 }
b3b0870e
LT
634
635 tsk->fpu_counter++;
1da177e4 636}
5992b6da 637EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 638
e407d620 639dotraplinkage void __kprobes
aa78bcfa 640do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 641{
6ba3c97a 642 exception_enter(regs);
5d2bd700 643 BUG_ON(use_eager_fpu());
304bceda 644
a334fe43 645#ifdef CONFIG_MATH_EMULATION
7643e9b9 646 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
647 struct math_emu_info info = { };
648
7643e9b9 649 conditional_sti(regs);
d315760f 650
aa78bcfa 651 info.regs = regs;
d315760f 652 math_emulate(&info);
6ba3c97a 653 exception_exit(regs);
a334fe43 654 return;
7643e9b9 655 }
a334fe43
BG
656#endif
657 math_state_restore(); /* interrupts still off */
658#ifdef CONFIG_X86_32
659 conditional_sti(regs);
081f75bb 660#endif
6ba3c97a 661 exception_exit(regs);
7643e9b9
AH
662}
663
081f75bb 664#ifdef CONFIG_X86_32
e407d620 665dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
666{
667 siginfo_t info;
6ba3c97a
FW
668
669 exception_enter(regs);
f8e0870f
AH
670 local_irq_enable();
671
672 info.si_signo = SIGILL;
673 info.si_errno = 0;
674 info.si_code = ILL_BADSTK;
fc6fcdfb 675 info.si_addr = NULL;
c9408265 676 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
677 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
678 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
679 &info);
680 }
681 exception_exit(regs);
f8e0870f 682}
081f75bb 683#endif
f8e0870f 684
29c84391
JK
685/* Set of traps needed for early debugging. */
686void __init early_trap_init(void)
687{
c9408265 688 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
29c84391 689 /* int3 can be called from all */
c9408265 690 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
8170e6be 691#ifdef CONFIG_X86_32
c9408265 692 set_intr_gate(X86_TRAP_PF, &page_fault);
8170e6be 693#endif
29c84391
JK
694 load_idt(&idt_descr);
695}
696
8170e6be
PA
697void __init early_trap_pf_init(void)
698{
699#ifdef CONFIG_X86_64
700 set_intr_gate(X86_TRAP_PF, &page_fault);
701#endif
702}
703
1da177e4
LT
704void __init trap_init(void)
705{
dbeb2be2
RR
706 int i;
707
1da177e4 708#ifdef CONFIG_EISA
927222b1 709 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
710
711 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 712 EISA_bus = 1;
927222b1 713 early_iounmap(p, 4);
1da177e4
LT
714#endif
715
c9408265
KC
716 set_intr_gate(X86_TRAP_DE, &divide_error);
717 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
699d2937 718 /* int4 can be called from all */
c9408265
KC
719 set_system_intr_gate(X86_TRAP_OF, &overflow);
720 set_intr_gate(X86_TRAP_BR, &bounds);
721 set_intr_gate(X86_TRAP_UD, &invalid_op);
722 set_intr_gate(X86_TRAP_NM, &device_not_available);
081f75bb 723#ifdef CONFIG_X86_32
c9408265 724 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb 725#else
c9408265 726 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
081f75bb 727#endif
c9408265
KC
728 set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun);
729 set_intr_gate(X86_TRAP_TS, &invalid_TSS);
730 set_intr_gate(X86_TRAP_NP, &segment_not_present);
731 set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
732 set_intr_gate(X86_TRAP_GP, &general_protection);
733 set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug);
734 set_intr_gate(X86_TRAP_MF, &coprocessor_error);
735 set_intr_gate(X86_TRAP_AC, &alignment_check);
1da177e4 736#ifdef CONFIG_X86_MCE
c9408265 737 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1da177e4 738#endif
c9408265 739 set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error);
1da177e4 740
bb3f0b59
YL
741 /* Reserve all the builtin and the syscall vector: */
742 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
743 set_bit(i, used_vectors);
744
081f75bb
AH
745#ifdef CONFIG_IA32_EMULATION
746 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 747 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
748#endif
749
750#ifdef CONFIG_X86_32
699d2937 751 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 752 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 753#endif
bb3f0b59 754
1da177e4 755 /*
b5964405 756 * Should be a barrier for any external CPU state:
1da177e4
LT
757 */
758 cpu_init();
759
428cf902 760 x86_init.irqs.trap_init();
228bdaa9
SR
761
762#ifdef CONFIG_X86_64
763 memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16);
c9408265
KC
764 set_nmi_gate(X86_TRAP_DB, &debug);
765 set_nmi_gate(X86_TRAP_BP, &int3);
228bdaa9 766#endif
1da177e4 767}