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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
b5964405 IM |
12 | #include <linux/interrupt.h> |
13 | #include <linux/kallsyms.h> | |
14 | #include <linux/spinlock.h> | |
b5964405 IM |
15 | #include <linux/kprobes.h> |
16 | #include <linux/uaccess.h> | |
b5964405 | 17 | #include <linux/kdebug.h> |
f503b5ae | 18 | #include <linux/kgdb.h> |
1da177e4 | 19 | #include <linux/kernel.h> |
b5964405 IM |
20 | #include <linux/module.h> |
21 | #include <linux/ptrace.h> | |
1da177e4 | 22 | #include <linux/string.h> |
b5964405 | 23 | #include <linux/delay.h> |
1da177e4 | 24 | #include <linux/errno.h> |
b5964405 IM |
25 | #include <linux/kexec.h> |
26 | #include <linux/sched.h> | |
1da177e4 | 27 | #include <linux/timer.h> |
1da177e4 | 28 | #include <linux/init.h> |
91768d6c | 29 | #include <linux/bug.h> |
b5964405 IM |
30 | #include <linux/nmi.h> |
31 | #include <linux/mm.h> | |
c1d518c8 AH |
32 | #include <linux/smp.h> |
33 | #include <linux/io.h> | |
1da177e4 LT |
34 | |
35 | #ifdef CONFIG_EISA | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/eisa.h> | |
38 | #endif | |
39 | ||
40 | #ifdef CONFIG_MCA | |
41 | #include <linux/mca.h> | |
42 | #endif | |
43 | ||
c0d12172 DJ |
44 | #if defined(CONFIG_EDAC) |
45 | #include <linux/edac.h> | |
46 | #endif | |
47 | ||
f8561296 | 48 | #include <asm/kmemcheck.h> |
b5964405 | 49 | #include <asm/stacktrace.h> |
1da177e4 | 50 | #include <asm/processor.h> |
1da177e4 | 51 | #include <asm/debugreg.h> |
60063497 | 52 | #include <linux/atomic.h> |
c1d518c8 | 53 | #include <asm/traps.h> |
1da177e4 LT |
54 | #include <asm/desc.h> |
55 | #include <asm/i387.h> | |
1361b83a | 56 | #include <asm/fpu-internal.h> |
9e55e44e | 57 | #include <asm/mce.h> |
c1d518c8 | 58 | |
1164dd00 | 59 | #include <asm/mach_traps.h> |
c1d518c8 | 60 | |
081f75bb | 61 | #ifdef CONFIG_X86_64 |
428cf902 | 62 | #include <asm/x86_init.h> |
081f75bb AH |
63 | #include <asm/pgalloc.h> |
64 | #include <asm/proto.h> | |
081f75bb | 65 | #else |
c1d518c8 | 66 | #include <asm/processor-flags.h> |
8e6dafd6 | 67 | #include <asm/setup.h> |
1da177e4 | 68 | |
1da177e4 LT |
69 | asmlinkage int system_call(void); |
70 | ||
1da177e4 | 71 | /* Do we ignore FPU interrupts ? */ |
b5964405 | 72 | char ignore_fpu_irq; |
1da177e4 LT |
73 | |
74 | /* | |
75 | * The IDT has to be page-aligned to simplify the Pentium | |
07e81d61 | 76 | * F0 0F bug workaround. |
1da177e4 | 77 | */ |
07e81d61 | 78 | gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, }; |
081f75bb | 79 | #endif |
1da177e4 | 80 | |
b77b881f YL |
81 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
82 | EXPORT_SYMBOL_GPL(used_vectors); | |
83 | ||
762db434 AH |
84 | static inline void conditional_sti(struct pt_regs *regs) |
85 | { | |
86 | if (regs->flags & X86_EFLAGS_IF) | |
87 | local_irq_enable(); | |
88 | } | |
89 | ||
3d2a71a5 AH |
90 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
91 | { | |
92 | inc_preempt_count(); | |
93 | if (regs->flags & X86_EFLAGS_IF) | |
94 | local_irq_enable(); | |
95 | } | |
96 | ||
be716615 TG |
97 | static inline void conditional_cli(struct pt_regs *regs) |
98 | { | |
99 | if (regs->flags & X86_EFLAGS_IF) | |
100 | local_irq_disable(); | |
101 | } | |
102 | ||
3d2a71a5 AH |
103 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
104 | { | |
105 | if (regs->flags & X86_EFLAGS_IF) | |
106 | local_irq_disable(); | |
107 | dec_preempt_count(); | |
108 | } | |
109 | ||
b5964405 | 110 | static void __kprobes |
3c1326f8 | 111 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
b5964405 | 112 | long error_code, siginfo_t *info) |
1da177e4 | 113 | { |
4f339ecb | 114 | struct task_struct *tsk = current; |
4f339ecb | 115 | |
081f75bb | 116 | #ifdef CONFIG_X86_32 |
6b6891f9 | 117 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 AH |
118 | /* |
119 | * traps 0, 1, 3, 4, and 5 should be forwarded to vm86. | |
120 | * On nmi (interrupt 2), do_trap should not be called. | |
121 | */ | |
c9408265 | 122 | if (trapnr < X86_TRAP_UD) |
1da177e4 LT |
123 | goto vm86_trap; |
124 | goto trap_signal; | |
125 | } | |
081f75bb | 126 | #endif |
1da177e4 | 127 | |
717b594a | 128 | if (!user_mode(regs)) |
1da177e4 LT |
129 | goto kernel_trap; |
130 | ||
081f75bb | 131 | #ifdef CONFIG_X86_32 |
b5964405 | 132 | trap_signal: |
081f75bb | 133 | #endif |
b5964405 | 134 | /* |
51e7dc70 | 135 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
136 | * kernelspace faults which result in die(), but not |
137 | * kernelspace faults which are fixed up. die() gives the | |
138 | * process no chance to handle the signal and notice the | |
139 | * kernel fault information, so that won't result in polluting | |
140 | * the information about previously queued, but not yet | |
141 | * delivered, faults. See also do_general_protection below. | |
142 | */ | |
143 | tsk->thread.error_code = error_code; | |
51e7dc70 | 144 | tsk->thread.trap_nr = trapnr; |
d1895183 | 145 | |
081f75bb AH |
146 | #ifdef CONFIG_X86_64 |
147 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
148 | printk_ratelimit()) { | |
149 | printk(KERN_INFO | |
150 | "%s[%d] trap %s ip:%lx sp:%lx error:%lx", | |
151 | tsk->comm, tsk->pid, str, | |
152 | regs->ip, regs->sp, error_code); | |
153 | print_vma_addr(" in ", regs->ip); | |
154 | printk("\n"); | |
155 | } | |
156 | #endif | |
157 | ||
b5964405 IM |
158 | if (info) |
159 | force_sig_info(signr, info, tsk); | |
160 | else | |
161 | force_sig(signr, tsk); | |
162 | return; | |
1da177e4 | 163 | |
b5964405 IM |
164 | kernel_trap: |
165 | if (!fixup_exception(regs)) { | |
166 | tsk->thread.error_code = error_code; | |
51e7dc70 | 167 | tsk->thread.trap_nr = trapnr; |
b5964405 | 168 | die(str, regs, error_code); |
1da177e4 | 169 | } |
b5964405 | 170 | return; |
1da177e4 | 171 | |
081f75bb | 172 | #ifdef CONFIG_X86_32 |
b5964405 IM |
173 | vm86_trap: |
174 | if (handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
175 | error_code, trapnr)) | |
176 | goto trap_signal; | |
177 | return; | |
081f75bb | 178 | #endif |
1da177e4 LT |
179 | } |
180 | ||
b5964405 | 181 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 182 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
183 | { \ |
184 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
a8c1be9d | 185 | == NOTIFY_STOP) \ |
b5964405 | 186 | return; \ |
61aef7d2 | 187 | conditional_sti(regs); \ |
3c1326f8 | 188 | do_trap(trapnr, signr, str, regs, error_code, NULL); \ |
1da177e4 LT |
189 | } |
190 | ||
3c1326f8 | 191 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ |
e407d620 | 192 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
193 | { \ |
194 | siginfo_t info; \ | |
195 | info.si_signo = signr; \ | |
196 | info.si_errno = 0; \ | |
197 | info.si_code = sicode; \ | |
198 | info.si_addr = (void __user *)siaddr; \ | |
b5964405 | 199 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ |
a8c1be9d | 200 | == NOTIFY_STOP) \ |
b5964405 | 201 | return; \ |
61aef7d2 | 202 | conditional_sti(regs); \ |
3c1326f8 | 203 | do_trap(trapnr, signr, str, regs, error_code, &info); \ |
1da177e4 LT |
204 | } |
205 | ||
c9408265 KC |
206 | DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV, |
207 | regs->ip) | |
208 | DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
209 | DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds) | |
210 | DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, | |
211 | regs->ip) | |
212 | DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun", | |
213 | coprocessor_segment_overrun) | |
214 | DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
215 | DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
081f75bb | 216 | #ifdef CONFIG_X86_32 |
c9408265 | 217 | DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
081f75bb | 218 | #endif |
c9408265 KC |
219 | DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check, |
220 | BUS_ADRALN, 0) | |
1da177e4 | 221 | |
081f75bb AH |
222 | #ifdef CONFIG_X86_64 |
223 | /* Runs on IST stack */ | |
224 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
225 | { | |
226 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, | |
c9408265 | 227 | X86_TRAP_SS, SIGBUS) == NOTIFY_STOP) |
081f75bb AH |
228 | return; |
229 | preempt_conditional_sti(regs); | |
c9408265 | 230 | do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL); |
081f75bb AH |
231 | preempt_conditional_cli(regs); |
232 | } | |
233 | ||
234 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
235 | { | |
236 | static const char str[] = "double fault"; | |
237 | struct task_struct *tsk = current; | |
238 | ||
239 | /* Return not checked because double check cannot be ignored */ | |
c9408265 | 240 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
241 | |
242 | tsk->thread.error_code = error_code; | |
51e7dc70 | 243 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 244 | |
bd8b96df IM |
245 | /* |
246 | * This is always a kernel trap and never fixable (and thus must | |
247 | * never return). | |
248 | */ | |
081f75bb AH |
249 | for (;;) |
250 | die(str, regs, error_code); | |
251 | } | |
252 | #endif | |
253 | ||
e407d620 | 254 | dotraplinkage void __kprobes |
13485ab5 | 255 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 256 | { |
13485ab5 | 257 | struct task_struct *tsk; |
b5964405 | 258 | |
c6df0d71 AH |
259 | conditional_sti(regs); |
260 | ||
081f75bb | 261 | #ifdef CONFIG_X86_32 |
6b6891f9 | 262 | if (regs->flags & X86_VM_MASK) |
1da177e4 | 263 | goto gp_in_vm86; |
081f75bb | 264 | #endif |
1da177e4 | 265 | |
13485ab5 | 266 | tsk = current; |
717b594a | 267 | if (!user_mode(regs)) |
1da177e4 LT |
268 | goto gp_in_kernel; |
269 | ||
13485ab5 | 270 | tsk->thread.error_code = error_code; |
51e7dc70 | 271 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 272 | |
13485ab5 AH |
273 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
274 | printk_ratelimit()) { | |
abd4f750 | 275 | printk(KERN_INFO |
13485ab5 AH |
276 | "%s[%d] general protection ip:%lx sp:%lx error:%lx", |
277 | tsk->comm, task_pid_nr(tsk), | |
278 | regs->ip, regs->sp, error_code); | |
03252919 AK |
279 | print_vma_addr(" in ", regs->ip); |
280 | printk("\n"); | |
281 | } | |
abd4f750 | 282 | |
13485ab5 | 283 | force_sig(SIGSEGV, tsk); |
1da177e4 LT |
284 | return; |
285 | ||
081f75bb | 286 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
287 | gp_in_vm86: |
288 | local_irq_enable(); | |
289 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
290 | return; | |
081f75bb | 291 | #endif |
1da177e4 LT |
292 | |
293 | gp_in_kernel: | |
13485ab5 AH |
294 | if (fixup_exception(regs)) |
295 | return; | |
296 | ||
297 | tsk->thread.error_code = error_code; | |
51e7dc70 | 298 | tsk->thread.trap_nr = X86_TRAP_GP; |
c9408265 KC |
299 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
300 | X86_TRAP_GP, SIGSEGV) == NOTIFY_STOP) | |
13485ab5 AH |
301 | return; |
302 | die("general protection fault", regs, error_code); | |
1da177e4 LT |
303 | } |
304 | ||
c1d518c8 | 305 | /* May run on IST stack. */ |
e407d620 | 306 | dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 307 | { |
f503b5ae | 308 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
309 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
310 | SIGTRAP) == NOTIFY_STOP) | |
f503b5ae JW |
311 | return; |
312 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ | |
cc3a1bf5 | 313 | |
c9408265 KC |
314 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
315 | SIGTRAP) == NOTIFY_STOP) | |
48c88211 | 316 | return; |
b5964405 | 317 | |
42181186 SR |
318 | /* |
319 | * Let others (NMI) know that the debug stack is in use | |
320 | * as we may switch to the interrupt stack. | |
321 | */ | |
322 | debug_stack_usage_inc(); | |
4915a35e | 323 | preempt_conditional_sti(regs); |
c9408265 | 324 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 325 | preempt_conditional_cli(regs); |
42181186 | 326 | debug_stack_usage_dec(); |
1da177e4 | 327 | } |
1da177e4 | 328 | |
081f75bb | 329 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
330 | /* |
331 | * Help handler running on IST stack to switch back to user stack | |
332 | * for scheduling or signal handling. The actual stack switch is done in | |
333 | * entry.S | |
334 | */ | |
081f75bb AH |
335 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
336 | { | |
337 | struct pt_regs *regs = eregs; | |
338 | /* Did already sync */ | |
339 | if (eregs == (struct pt_regs *)eregs->sp) | |
340 | ; | |
341 | /* Exception from user space */ | |
342 | else if (user_mode(eregs)) | |
343 | regs = task_pt_regs(current); | |
bd8b96df IM |
344 | /* |
345 | * Exception from kernel and interrupts are enabled. Move to | |
346 | * kernel process stack. | |
347 | */ | |
081f75bb AH |
348 | else if (eregs->flags & X86_EFLAGS_IF) |
349 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
350 | if (eregs != regs) | |
351 | *regs = *eregs; | |
352 | return regs; | |
353 | } | |
354 | #endif | |
355 | ||
1da177e4 LT |
356 | /* |
357 | * Our handling of the processor debug registers is non-trivial. | |
358 | * We do not clear them on entry and exit from the kernel. Therefore | |
359 | * it is possible to get a watchpoint trap here from inside the kernel. | |
360 | * However, the code in ./ptrace.c has ensured that the user can | |
361 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
362 | * watchpoint trap can only occur in code which is reading/writing | |
363 | * from user space. Such code must not hold kernel locks (since it | |
364 | * can equally take a page fault), therefore it is safe to call | |
365 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 366 | * |
1da177e4 LT |
367 | * Code in ./signal.c ensures that the debug control register |
368 | * is restored before we deliver any signal, and therefore that | |
369 | * user code runs with the correct debug control register even though | |
370 | * we clear it here. | |
371 | * | |
372 | * Being careful here means that we don't have to be as careful in a | |
373 | * lot of more complicated places (task switching can be a bit lazy | |
374 | * about restoring all the debug state, and ptrace doesn't have to | |
375 | * find every occurrence of the TF bit that could be saved away even | |
376 | * by user code) | |
c1d518c8 AH |
377 | * |
378 | * May run on IST stack. | |
1da177e4 | 379 | */ |
e407d620 | 380 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 381 | { |
1da177e4 | 382 | struct task_struct *tsk = current; |
a1e80faf | 383 | int user_icebp = 0; |
08d68323 | 384 | unsigned long dr6; |
da654b74 | 385 | int si_code; |
1da177e4 | 386 | |
08d68323 | 387 | get_debugreg(dr6, 6); |
1da177e4 | 388 | |
40f9249a P |
389 | /* Filter out all the reserved bits which are preset to 1 */ |
390 | dr6 &= ~DR6_RESERVED; | |
391 | ||
a1e80faf FW |
392 | /* |
393 | * If dr6 has no reason to give us about the origin of this trap, | |
394 | * then it's very likely the result of an icebp/int01 trap. | |
395 | * User wants a sigtrap for that. | |
396 | */ | |
397 | if (!dr6 && user_mode(regs)) | |
398 | user_icebp = 1; | |
399 | ||
f8561296 | 400 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 401 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
f8561296 VN |
402 | return; |
403 | ||
08d68323 P |
404 | /* DR6 may or may not be cleared by the CPU */ |
405 | set_debugreg(0, 6); | |
10faa81e | 406 | |
ea8e61b7 PZ |
407 | /* |
408 | * The processor cleared BTF, so don't mark that we need it set. | |
409 | */ | |
410 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
411 | ||
08d68323 P |
412 | /* Store the virtualized DR6 value */ |
413 | tsk->thread.debugreg6 = dr6; | |
414 | ||
62edab90 P |
415 | if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code, |
416 | SIGTRAP) == NOTIFY_STOP) | |
1da177e4 | 417 | return; |
3d2a71a5 | 418 | |
42181186 SR |
419 | /* |
420 | * Let others (NMI) know that the debug stack is in use | |
421 | * as we may switch to the interrupt stack. | |
422 | */ | |
423 | debug_stack_usage_inc(); | |
424 | ||
1da177e4 | 425 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 426 | preempt_conditional_sti(regs); |
1da177e4 | 427 | |
08d68323 | 428 | if (regs->flags & X86_VM_MASK) { |
c9408265 KC |
429 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
430 | X86_TRAP_DB); | |
6554287b | 431 | preempt_conditional_cli(regs); |
42181186 | 432 | debug_stack_usage_dec(); |
08d68323 | 433 | return; |
1da177e4 LT |
434 | } |
435 | ||
1da177e4 | 436 | /* |
08d68323 P |
437 | * Single-stepping through system calls: ignore any exceptions in |
438 | * kernel space, but re-enable TF when returning to user mode. | |
439 | * | |
440 | * We already checked v86 mode above, so we can check for kernel mode | |
441 | * by just checking the CPL of CS. | |
1da177e4 | 442 | */ |
08d68323 P |
443 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
444 | tsk->thread.debugreg6 &= ~DR_STEP; | |
445 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
446 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 447 | } |
08d68323 | 448 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 449 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 450 | send_sigtrap(tsk, regs, error_code, si_code); |
3d2a71a5 | 451 | preempt_conditional_cli(regs); |
42181186 | 452 | debug_stack_usage_dec(); |
1da177e4 | 453 | |
1da177e4 LT |
454 | return; |
455 | } | |
456 | ||
457 | /* | |
458 | * Note that we play around with the 'TS' bit in an attempt to get | |
459 | * the correct behaviour even in the presence of the asynchronous | |
460 | * IRQ13 behaviour | |
461 | */ | |
9b6dba9e | 462 | void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 463 | { |
e2e75c91 | 464 | struct task_struct *task = current; |
1da177e4 | 465 | siginfo_t info; |
9b6dba9e | 466 | unsigned short err; |
c9408265 KC |
467 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
468 | "simd exception"; | |
e2e75c91 BG |
469 | |
470 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
471 | return; | |
472 | conditional_sti(regs); | |
473 | ||
474 | if (!user_mode_vm(regs)) | |
475 | { | |
476 | if (!fixup_exception(regs)) { | |
477 | task->thread.error_code = error_code; | |
51e7dc70 | 478 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
479 | die(str, regs, error_code); |
480 | } | |
481 | return; | |
482 | } | |
1da177e4 LT |
483 | |
484 | /* | |
485 | * Save the info for the exception handler and clear the error. | |
486 | */ | |
1da177e4 | 487 | save_init_fpu(task); |
51e7dc70 | 488 | task->thread.trap_nr = trapnr; |
9b6dba9e | 489 | task->thread.error_code = error_code; |
1da177e4 LT |
490 | info.si_signo = SIGFPE; |
491 | info.si_errno = 0; | |
9b6dba9e | 492 | info.si_addr = (void __user *)regs->ip; |
c9408265 | 493 | if (trapnr == X86_TRAP_MF) { |
9b6dba9e BG |
494 | unsigned short cwd, swd; |
495 | /* | |
496 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
497 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
498 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
499 | * fault bit. We should only be taking one exception at a time, | |
500 | * so if this combination doesn't produce any single exception, | |
501 | * then we have a bad program that isn't synchronizing its FPU usage | |
502 | * and it will suffer the consequences since we won't be able to | |
503 | * fully reproduce the context of the exception | |
504 | */ | |
505 | cwd = get_fpu_cwd(task); | |
506 | swd = get_fpu_swd(task); | |
adf77bac | 507 | |
9b6dba9e BG |
508 | err = swd & ~cwd; |
509 | } else { | |
510 | /* | |
511 | * The SIMD FPU exceptions are handled a little differently, as there | |
512 | * is only a single status/control register. Thus, to determine which | |
513 | * unmasked exception was caught we must mask the exception mask bits | |
514 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
515 | */ | |
516 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
517 | err = ~(mxcsr >> 7) & mxcsr; | |
518 | } | |
adf77bac PA |
519 | |
520 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
521 | /* |
522 | * swd & 0x240 == 0x040: Stack Underflow | |
523 | * swd & 0x240 == 0x240: Stack Overflow | |
524 | * User must clear the SF bit (0x40) if set | |
525 | */ | |
526 | info.si_code = FPE_FLTINV; | |
adf77bac | 527 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 528 | info.si_code = FPE_FLTDIV; |
adf77bac | 529 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 530 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
531 | } else if (err & 0x012) { /* Denormal, Underflow */ |
532 | info.si_code = FPE_FLTUND; | |
533 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 534 | info.si_code = FPE_FLTRES; |
adf77bac | 535 | } else { |
bd8b96df | 536 | /* |
c9408265 KC |
537 | * If we're using IRQ 13, or supposedly even some trap |
538 | * X86_TRAP_MF implementations, it's possible | |
539 | * we get a spurious trap, which is not an error. | |
bd8b96df | 540 | */ |
c9408265 | 541 | return; |
1da177e4 LT |
542 | } |
543 | force_sig_info(SIGFPE, &info, task); | |
544 | } | |
545 | ||
e407d620 | 546 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 547 | { |
081f75bb | 548 | #ifdef CONFIG_X86_32 |
1da177e4 | 549 | ignore_fpu_irq = 1; |
081f75bb AH |
550 | #endif |
551 | ||
c9408265 | 552 | math_error(regs, error_code, X86_TRAP_MF); |
1da177e4 LT |
553 | } |
554 | ||
e407d620 AH |
555 | dotraplinkage void |
556 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 557 | { |
c9408265 | 558 | math_error(regs, error_code, X86_TRAP_XF); |
1da177e4 LT |
559 | } |
560 | ||
e407d620 AH |
561 | dotraplinkage void |
562 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 563 | { |
cf81978d | 564 | conditional_sti(regs); |
1da177e4 LT |
565 | #if 0 |
566 | /* No need to warn about this any longer. */ | |
b5964405 | 567 | printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
568 | #endif |
569 | } | |
570 | ||
081f75bb | 571 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 572 | { |
1da177e4 | 573 | } |
4efc0670 | 574 | |
7856f6cc | 575 | asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
576 | { |
577 | } | |
578 | ||
1da177e4 | 579 | /* |
b5964405 | 580 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
581 | * old math state array, and gets the new ones from the current task |
582 | * | |
583 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
584 | * Don't touch unless you *really* know how it works. | |
585 | * | |
be98c2cd LT |
586 | * Must be called with kernel preemption disabled (eg with local |
587 | * local interrupts as in the case of do_device_not_available). | |
1da177e4 | 588 | */ |
be98c2cd | 589 | void math_state_restore(void) |
1da177e4 | 590 | { |
f94edacf | 591 | struct task_struct *tsk = current; |
1da177e4 | 592 | |
aa283f49 SS |
593 | if (!tsk_used_math(tsk)) { |
594 | local_irq_enable(); | |
595 | /* | |
596 | * does a slab alloc which can sleep | |
597 | */ | |
598 | if (init_fpu(tsk)) { | |
599 | /* | |
600 | * ran out of memory! | |
601 | */ | |
602 | do_group_exit(SIGKILL); | |
603 | return; | |
604 | } | |
605 | local_irq_disable(); | |
606 | } | |
607 | ||
f94edacf | 608 | __thread_fpu_begin(tsk); |
80ab6f1e LT |
609 | /* |
610 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
611 | */ | |
612 | if (unlikely(restore_fpu_checking(tsk))) { | |
613 | __thread_fpu_end(tsk); | |
614 | force_sig(SIGSEGV, tsk); | |
615 | return; | |
616 | } | |
b3b0870e LT |
617 | |
618 | tsk->fpu_counter++; | |
1da177e4 | 619 | } |
5992b6da | 620 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 | 621 | |
e407d620 | 622 | dotraplinkage void __kprobes |
aa78bcfa | 623 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 624 | { |
a334fe43 | 625 | #ifdef CONFIG_MATH_EMULATION |
7643e9b9 | 626 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
627 | struct math_emu_info info = { }; |
628 | ||
7643e9b9 | 629 | conditional_sti(regs); |
d315760f | 630 | |
aa78bcfa | 631 | info.regs = regs; |
d315760f | 632 | math_emulate(&info); |
a334fe43 | 633 | return; |
7643e9b9 | 634 | } |
a334fe43 BG |
635 | #endif |
636 | math_state_restore(); /* interrupts still off */ | |
637 | #ifdef CONFIG_X86_32 | |
638 | conditional_sti(regs); | |
081f75bb | 639 | #endif |
7643e9b9 AH |
640 | } |
641 | ||
081f75bb | 642 | #ifdef CONFIG_X86_32 |
e407d620 | 643 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
644 | { |
645 | siginfo_t info; | |
646 | local_irq_enable(); | |
647 | ||
648 | info.si_signo = SIGILL; | |
649 | info.si_errno = 0; | |
650 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 651 | info.si_addr = NULL; |
c9408265 KC |
652 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
653 | X86_TRAP_IRET, SIGILL) == NOTIFY_STOP) | |
f8e0870f | 654 | return; |
c9408265 KC |
655 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, |
656 | &info); | |
f8e0870f | 657 | } |
081f75bb | 658 | #endif |
f8e0870f | 659 | |
29c84391 JK |
660 | /* Set of traps needed for early debugging. */ |
661 | void __init early_trap_init(void) | |
662 | { | |
c9408265 | 663 | set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); |
29c84391 | 664 | /* int3 can be called from all */ |
c9408265 KC |
665 | set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); |
666 | set_intr_gate(X86_TRAP_PF, &page_fault); | |
29c84391 JK |
667 | load_idt(&idt_descr); |
668 | } | |
669 | ||
1da177e4 LT |
670 | void __init trap_init(void) |
671 | { | |
dbeb2be2 RR |
672 | int i; |
673 | ||
1da177e4 | 674 | #ifdef CONFIG_EISA |
927222b1 | 675 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
676 | |
677 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 678 | EISA_bus = 1; |
927222b1 | 679 | early_iounmap(p, 4); |
1da177e4 LT |
680 | #endif |
681 | ||
c9408265 KC |
682 | set_intr_gate(X86_TRAP_DE, ÷_error); |
683 | set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); | |
699d2937 | 684 | /* int4 can be called from all */ |
c9408265 KC |
685 | set_system_intr_gate(X86_TRAP_OF, &overflow); |
686 | set_intr_gate(X86_TRAP_BR, &bounds); | |
687 | set_intr_gate(X86_TRAP_UD, &invalid_op); | |
688 | set_intr_gate(X86_TRAP_NM, &device_not_available); | |
081f75bb | 689 | #ifdef CONFIG_X86_32 |
c9408265 | 690 | set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb | 691 | #else |
c9408265 | 692 | set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); |
081f75bb | 693 | #endif |
c9408265 KC |
694 | set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun); |
695 | set_intr_gate(X86_TRAP_TS, &invalid_TSS); | |
696 | set_intr_gate(X86_TRAP_NP, &segment_not_present); | |
697 | set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK); | |
698 | set_intr_gate(X86_TRAP_GP, &general_protection); | |
699 | set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug); | |
700 | set_intr_gate(X86_TRAP_MF, &coprocessor_error); | |
701 | set_intr_gate(X86_TRAP_AC, &alignment_check); | |
1da177e4 | 702 | #ifdef CONFIG_X86_MCE |
c9408265 | 703 | set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); |
1da177e4 | 704 | #endif |
c9408265 | 705 | set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error); |
1da177e4 | 706 | |
bb3f0b59 YL |
707 | /* Reserve all the builtin and the syscall vector: */ |
708 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
709 | set_bit(i, used_vectors); | |
710 | ||
081f75bb AH |
711 | #ifdef CONFIG_IA32_EMULATION |
712 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 713 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
714 | #endif |
715 | ||
716 | #ifdef CONFIG_X86_32 | |
699d2937 | 717 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 718 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 719 | #endif |
bb3f0b59 | 720 | |
1da177e4 | 721 | /* |
b5964405 | 722 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
723 | */ |
724 | cpu_init(); | |
725 | ||
428cf902 | 726 | x86_init.irqs.trap_init(); |
228bdaa9 SR |
727 | |
728 | #ifdef CONFIG_X86_64 | |
729 | memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16); | |
c9408265 KC |
730 | set_nmi_gate(X86_TRAP_DB, &debug); |
731 | set_nmi_gate(X86_TRAP_BP, &int3); | |
228bdaa9 | 732 | #endif |
1da177e4 | 733 | } |