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x86/debug: Handle warnings before the notifier chain, to fix KGDB crash
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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
56dd9470 15#include <linux/context_tracking.h>
b5964405
IM
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
b5964405
IM
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
b5964405 21#include <linux/kdebug.h>
f503b5ae 22#include <linux/kgdb.h>
1da177e4 23#include <linux/kernel.h>
186f4360 24#include <linux/export.h>
b5964405 25#include <linux/ptrace.h>
b02ef20a 26#include <linux/uprobes.h>
1da177e4 27#include <linux/string.h>
b5964405 28#include <linux/delay.h>
1da177e4 29#include <linux/errno.h>
b5964405
IM
30#include <linux/kexec.h>
31#include <linux/sched.h>
68db0cf1 32#include <linux/sched/task_stack.h>
1da177e4 33#include <linux/timer.h>
1da177e4 34#include <linux/init.h>
91768d6c 35#include <linux/bug.h>
b5964405
IM
36#include <linux/nmi.h>
37#include <linux/mm.h>
c1d518c8
AH
38#include <linux/smp.h>
39#include <linux/io.h>
1da177e4 40
c0d12172
DJ
41#if defined(CONFIG_EDAC)
42#include <linux/edac.h>
43#endif
44
f8561296 45#include <asm/kmemcheck.h>
b5964405 46#include <asm/stacktrace.h>
1da177e4 47#include <asm/processor.h>
1da177e4 48#include <asm/debugreg.h>
60063497 49#include <linux/atomic.h>
35de5b06 50#include <asm/text-patching.h>
08d636b6 51#include <asm/ftrace.h>
c1d518c8 52#include <asm/traps.h>
1da177e4 53#include <asm/desc.h>
78f7f1e5 54#include <asm/fpu/internal.h>
9e55e44e 55#include <asm/mce.h>
4eefbe79 56#include <asm/fixmap.h>
1164dd00 57#include <asm/mach_traps.h>
17f41571 58#include <asm/alternative.h>
a84eeaa9 59#include <asm/fpu/xstate.h>
e7126cf5 60#include <asm/trace/mpx.h>
fe3d197f 61#include <asm/mpx.h>
ba3e127e 62#include <asm/vm86.h>
c1d518c8 63
081f75bb 64#ifdef CONFIG_X86_64
428cf902 65#include <asm/x86_init.h>
081f75bb
AH
66#include <asm/pgalloc.h>
67#include <asm/proto.h>
081f75bb 68#else
c1d518c8 69#include <asm/processor-flags.h>
8e6dafd6 70#include <asm/setup.h>
b2502b41 71#include <asm/proto.h>
081f75bb 72#endif
1da177e4 73
b77b881f 74DECLARE_BITMAP(used_vectors, NR_VECTORS);
b77b881f 75
d99e1bd1 76static inline void cond_local_irq_enable(struct pt_regs *regs)
762db434
AH
77{
78 if (regs->flags & X86_EFLAGS_IF)
79 local_irq_enable();
80}
81
d99e1bd1 82static inline void cond_local_irq_disable(struct pt_regs *regs)
3d2a71a5
AH
83{
84 if (regs->flags & X86_EFLAGS_IF)
85 local_irq_disable();
3d2a71a5
AH
86}
87
aaee8c3c
AL
88/*
89 * In IST context, we explicitly disable preemption. This serves two
90 * purposes: it makes it much less likely that we would accidentally
91 * schedule in IST context and it will force a warning if we somehow
92 * manage to schedule by accident.
93 */
8c84014f 94void ist_enter(struct pt_regs *regs)
95927475 95{
f39b6f0e 96 if (user_mode(regs)) {
5778077d 97 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
95927475
AL
98 } else {
99 /*
100 * We might have interrupted pretty much anything. In
101 * fact, if we're a machine check, we can even interrupt
102 * NMI processing. We don't want in_nmi() to return true,
103 * but we need to notify RCU.
104 */
105 rcu_nmi_enter();
95927475 106 }
b926e6f6 107
aaee8c3c 108 preempt_disable();
b926e6f6
AL
109
110 /* This code is a bit fragile. Test it. */
f78f5b90 111 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
95927475
AL
112}
113
8c84014f 114void ist_exit(struct pt_regs *regs)
95927475 115{
aaee8c3c 116 preempt_enable_no_resched();
95927475 117
8c84014f 118 if (!user_mode(regs))
95927475
AL
119 rcu_nmi_exit();
120}
121
bced35b6
AL
122/**
123 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
124 * @regs: regs passed to the IST exception handler
125 *
126 * IST exception handlers normally cannot schedule. As a special
127 * exception, if the exception interrupted userspace code (i.e.
f39b6f0e 128 * user_mode(regs) would return true) and the exception was not
bced35b6
AL
129 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
130 * begins a non-atomic section within an ist_enter()/ist_exit() region.
131 * Callers are responsible for enabling interrupts themselves inside
8c84014f 132 * the non-atomic section, and callers must call ist_end_non_atomic()
bced35b6
AL
133 * before ist_exit().
134 */
135void ist_begin_non_atomic(struct pt_regs *regs)
136{
f39b6f0e 137 BUG_ON(!user_mode(regs));
bced35b6
AL
138
139 /*
140 * Sanity check: we need to be on the normal thread stack. This
141 * will catch asm bugs and any attempt to use ist_preempt_enable
142 * from double_fault.
143 */
a7fcf28d 144 BUG_ON((unsigned long)(current_top_of_stack() -
196bd485 145 current_stack_pointer) >= THREAD_SIZE);
bced35b6 146
aaee8c3c 147 preempt_enable_no_resched();
bced35b6
AL
148}
149
150/**
151 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
152 *
153 * Ends a non-atomic section started with ist_begin_non_atomic().
154 */
155void ist_end_non_atomic(void)
156{
aaee8c3c 157 preempt_disable();
bced35b6
AL
158}
159
9a93848f
PZ
160int is_valid_bugaddr(unsigned long addr)
161{
162 unsigned short ud;
163
164 if (addr < TASK_SIZE_MAX)
165 return 0;
166
167 if (probe_kernel_address((unsigned short *)addr, ud))
168 return 0;
169
170 return ud == INSN_UD0 || ud == INSN_UD2;
171}
172
8a524f80 173int fixup_bug(struct pt_regs *regs, int trapnr)
9a93848f
PZ
174{
175 if (trapnr != X86_TRAP_UD)
176 return 0;
177
178 switch (report_bug(regs->ip, regs)) {
179 case BUG_TRAP_TYPE_NONE:
180 case BUG_TRAP_TYPE_BUG:
181 break;
182
183 case BUG_TRAP_TYPE_WARN:
184 regs->ip += LEN_UD0;
185 return 1;
186 }
187
188 return 0;
189}
190
9326638c 191static nokprobe_inline int
c416ddf5
FW
192do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
193 struct pt_regs *regs, long error_code)
1da177e4 194{
d74ef111 195 if (v8086_mode(regs)) {
3c1326f8 196 /*
c416ddf5 197 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
198 * On nmi (interrupt 2), do_trap should not be called.
199 */
c416ddf5
FW
200 if (trapnr < X86_TRAP_UD) {
201 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
202 error_code, trapnr))
203 return 0;
204 }
205 return -1;
1da177e4 206 }
d74ef111 207
55474c48 208 if (!user_mode(regs)) {
9a93848f
PZ
209 if (fixup_exception(regs, trapnr))
210 return 0;
211
9a93848f
PZ
212 tsk->thread.error_code = error_code;
213 tsk->thread.trap_nr = trapnr;
214 die(str, regs, error_code);
c416ddf5 215 }
1da177e4 216
c416ddf5
FW
217 return -1;
218}
1da177e4 219
1c326c4d
ON
220static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
221 siginfo_t *info)
958d3d72
ON
222{
223 unsigned long siaddr;
224 int sicode;
225
226 switch (trapnr) {
1c326c4d
ON
227 default:
228 return SEND_SIG_PRIV;
229
958d3d72
ON
230 case X86_TRAP_DE:
231 sicode = FPE_INTDIV;
b02ef20a 232 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
233 break;
234 case X86_TRAP_UD:
235 sicode = ILL_ILLOPN;
b02ef20a 236 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
237 break;
238 case X86_TRAP_AC:
239 sicode = BUS_ADRALN;
240 siaddr = 0;
241 break;
242 }
243
244 info->si_signo = signr;
245 info->si_errno = 0;
246 info->si_code = sicode;
247 info->si_addr = (void __user *)siaddr;
1c326c4d 248 return info;
958d3d72
ON
249}
250
9326638c 251static void
c416ddf5
FW
252do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
253 long error_code, siginfo_t *info)
254{
255 struct task_struct *tsk = current;
256
257
258 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
259 return;
b5964405 260 /*
51e7dc70 261 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
262 * kernelspace faults which result in die(), but not
263 * kernelspace faults which are fixed up. die() gives the
264 * process no chance to handle the signal and notice the
265 * kernel fault information, so that won't result in polluting
266 * the information about previously queued, but not yet
267 * delivered, faults. See also do_general_protection below.
268 */
269 tsk->thread.error_code = error_code;
51e7dc70 270 tsk->thread.trap_nr = trapnr;
d1895183 271
081f75bb
AH
272 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
273 printk_ratelimit()) {
c767a54b
JP
274 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
275 tsk->comm, tsk->pid, str,
276 regs->ip, regs->sp, error_code);
1c99a687 277 print_vma_addr(KERN_CONT " in ", regs->ip);
c767a54b 278 pr_cont("\n");
081f75bb 279 }
081f75bb 280
38cad57b 281 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
1da177e4 282}
9326638c 283NOKPROBE_SYMBOL(do_trap);
1da177e4 284
dff0796e 285static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
1c326c4d 286 unsigned long trapnr, int signr)
dff0796e 287{
1c326c4d 288 siginfo_t info;
dff0796e 289
5778077d 290 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
02fdcd5e 291
b8347c21
AS
292 /*
293 * WARN*()s end up here; fix them up before we call the
294 * notifier chain.
295 */
296 if (!user_mode(regs) && fixup_bug(regs, trapnr))
297 return;
298
dff0796e
ON
299 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
300 NOTIFY_STOP) {
d99e1bd1 301 cond_local_irq_enable(regs);
1c326c4d
ON
302 do_trap(trapnr, signr, str, regs, error_code,
303 fill_trap_info(regs, signr, trapnr, &info));
dff0796e 304 }
dff0796e
ON
305}
306
b5964405 307#define DO_ERROR(trapnr, signr, str, name) \
e407d620 308dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 309{ \
1c326c4d 310 do_error_trap(regs, error_code, str, trapnr, signr); \
1da177e4
LT
311}
312
0eb14833
ON
313DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
314DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
0eb14833
ON
315DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
316DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
317DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
318DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
0eb14833 319DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
0eb14833 320DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
1da177e4 321
e37e43a4 322#ifdef CONFIG_VMAP_STACK
6271cfdf
AL
323__visible void __noreturn handle_stack_overflow(const char *message,
324 struct pt_regs *regs,
325 unsigned long fault_address)
e37e43a4
AL
326{
327 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
328 (void *)fault_address, current->stack,
329 (char *)current->stack + THREAD_SIZE - 1);
330 die(message, regs, 0);
331
332 /* Be absolutely certain we don't return. */
333 panic(message);
334}
335#endif
336
081f75bb
AH
337#ifdef CONFIG_X86_64
338/* Runs on IST stack */
081f75bb
AH
339dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
340{
341 static const char str[] = "double fault";
342 struct task_struct *tsk = current;
e37e43a4
AL
343#ifdef CONFIG_VMAP_STACK
344 unsigned long cr2;
345#endif
081f75bb 346
af726f21
AL
347#ifdef CONFIG_X86_ESPFIX64
348 extern unsigned char native_irq_return_iret[];
349
350 /*
351 * If IRET takes a non-IST fault on the espfix64 stack, then we
352 * end up promoting it to a doublefault. In that case, modify
353 * the stack to make it look like we just entered the #GP
354 * handler from user space, similar to bad_iret.
95927475
AL
355 *
356 * No need for ist_enter here because we don't use RCU.
af726f21
AL
357 */
358 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
359 regs->cs == __KERNEL_CS &&
360 regs->ip == (unsigned long)native_irq_return_iret)
361 {
362 struct pt_regs *normal_regs = task_pt_regs(current);
363
364 /* Fake a #GP(0) from userspace. */
365 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
366 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
367 regs->ip = (unsigned long)general_protection;
368 regs->sp = (unsigned long)&normal_regs->orig_ax;
95927475 369
af726f21
AL
370 return;
371 }
372#endif
373
8c84014f 374 ist_enter(regs);
c9408265 375 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
376
377 tsk->thread.error_code = error_code;
51e7dc70 378 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 379
e37e43a4
AL
380#ifdef CONFIG_VMAP_STACK
381 /*
382 * If we overflow the stack into a guard page, the CPU will fail
383 * to deliver #PF and will send #DF instead. Similarly, if we
384 * take any non-IST exception while too close to the bottom of
385 * the stack, the processor will get a page fault while
386 * delivering the exception and will generate a double fault.
387 *
388 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
389 * Page-Fault Exception (#PF):
390 *
391 * Processors update CR2 whenever a page fault is detected. If a
392 * second page fault occurs while an earlier page fault is being
393 * deliv- ered, the faulting linear address of the second fault will
394 * overwrite the contents of CR2 (replacing the previous
395 * address). These updates to CR2 occur even if the page fault
396 * results in a double fault or occurs during the delivery of a
397 * double fault.
398 *
399 * The logic below has a small possibility of incorrectly diagnosing
400 * some errors as stack overflows. For example, if the IDT or GDT
401 * gets corrupted such that #GP delivery fails due to a bad descriptor
402 * causing #GP and we hit this condition while CR2 coincidentally
403 * points to the stack guard page, we'll think we overflowed the
404 * stack. Given that we're going to panic one way or another
405 * if this happens, this isn't necessarily worth fixing.
406 *
407 * If necessary, we could improve the test by only diagnosing
408 * a stack overflow if the saved RSP points within 47 bytes of
409 * the bottom of the stack: if RSP == tsk_stack + 48 and we
410 * take an exception, the stack is already aligned and there
411 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
412 * possible error code, so a stack overflow would *not* double
413 * fault. With any less space left, exception delivery could
414 * fail, and, as a practical matter, we've overflowed the
415 * stack even if the actual trigger for the double fault was
416 * something else.
417 */
418 cr2 = read_cr2();
419 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
420 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
421#endif
422
4d067d8e
BP
423#ifdef CONFIG_DOUBLEFAULT
424 df_debug(regs, error_code);
425#endif
bd8b96df
IM
426 /*
427 * This is always a kernel trap and never fixable (and thus must
428 * never return).
429 */
081f75bb
AH
430 for (;;)
431 die(str, regs, error_code);
432}
433#endif
434
fe3d197f
DH
435dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
436{
1126cb45 437 const struct mpx_bndcsr *bndcsr;
fe3d197f
DH
438 siginfo_t *info;
439
5778077d 440 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
fe3d197f
DH
441 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
442 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
8c84014f 443 return;
d99e1bd1 444 cond_local_irq_enable(regs);
fe3d197f 445
f39b6f0e 446 if (!user_mode(regs))
fe3d197f
DH
447 die("bounds", regs, error_code);
448
449 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
450 /* The exception is not from Intel MPX */
451 goto exit_trap;
452 }
453
454 /*
455 * We need to look at BNDSTATUS to resolve this exception.
a84eeaa9
DH
456 * A NULL here might mean that it is in its 'init state',
457 * which is all zeros which indicates MPX was not
458 * responsible for the exception.
fe3d197f 459 */
d91cab78 460 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
fe3d197f
DH
461 if (!bndcsr)
462 goto exit_trap;
463
e7126cf5 464 trace_bounds_exception_mpx(bndcsr);
fe3d197f
DH
465 /*
466 * The error code field of the BNDSTATUS register communicates status
467 * information of a bound range exception #BR or operation involving
468 * bound directory.
469 */
470 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
471 case 2: /* Bound directory has invalid entry. */
46a6e0cf 472 if (mpx_handle_bd_fault())
fe3d197f
DH
473 goto exit_trap;
474 break; /* Success, it was handled */
475 case 1: /* Bound violation. */
46a6e0cf 476 info = mpx_generate_siginfo(regs);
e10abb2f 477 if (IS_ERR(info)) {
fe3d197f
DH
478 /*
479 * We failed to decode the MPX instruction. Act as if
480 * the exception was not caused by MPX.
481 */
482 goto exit_trap;
483 }
484 /*
485 * Success, we decoded the instruction and retrieved
486 * an 'info' containing the address being accessed
487 * which caused the exception. This information
488 * allows and application to possibly handle the
489 * #BR exception itself.
490 */
491 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
492 kfree(info);
493 break;
494 case 0: /* No exception caused by Intel MPX operations. */
495 goto exit_trap;
496 default:
497 die("bounds", regs, error_code);
498 }
499
fe3d197f 500 return;
8c84014f 501
fe3d197f
DH
502exit_trap:
503 /*
504 * This path out is for all the cases where we could not
505 * handle the exception in some way (like allocating a
506 * table or telling userspace about it. We will also end
507 * up here if the kernel has MPX turned off at compile
508 * time..
509 */
510 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
fe3d197f
DH
511}
512
9326638c 513dotraplinkage void
13485ab5 514do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 515{
13485ab5 516 struct task_struct *tsk;
b5964405 517
5778077d 518 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
d99e1bd1 519 cond_local_irq_enable(regs);
c6df0d71 520
d74ef111 521 if (v8086_mode(regs)) {
ef3f6288
FW
522 local_irq_enable();
523 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
8c84014f 524 return;
ef3f6288 525 }
1da177e4 526
13485ab5 527 tsk = current;
55474c48 528 if (!user_mode(regs)) {
548acf19 529 if (fixup_exception(regs, X86_TRAP_GP))
8c84014f 530 return;
ef3f6288
FW
531
532 tsk->thread.error_code = error_code;
533 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
534 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
535 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 536 die("general protection fault", regs, error_code);
8c84014f 537 return;
ef3f6288 538 }
1da177e4 539
13485ab5 540 tsk->thread.error_code = error_code;
51e7dc70 541 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 542
13485ab5
AH
543 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
544 printk_ratelimit()) {
c767a54b 545 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
546 tsk->comm, task_pid_nr(tsk),
547 regs->ip, regs->sp, error_code);
1c99a687 548 print_vma_addr(KERN_CONT " in ", regs->ip);
c767a54b 549 pr_cont("\n");
03252919 550 }
abd4f750 551
38cad57b 552 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
1da177e4 553}
9326638c 554NOKPROBE_SYMBOL(do_general_protection);
1da177e4 555
c1d518c8 556/* May run on IST stack. */
9326638c 557dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 558{
08d636b6 559#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
560 /*
561 * ftrace must be first, everything else may cause a recursive crash.
562 * See note by declaration of modifying_ftrace_code in ftrace.c
563 */
564 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
565 ftrace_int3_handler(regs))
08d636b6
SR
566 return;
567#endif
17f41571
JK
568 if (poke_int3_handler(regs))
569 return;
570
8c84014f 571 ist_enter(regs);
5778077d 572 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
f503b5ae 573#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
574 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
575 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 576 goto exit;
f503b5ae 577#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 578
6f6343f5
MH
579#ifdef CONFIG_KPROBES
580 if (kprobe_int3_handler(regs))
4cdf77a8 581 goto exit;
6f6343f5
MH
582#endif
583
c9408265
KC
584 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
585 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 586 goto exit;
b5964405 587
42181186
SR
588 /*
589 * Let others (NMI) know that the debug stack is in use
590 * as we may switch to the interrupt stack.
591 */
592 debug_stack_usage_inc();
d99e1bd1 593 cond_local_irq_enable(regs);
c9408265 594 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
d99e1bd1 595 cond_local_irq_disable(regs);
42181186 596 debug_stack_usage_dec();
6ba3c97a 597exit:
8c84014f 598 ist_exit(regs);
1da177e4 599}
9326638c 600NOKPROBE_SYMBOL(do_int3);
1da177e4 601
081f75bb 602#ifdef CONFIG_X86_64
bd8b96df 603/*
48e08d0f
AL
604 * Help handler running on IST stack to switch off the IST stack if the
605 * interrupted code was in user mode. The actual stack switch is done in
606 * entry_64.S
bd8b96df 607 */
7ddc6a21 608asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
081f75bb 609{
48e08d0f
AL
610 struct pt_regs *regs = task_pt_regs(current);
611 *regs = *eregs;
081f75bb
AH
612 return regs;
613}
9326638c 614NOKPROBE_SYMBOL(sync_regs);
b645af2d
AL
615
616struct bad_iret_stack {
617 void *error_entry_ret;
618 struct pt_regs regs;
619};
620
7ddc6a21 621asmlinkage __visible notrace
b645af2d
AL
622struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
623{
624 /*
625 * This is called from entry_64.S early in handling a fault
626 * caused by a bad iret to user mode. To handle the fault
627 * correctly, we want move our stack frame to task_pt_regs
628 * and we want to pretend that the exception came from the
629 * iret target.
630 */
631 struct bad_iret_stack *new_stack =
632 container_of(task_pt_regs(current),
633 struct bad_iret_stack, regs);
634
635 /* Copy the IRET target to the new stack. */
636 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
637
638 /* Copy the remainder of the stack from the current stack. */
639 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
640
f39b6f0e 641 BUG_ON(!user_mode(&new_stack->regs));
b645af2d
AL
642 return new_stack;
643}
7ddc6a21 644NOKPROBE_SYMBOL(fixup_bad_iret);
081f75bb
AH
645#endif
646
f2b37575
AL
647static bool is_sysenter_singlestep(struct pt_regs *regs)
648{
649 /*
650 * We don't try for precision here. If we're anywhere in the region of
651 * code that can be single-stepped in the SYSENTER entry path, then
652 * assume that this is a useless single-step trap due to SYSENTER
653 * being invoked with TF set. (We don't know in advance exactly
654 * which instructions will be hit because BTF could plausibly
655 * be set.)
656 */
657#ifdef CONFIG_X86_32
658 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
659 (unsigned long)__end_SYSENTER_singlestep_region -
660 (unsigned long)__begin_SYSENTER_singlestep_region;
661#elif defined(CONFIG_IA32_EMULATION)
662 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
663 (unsigned long)__end_entry_SYSENTER_compat -
664 (unsigned long)entry_SYSENTER_compat;
665#else
666 return false;
667#endif
668}
669
1da177e4
LT
670/*
671 * Our handling of the processor debug registers is non-trivial.
672 * We do not clear them on entry and exit from the kernel. Therefore
673 * it is possible to get a watchpoint trap here from inside the kernel.
674 * However, the code in ./ptrace.c has ensured that the user can
675 * only set watchpoints on userspace addresses. Therefore the in-kernel
676 * watchpoint trap can only occur in code which is reading/writing
677 * from user space. Such code must not hold kernel locks (since it
678 * can equally take a page fault), therefore it is safe to call
679 * force_sig_info even though that claims and releases locks.
b5964405 680 *
1da177e4
LT
681 * Code in ./signal.c ensures that the debug control register
682 * is restored before we deliver any signal, and therefore that
683 * user code runs with the correct debug control register even though
684 * we clear it here.
685 *
686 * Being careful here means that we don't have to be as careful in a
687 * lot of more complicated places (task switching can be a bit lazy
688 * about restoring all the debug state, and ptrace doesn't have to
689 * find every occurrence of the TF bit that could be saved away even
690 * by user code)
c1d518c8
AH
691 *
692 * May run on IST stack.
1da177e4 693 */
9326638c 694dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
1da177e4 695{
1da177e4 696 struct task_struct *tsk = current;
a1e80faf 697 int user_icebp = 0;
08d68323 698 unsigned long dr6;
da654b74 699 int si_code;
1da177e4 700
8c84014f 701 ist_enter(regs);
4cdf77a8 702
08d68323 703 get_debugreg(dr6, 6);
8bb56436
AL
704 /*
705 * The Intel SDM says:
706 *
707 * Certain debug exceptions may clear bits 0-3. The remaining
708 * contents of the DR6 register are never cleared by the
709 * processor. To avoid confusion in identifying debug
710 * exceptions, debug handlers should clear the register before
711 * returning to the interrupted task.
712 *
713 * Keep it simple: clear DR6 immediately.
714 */
715 set_debugreg(0, 6);
1da177e4 716
40f9249a
P
717 /* Filter out all the reserved bits which are preset to 1 */
718 dr6 &= ~DR6_RESERVED;
719
81edd9f6
AL
720 /*
721 * The SDM says "The processor clears the BTF flag when it
722 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
723 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
724 */
725 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
726
f2b37575
AL
727 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
728 is_sysenter_singlestep(regs))) {
729 dr6 &= ~DR_STEP;
730 if (!dr6)
731 goto exit;
732 /*
733 * else we might have gotten a single-step trap and hit a
734 * watchpoint at the same time, in which case we should fall
735 * through and handle the watchpoint.
736 */
737 }
738
a1e80faf
FW
739 /*
740 * If dr6 has no reason to give us about the origin of this trap,
741 * then it's very likely the result of an icebp/int01 trap.
742 * User wants a sigtrap for that.
743 */
f39b6f0e 744 if (!dr6 && user_mode(regs))
a1e80faf
FW
745 user_icebp = 1;
746
f2b37575 747 /* Catch kmemcheck conditions! */
eadb8a09 748 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 749 goto exit;
f8561296 750
08d68323
P
751 /* Store the virtualized DR6 value */
752 tsk->thread.debugreg6 = dr6;
753
6f6343f5
MH
754#ifdef CONFIG_KPROBES
755 if (kprobe_debug_handler(regs))
756 goto exit;
757#endif
758
5a802e15 759 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
62edab90 760 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 761 goto exit;
3d2a71a5 762
42181186
SR
763 /*
764 * Let others (NMI) know that the debug stack is in use
765 * as we may switch to the interrupt stack.
766 */
767 debug_stack_usage_inc();
768
1da177e4 769 /* It's safe to allow irq's after DR6 has been saved */
d99e1bd1 770 cond_local_irq_enable(regs);
1da177e4 771
d74ef111 772 if (v8086_mode(regs)) {
c9408265
KC
773 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
774 X86_TRAP_DB);
d99e1bd1 775 cond_local_irq_disable(regs);
42181186 776 debug_stack_usage_dec();
6ba3c97a 777 goto exit;
1da177e4
LT
778 }
779
f2b37575
AL
780 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
781 /*
782 * Historical junk that used to handle SYSENTER single-stepping.
783 * This should be unreachable now. If we survive for a while
784 * without anyone hitting this warning, we'll turn this into
785 * an oops.
786 */
08d68323
P
787 tsk->thread.debugreg6 &= ~DR_STEP;
788 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
789 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 790 }
08d68323 791 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 792 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 793 send_sigtrap(tsk, regs, error_code, si_code);
d99e1bd1 794 cond_local_irq_disable(regs);
42181186 795 debug_stack_usage_dec();
1da177e4 796
6ba3c97a 797exit:
2a41aa4f
AL
798#if defined(CONFIG_X86_32)
799 /*
800 * This is the most likely code path that involves non-trivial use
801 * of the SYSENTER stack. Check that we haven't overrun it.
802 */
803 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
804 "Overran or corrupted SYSENTER stack\n");
805#endif
8c84014f 806 ist_exit(regs);
1da177e4 807}
9326638c 808NOKPROBE_SYMBOL(do_debug);
1da177e4
LT
809
810/*
811 * Note that we play around with the 'TS' bit in an attempt to get
812 * the correct behaviour even in the presence of the asynchronous
813 * IRQ13 behaviour
814 */
5e1b05be 815static void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 816{
e2e75c91 817 struct task_struct *task = current;
e1cebad4 818 struct fpu *fpu = &task->thread.fpu;
1da177e4 819 siginfo_t info;
c9408265
KC
820 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
821 "simd exception";
e2e75c91
BG
822
823 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
824 return;
d99e1bd1 825 cond_local_irq_enable(regs);
e2e75c91 826
e1cebad4 827 if (!user_mode(regs)) {
548acf19 828 if (!fixup_exception(regs, trapnr)) {
e2e75c91 829 task->thread.error_code = error_code;
51e7dc70 830 task->thread.trap_nr = trapnr;
e2e75c91
BG
831 die(str, regs, error_code);
832 }
833 return;
834 }
1da177e4
LT
835
836 /*
837 * Save the info for the exception handler and clear the error.
838 */
e1cebad4
IM
839 fpu__save(fpu);
840
841 task->thread.trap_nr = trapnr;
9b6dba9e 842 task->thread.error_code = error_code;
e1cebad4
IM
843 info.si_signo = SIGFPE;
844 info.si_errno = 0;
845 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
adf77bac 846
e1cebad4 847 info.si_code = fpu__exception_code(fpu, trapnr);
adf77bac 848
e1cebad4
IM
849 /* Retry when we get spurious exceptions: */
850 if (!info.si_code)
c9408265 851 return;
e1cebad4 852
1da177e4
LT
853 force_sig_info(SIGFPE, &info, task);
854}
855
e407d620 856dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 857{
5778077d 858 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
c9408265 859 math_error(regs, error_code, X86_TRAP_MF);
1da177e4
LT
860}
861
e407d620
AH
862dotraplinkage void
863do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 864{
5778077d 865 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
c9408265 866 math_error(regs, error_code, X86_TRAP_XF);
1da177e4
LT
867}
868
e407d620
AH
869dotraplinkage void
870do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 871{
d99e1bd1 872 cond_local_irq_enable(regs);
081f75bb
AH
873}
874
9326638c 875dotraplinkage void
aa78bcfa 876do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 877{
bef8b6da
AL
878 unsigned long cr0;
879
5778077d 880 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
304bceda 881
a334fe43 882#ifdef CONFIG_MATH_EMULATION
c6ab109f 883 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
d315760f
TH
884 struct math_emu_info info = { };
885
d99e1bd1 886 cond_local_irq_enable(regs);
d315760f 887
aa78bcfa 888 info.regs = regs;
d315760f 889 math_emulate(&info);
a334fe43 890 return;
7643e9b9 891 }
a334fe43 892#endif
bef8b6da
AL
893
894 /* This should not happen. */
895 cr0 = read_cr0();
896 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
897 /* Try to fix it up and carry on. */
898 write_cr0(cr0 & ~X86_CR0_TS);
899 } else {
900 /*
901 * Something terrible happened, and we're better off trying
902 * to kill the task than getting stuck in a never-ending
903 * loop of #NM faults.
904 */
905 die("unexpected #NM exception", regs, error_code);
906 }
7643e9b9 907}
9326638c 908NOKPROBE_SYMBOL(do_device_not_available);
7643e9b9 909
081f75bb 910#ifdef CONFIG_X86_32
e407d620 911dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
912{
913 siginfo_t info;
6ba3c97a 914
5778077d 915 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
f8e0870f
AH
916 local_irq_enable();
917
918 info.si_signo = SIGILL;
919 info.si_errno = 0;
920 info.si_code = ILL_BADSTK;
fc6fcdfb 921 info.si_addr = NULL;
c9408265 922 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
923 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
924 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
925 &info);
926 }
f8e0870f 927}
081f75bb 928#endif
f8e0870f 929
1da177e4
LT
930void __init trap_init(void)
931{
b70543a0 932 idt_setup_traps();
bb3f0b59 933
4eefbe79
KC
934 /*
935 * Set the IDT descriptor to a fixed read-only location, so that the
936 * "sidt" instruction will not leak the location of the kernel, and
937 * to defend the IDT against arbitrary memory write vulnerabilities.
938 * It will be reloaded in cpu_init() */
939 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
940 idt_descr.address = fix_to_virt(FIX_RO_IDT);
941
1da177e4 942 /*
b5964405 943 * Should be a barrier for any external CPU state:
1da177e4
LT
944 */
945 cpu_init();
946
90f6225f 947 idt_setup_ist_traps();
b4d83270 948
428cf902 949 x86_init.irqs.trap_init();
228bdaa9 950
0a30908b 951 idt_setup_debugidt_traps();
1da177e4 952}