]> git.proxmox.com Git - qemu.git/blame - arch_init.c
migration: use qemu_file_get_error() return value when possible
[qemu.git] / arch_init.c
CommitLineData
ad96090a
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#include <stdint.h>
25#include <stdarg.h>
b2e0a138 26#include <stdlib.h>
ad96090a 27#ifndef _WIN32
1c47cb16 28#include <sys/types.h>
ad96090a
BS
29#include <sys/mman.h>
30#endif
31#include "config.h"
32#include "monitor.h"
33#include "sysemu.h"
34#include "arch_init.h"
35#include "audio/audio.h"
36#include "hw/pc.h"
37#include "hw/pci.h"
38#include "hw/audiodev.h"
39#include "kvm.h"
40#include "migration.h"
41#include "net.h"
42#include "gdbstub.h"
43#include "hw/smbios.h"
44
45#ifdef TARGET_SPARC
46int graphic_width = 1024;
47int graphic_height = 768;
48int graphic_depth = 8;
49#else
50int graphic_width = 800;
51int graphic_height = 600;
52int graphic_depth = 15;
53#endif
54
55const char arch_config_name[] = CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf";
56
57#if defined(TARGET_ALPHA)
58#define QEMU_ARCH QEMU_ARCH_ALPHA
59#elif defined(TARGET_ARM)
60#define QEMU_ARCH QEMU_ARCH_ARM
61#elif defined(TARGET_CRIS)
62#define QEMU_ARCH QEMU_ARCH_CRIS
63#elif defined(TARGET_I386)
64#define QEMU_ARCH QEMU_ARCH_I386
65#elif defined(TARGET_M68K)
66#define QEMU_ARCH QEMU_ARCH_M68K
81ea0e13
MW
67#elif defined(TARGET_LM32)
68#define QEMU_ARCH QEMU_ARCH_LM32
ad96090a
BS
69#elif defined(TARGET_MICROBLAZE)
70#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
71#elif defined(TARGET_MIPS)
72#define QEMU_ARCH QEMU_ARCH_MIPS
73#elif defined(TARGET_PPC)
74#define QEMU_ARCH QEMU_ARCH_PPC
75#elif defined(TARGET_S390X)
76#define QEMU_ARCH QEMU_ARCH_S390X
77#elif defined(TARGET_SH4)
78#define QEMU_ARCH QEMU_ARCH_SH4
79#elif defined(TARGET_SPARC)
80#define QEMU_ARCH QEMU_ARCH_SPARC
2328826b
MF
81#elif defined(TARGET_XTENSA)
82#define QEMU_ARCH QEMU_ARCH_XTENSA
ad96090a
BS
83#endif
84
85const uint32_t arch_type = QEMU_ARCH;
86
87/***********************************************************/
88/* ram save/restore */
89
d20878d2
YT
90#define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */
91#define RAM_SAVE_FLAG_COMPRESS 0x02
92#define RAM_SAVE_FLAG_MEM_SIZE 0x04
93#define RAM_SAVE_FLAG_PAGE 0x08
94#define RAM_SAVE_FLAG_EOS 0x10
95#define RAM_SAVE_FLAG_CONTINUE 0x20
ad96090a
BS
96
97static int is_dup_page(uint8_t *page, uint8_t ch)
98{
99 uint32_t val = ch << 24 | ch << 16 | ch << 8 | ch;
100 uint32_t *array = (uint32_t *)page;
101 int i;
102
103 for (i = 0; i < (TARGET_PAGE_SIZE / 4); i++) {
104 if (array[i] != val) {
105 return 0;
106 }
107 }
108
109 return 1;
110}
111
760e77ea
AW
112static RAMBlock *last_block;
113static ram_addr_t last_offset;
114
ad96090a
BS
115static int ram_save_block(QEMUFile *f)
116{
e44359c3
AW
117 RAMBlock *block = last_block;
118 ram_addr_t offset = last_offset;
119 ram_addr_t current_addr;
3fc250b4 120 int bytes_sent = 0;
ad96090a 121
e44359c3
AW
122 if (!block)
123 block = QLIST_FIRST(&ram_list.blocks);
124
125 current_addr = block->offset + offset;
126
127 do {
ad96090a
BS
128 if (cpu_physical_memory_get_dirty(current_addr, MIGRATION_DIRTY_FLAG)) {
129 uint8_t *p;
a55bbe31 130 int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
ad96090a
BS
131
132 cpu_physical_memory_reset_dirty(current_addr,
133 current_addr + TARGET_PAGE_SIZE,
134 MIGRATION_DIRTY_FLAG);
135
97ab12d4 136 p = block->host + offset;
ad96090a
BS
137
138 if (is_dup_page(p, *p)) {
a55bbe31
AW
139 qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_COMPRESS);
140 if (!cont) {
141 qemu_put_byte(f, strlen(block->idstr));
142 qemu_put_buffer(f, (uint8_t *)block->idstr,
143 strlen(block->idstr));
144 }
ad96090a 145 qemu_put_byte(f, *p);
3fc250b4 146 bytes_sent = 1;
ad96090a 147 } else {
a55bbe31
AW
148 qemu_put_be64(f, offset | cont | RAM_SAVE_FLAG_PAGE);
149 if (!cont) {
150 qemu_put_byte(f, strlen(block->idstr));
151 qemu_put_buffer(f, (uint8_t *)block->idstr,
152 strlen(block->idstr));
153 }
ad96090a 154 qemu_put_buffer(f, p, TARGET_PAGE_SIZE);
3fc250b4 155 bytes_sent = TARGET_PAGE_SIZE;
ad96090a
BS
156 }
157
ad96090a
BS
158 break;
159 }
e44359c3
AW
160
161 offset += TARGET_PAGE_SIZE;
162 if (offset >= block->length) {
163 offset = 0;
164 block = QLIST_NEXT(block, next);
165 if (!block)
166 block = QLIST_FIRST(&ram_list.blocks);
167 }
168
169 current_addr = block->offset + offset;
170
171 } while (current_addr != last_block->offset + last_offset);
172
173 last_block = block;
174 last_offset = offset;
ad96090a 175
3fc250b4 176 return bytes_sent;
ad96090a
BS
177}
178
179static uint64_t bytes_transferred;
180
181static ram_addr_t ram_save_remaining(void)
182{
e44359c3 183 RAMBlock *block;
ad96090a
BS
184 ram_addr_t count = 0;
185
e44359c3
AW
186 QLIST_FOREACH(block, &ram_list.blocks, next) {
187 ram_addr_t addr;
188 for (addr = block->offset; addr < block->offset + block->length;
189 addr += TARGET_PAGE_SIZE) {
190 if (cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) {
191 count++;
192 }
ad96090a
BS
193 }
194 }
195
196 return count;
197}
198
199uint64_t ram_bytes_remaining(void)
200{
201 return ram_save_remaining() * TARGET_PAGE_SIZE;
202}
203
204uint64_t ram_bytes_transferred(void)
205{
206 return bytes_transferred;
207}
208
209uint64_t ram_bytes_total(void)
210{
d17b5288
AW
211 RAMBlock *block;
212 uint64_t total = 0;
213
214 QLIST_FOREACH(block, &ram_list.blocks, next)
215 total += block->length;
216
217 return total;
ad96090a
BS
218}
219
b2e0a138
MT
220static int block_compar(const void *a, const void *b)
221{
222 RAMBlock * const *ablock = a;
223 RAMBlock * const *bblock = b;
224 if ((*ablock)->offset < (*bblock)->offset) {
225 return -1;
226 } else if ((*ablock)->offset > (*bblock)->offset) {
227 return 1;
228 }
229 return 0;
230}
231
232static void sort_ram_list(void)
233{
234 RAMBlock *block, *nblock, **blocks;
235 int n;
236 n = 0;
237 QLIST_FOREACH(block, &ram_list.blocks, next) {
238 ++n;
239 }
7267c094 240 blocks = g_malloc(n * sizeof *blocks);
b2e0a138
MT
241 n = 0;
242 QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) {
243 blocks[n++] = block;
244 QLIST_REMOVE(block, next);
245 }
246 qsort(blocks, n, sizeof *blocks, block_compar);
247 while (--n >= 0) {
248 QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next);
249 }
7267c094 250 g_free(blocks);
b2e0a138
MT
251}
252
ad96090a
BS
253int ram_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque)
254{
255 ram_addr_t addr;
256 uint64_t bytes_transferred_last;
257 double bwidth = 0;
258 uint64_t expected_time = 0;
259
260 if (stage < 0) {
261 cpu_physical_memory_set_dirty_tracking(0);
262 return 0;
263 }
264
265 if (cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX) != 0) {
dcd1d224 266 qemu_file_set_error(f, -EINVAL);
ad96090a
BS
267 return 0;
268 }
269
270 if (stage == 1) {
97ab12d4 271 RAMBlock *block;
ad96090a 272 bytes_transferred = 0;
760e77ea
AW
273 last_block = NULL;
274 last_offset = 0;
b2e0a138 275 sort_ram_list();
ad96090a
BS
276
277 /* Make sure all dirty bits are set */
e44359c3
AW
278 QLIST_FOREACH(block, &ram_list.blocks, next) {
279 for (addr = block->offset; addr < block->offset + block->length;
280 addr += TARGET_PAGE_SIZE) {
281 if (!cpu_physical_memory_get_dirty(addr,
282 MIGRATION_DIRTY_FLAG)) {
283 cpu_physical_memory_set_dirty(addr);
284 }
ad96090a
BS
285 }
286 }
287
288 /* Enable dirty memory tracking */
289 cpu_physical_memory_set_dirty_tracking(1);
290
e44359c3 291 qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE);
97ab12d4
AW
292
293 QLIST_FOREACH(block, &ram_list.blocks, next) {
294 qemu_put_byte(f, strlen(block->idstr));
295 qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr));
296 qemu_put_be64(f, block->length);
297 }
ad96090a
BS
298 }
299
300 bytes_transferred_last = bytes_transferred;
301 bwidth = qemu_get_clock_ns(rt_clock);
302
303 while (!qemu_file_rate_limit(f)) {
3fc250b4 304 int bytes_sent;
ad96090a 305
3fc250b4
PR
306 bytes_sent = ram_save_block(f);
307 bytes_transferred += bytes_sent;
308 if (bytes_sent == 0) { /* no more blocks */
ad96090a
BS
309 break;
310 }
311 }
312
313 bwidth = qemu_get_clock_ns(rt_clock) - bwidth;
314 bwidth = (bytes_transferred - bytes_transferred_last) / bwidth;
315
316 /* if we haven't transferred anything this round, force expected_time to a
317 * a very high value, but without crashing */
318 if (bwidth == 0) {
319 bwidth = 0.000001;
320 }
321
322 /* try transferring iterative blocks of memory */
323 if (stage == 3) {
3fc250b4
PR
324 int bytes_sent;
325
ad96090a 326 /* flush all remaining blocks regardless of rate limiting */
3fc250b4
PR
327 while ((bytes_sent = ram_save_block(f)) != 0) {
328 bytes_transferred += bytes_sent;
ad96090a
BS
329 }
330 cpu_physical_memory_set_dirty_tracking(0);
331 }
332
333 qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
334
335 expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth;
336
337 return (stage == 2) && (expected_time <= migrate_max_downtime());
338}
339
a55bbe31
AW
340static inline void *host_from_stream_offset(QEMUFile *f,
341 ram_addr_t offset,
342 int flags)
343{
344 static RAMBlock *block = NULL;
345 char id[256];
346 uint8_t len;
347
348 if (flags & RAM_SAVE_FLAG_CONTINUE) {
349 if (!block) {
350 fprintf(stderr, "Ack, bad migration stream!\n");
351 return NULL;
352 }
353
354 return block->host + offset;
355 }
356
357 len = qemu_get_byte(f);
358 qemu_get_buffer(f, (uint8_t *)id, len);
359 id[len] = 0;
360
361 QLIST_FOREACH(block, &ram_list.blocks, next) {
362 if (!strncmp(id, block->idstr, sizeof(id)))
363 return block->host + offset;
364 }
365
366 fprintf(stderr, "Can't find block %s!\n", id);
367 return NULL;
368}
369
ad96090a
BS
370int ram_load(QEMUFile *f, void *opaque, int version_id)
371{
372 ram_addr_t addr;
373 int flags;
42802d47 374 int error;
ad96090a 375
97ab12d4 376 if (version_id < 3 || version_id > 4) {
ad96090a
BS
377 return -EINVAL;
378 }
379
380 do {
381 addr = qemu_get_be64(f);
382
383 flags = addr & ~TARGET_PAGE_MASK;
384 addr &= TARGET_PAGE_MASK;
385
386 if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
97ab12d4
AW
387 if (version_id == 3) {
388 if (addr != ram_bytes_total()) {
389 return -EINVAL;
390 }
391 } else {
392 /* Synchronize RAM block list */
393 char id[256];
394 ram_addr_t length;
395 ram_addr_t total_ram_bytes = addr;
396
397 while (total_ram_bytes) {
398 RAMBlock *block;
399 uint8_t len;
400
401 len = qemu_get_byte(f);
402 qemu_get_buffer(f, (uint8_t *)id, len);
403 id[len] = 0;
404 length = qemu_get_be64(f);
405
406 QLIST_FOREACH(block, &ram_list.blocks, next) {
407 if (!strncmp(id, block->idstr, sizeof(id))) {
408 if (block->length != length)
409 return -EINVAL;
410 break;
411 }
412 }
413
414 if (!block) {
fb787f81
AW
415 fprintf(stderr, "Unknown ramblock \"%s\", cannot "
416 "accept migration\n", id);
417 return -EINVAL;
97ab12d4
AW
418 }
419
420 total_ram_bytes -= length;
421 }
ad96090a
BS
422 }
423 }
424
425 if (flags & RAM_SAVE_FLAG_COMPRESS) {
97ab12d4
AW
426 void *host;
427 uint8_t ch;
428
a55bbe31 429 if (version_id == 3)
97ab12d4 430 host = qemu_get_ram_ptr(addr);
a55bbe31
AW
431 else
432 host = host_from_stream_offset(f, addr, flags);
492fb99c
MT
433 if (!host) {
434 return -EINVAL;
435 }
97ab12d4 436
97ab12d4
AW
437 ch = qemu_get_byte(f);
438 memset(host, ch, TARGET_PAGE_SIZE);
ad96090a
BS
439#ifndef _WIN32
440 if (ch == 0 &&
441 (!kvm_enabled() || kvm_has_sync_mmu())) {
e78815a5 442 qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED);
ad96090a
BS
443 }
444#endif
445 } else if (flags & RAM_SAVE_FLAG_PAGE) {
97ab12d4
AW
446 void *host;
447
a55bbe31 448 if (version_id == 3)
97ab12d4 449 host = qemu_get_ram_ptr(addr);
a55bbe31
AW
450 else
451 host = host_from_stream_offset(f, addr, flags);
97ab12d4 452
97ab12d4 453 qemu_get_buffer(f, host, TARGET_PAGE_SIZE);
ad96090a 454 }
42802d47
JQ
455 error = qemu_file_get_error(f);
456 if (error) {
457 return error;
ad96090a
BS
458 }
459 } while (!(flags & RAM_SAVE_FLAG_EOS));
460
461 return 0;
462}
463
ad96090a 464#ifdef HAS_AUDIO
0dfa5ef9
IY
465struct soundhw {
466 const char *name;
467 const char *descr;
468 int enabled;
469 int isa;
470 union {
471 int (*init_isa) (qemu_irq *pic);
472 int (*init_pci) (PCIBus *bus);
473 } init;
474};
475
476static struct soundhw soundhw[] = {
ad96090a
BS
477#ifdef HAS_AUDIO_CHOICE
478#if defined(TARGET_I386) || defined(TARGET_MIPS)
479 {
480 "pcspk",
481 "PC speaker",
482 0,
483 1,
484 { .init_isa = pcspk_audio_init }
485 },
486#endif
487
488#ifdef CONFIG_SB16
489 {
490 "sb16",
491 "Creative Sound Blaster 16",
492 0,
493 1,
494 { .init_isa = SB16_init }
495 },
496#endif
497
498#ifdef CONFIG_CS4231A
499 {
500 "cs4231a",
501 "CS4231A",
502 0,
503 1,
504 { .init_isa = cs4231a_init }
505 },
506#endif
507
508#ifdef CONFIG_ADLIB
509 {
510 "adlib",
511#ifdef HAS_YMF262
512 "Yamaha YMF262 (OPL3)",
513#else
514 "Yamaha YM3812 (OPL2)",
515#endif
516 0,
517 1,
518 { .init_isa = Adlib_init }
519 },
520#endif
521
522#ifdef CONFIG_GUS
523 {
524 "gus",
525 "Gravis Ultrasound GF1",
526 0,
527 1,
528 { .init_isa = GUS_init }
529 },
530#endif
531
532#ifdef CONFIG_AC97
533 {
534 "ac97",
535 "Intel 82801AA AC97 Audio",
536 0,
537 0,
538 { .init_pci = ac97_init }
539 },
540#endif
541
542#ifdef CONFIG_ES1370
543 {
544 "es1370",
545 "ENSONIQ AudioPCI ES1370",
546 0,
547 0,
548 { .init_pci = es1370_init }
549 },
550#endif
551
d61a4ce8
GH
552#ifdef CONFIG_HDA
553 {
554 "hda",
555 "Intel HD Audio",
556 0,
557 0,
558 { .init_pci = intel_hda_and_codec_init }
559 },
560#endif
561
ad96090a
BS
562#endif /* HAS_AUDIO_CHOICE */
563
564 { NULL, NULL, 0, 0, { NULL } }
565};
566
567void select_soundhw(const char *optarg)
568{
569 struct soundhw *c;
570
571 if (*optarg == '?') {
572 show_valid_cards:
573
574 printf("Valid sound card names (comma separated):\n");
575 for (c = soundhw; c->name; ++c) {
576 printf ("%-11s %s\n", c->name, c->descr);
577 }
578 printf("\n-soundhw all will enable all of the above\n");
579 exit(*optarg != '?');
580 }
581 else {
582 size_t l;
583 const char *p;
584 char *e;
585 int bad_card = 0;
586
587 if (!strcmp(optarg, "all")) {
588 for (c = soundhw; c->name; ++c) {
589 c->enabled = 1;
590 }
591 return;
592 }
593
594 p = optarg;
595 while (*p) {
596 e = strchr(p, ',');
597 l = !e ? strlen(p) : (size_t) (e - p);
598
599 for (c = soundhw; c->name; ++c) {
600 if (!strncmp(c->name, p, l) && !c->name[l]) {
601 c->enabled = 1;
602 break;
603 }
604 }
605
606 if (!c->name) {
607 if (l > 80) {
608 fprintf(stderr,
609 "Unknown sound card name (too big to show)\n");
610 }
611 else {
612 fprintf(stderr, "Unknown sound card name `%.*s'\n",
613 (int) l, p);
614 }
615 bad_card = 1;
616 }
617 p += l + (e != NULL);
618 }
619
620 if (bad_card) {
621 goto show_valid_cards;
622 }
623 }
624}
0dfa5ef9
IY
625
626void audio_init(qemu_irq *isa_pic, PCIBus *pci_bus)
627{
628 struct soundhw *c;
629
630 for (c = soundhw; c->name; ++c) {
631 if (c->enabled) {
632 if (c->isa) {
633 if (isa_pic) {
634 c->init.init_isa(isa_pic);
635 }
636 } else {
637 if (pci_bus) {
638 c->init.init_pci(pci_bus);
639 }
640 }
641 }
642 }
643}
ad96090a
BS
644#else
645void select_soundhw(const char *optarg)
646{
647}
0dfa5ef9
IY
648void audio_init(qemu_irq *isa_pic, PCIBus *pci_bus)
649{
650}
ad96090a
BS
651#endif
652
653int qemu_uuid_parse(const char *str, uint8_t *uuid)
654{
655 int ret;
656
657 if (strlen(str) != 36) {
658 return -1;
659 }
660
661 ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3],
662 &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9],
663 &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14],
664 &uuid[15]);
665
666 if (ret != 16) {
667 return -1;
668 }
669#ifdef TARGET_I386
670 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid);
671#endif
672 return 0;
673}
674
675void do_acpitable_option(const char *optarg)
676{
677#ifdef TARGET_I386
678 if (acpi_table_add(optarg) < 0) {
679 fprintf(stderr, "Wrong acpi table provided\n");
680 exit(1);
681 }
682#endif
683}
684
685void do_smbios_option(const char *optarg)
686{
687#ifdef TARGET_I386
688 if (smbios_entry_add(optarg) < 0) {
689 fprintf(stderr, "Wrong smbios provided\n");
690 exit(1);
691 }
692#endif
693}
694
695void cpudef_init(void)
696{
697#if defined(cpudef_setup)
698 cpudef_setup(); /* parse cpu definitions in target config file */
699#endif
700}
701
702int audio_available(void)
703{
704#ifdef HAS_AUDIO
705 return 1;
706#else
707 return 0;
708#endif
709}
710
303d4e86
AP
711int tcg_available(void)
712{
713 return 1;
714}
715
ad96090a
BS
716int kvm_available(void)
717{
718#ifdef CONFIG_KVM
719 return 1;
720#else
721 return 0;
722#endif
723}
724
725int xen_available(void)
726{
727#ifdef CONFIG_XEN
728 return 1;
729#else
730 return 0;
731#endif
732}