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Only calculate expected_time for stage 2
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CommitLineData
ad96090a
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#include <stdint.h>
25#include <stdarg.h>
b2e0a138 26#include <stdlib.h>
ad96090a 27#ifndef _WIN32
1c47cb16 28#include <sys/types.h>
ad96090a
BS
29#include <sys/mman.h>
30#endif
31#include "config.h"
32#include "monitor.h"
33#include "sysemu.h"
34#include "arch_init.h"
35#include "audio/audio.h"
36#include "hw/pc.h"
37#include "hw/pci.h"
38#include "hw/audiodev.h"
39#include "kvm.h"
40#include "migration.h"
41#include "net.h"
42#include "gdbstub.h"
43#include "hw/smbios.h"
86e775c6 44#include "exec-memory.h"
302fe51b 45#include "hw/pcspk.h"
ad96090a 46
3a697f69
OW
47#ifdef DEBUG_ARCH_INIT
48#define DPRINTF(fmt, ...) \
49 do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0)
50#else
51#define DPRINTF(fmt, ...) \
52 do { } while (0)
53#endif
54
ad96090a
BS
55#ifdef TARGET_SPARC
56int graphic_width = 1024;
57int graphic_height = 768;
58int graphic_depth = 8;
59#else
60int graphic_width = 800;
61int graphic_height = 600;
62int graphic_depth = 15;
63#endif
64
ad96090a
BS
65
66#if defined(TARGET_ALPHA)
67#define QEMU_ARCH QEMU_ARCH_ALPHA
68#elif defined(TARGET_ARM)
69#define QEMU_ARCH QEMU_ARCH_ARM
70#elif defined(TARGET_CRIS)
71#define QEMU_ARCH QEMU_ARCH_CRIS
72#elif defined(TARGET_I386)
73#define QEMU_ARCH QEMU_ARCH_I386
74#elif defined(TARGET_M68K)
75#define QEMU_ARCH QEMU_ARCH_M68K
81ea0e13
MW
76#elif defined(TARGET_LM32)
77#define QEMU_ARCH QEMU_ARCH_LM32
ad96090a
BS
78#elif defined(TARGET_MICROBLAZE)
79#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
80#elif defined(TARGET_MIPS)
81#define QEMU_ARCH QEMU_ARCH_MIPS
82#elif defined(TARGET_PPC)
83#define QEMU_ARCH QEMU_ARCH_PPC
84#elif defined(TARGET_S390X)
85#define QEMU_ARCH QEMU_ARCH_S390X
86#elif defined(TARGET_SH4)
87#define QEMU_ARCH QEMU_ARCH_SH4
88#elif defined(TARGET_SPARC)
89#define QEMU_ARCH QEMU_ARCH_SPARC
2328826b
MF
90#elif defined(TARGET_XTENSA)
91#define QEMU_ARCH QEMU_ARCH_XTENSA
ad96090a
BS
92#endif
93
94const uint32_t arch_type = QEMU_ARCH;
95
96/***********************************************************/
97/* ram save/restore */
98
d20878d2
YT
99#define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */
100#define RAM_SAVE_FLAG_COMPRESS 0x02
101#define RAM_SAVE_FLAG_MEM_SIZE 0x04
102#define RAM_SAVE_FLAG_PAGE 0x08
103#define RAM_SAVE_FLAG_EOS 0x10
104#define RAM_SAVE_FLAG_CONTINUE 0x20
ad96090a 105
86003615
PB
106#ifdef __ALTIVEC__
107#include <altivec.h>
108#define VECTYPE vector unsigned char
109#define SPLAT(p) vec_splat(vec_ld(0, p), 0)
110#define ALL_EQ(v1, v2) vec_all_eq(v1, v2)
f283edc4
AF
111/* altivec.h may redefine the bool macro as vector type.
112 * Reset it to POSIX semantics. */
113#undef bool
114#define bool _Bool
86003615
PB
115#elif defined __SSE2__
116#include <emmintrin.h>
117#define VECTYPE __m128i
118#define SPLAT(p) _mm_set1_epi8(*(p))
119#define ALL_EQ(v1, v2) (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 0xFFFF)
120#else
121#define VECTYPE unsigned long
122#define SPLAT(p) (*(p) * (~0UL / 255))
123#define ALL_EQ(v1, v2) ((v1) == (v2))
124#endif
125
b5a8fe5e 126
756557de
EH
127static struct defconfig_file {
128 const char *filename;
f29a5614
EH
129 /* Indicates it is an user config file (disabled by -no-user-config) */
130 bool userconfig;
756557de 131} default_config_files[] = {
e2d87bff 132 { CONFIG_QEMU_DATADIR "/cpus-" TARGET_ARCH ".conf", false },
f29a5614
EH
133 { CONFIG_QEMU_CONFDIR "/qemu.conf", true },
134 { CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf", true },
756557de
EH
135 { NULL }, /* end of list */
136};
137
138
f29a5614 139int qemu_read_default_config_files(bool userconfig)
b5a8fe5e
EH
140{
141 int ret;
756557de 142 struct defconfig_file *f;
b5a8fe5e 143
756557de 144 for (f = default_config_files; f->filename; f++) {
f29a5614
EH
145 if (!userconfig && f->userconfig) {
146 continue;
147 }
756557de
EH
148 ret = qemu_read_config_file(f->filename);
149 if (ret < 0 && ret != -ENOENT) {
150 return ret;
151 }
b5a8fe5e 152 }
756557de 153
b5a8fe5e
EH
154 return 0;
155}
156
86003615 157static int is_dup_page(uint8_t *page)
ad96090a 158{
86003615
PB
159 VECTYPE *p = (VECTYPE *)page;
160 VECTYPE val = SPLAT(page);
ad96090a
BS
161 int i;
162
86003615
PB
163 for (i = 0; i < TARGET_PAGE_SIZE / sizeof(VECTYPE); i++) {
164 if (!ALL_EQ(val, p[i])) {
ad96090a
BS
165 return 0;
166 }
167 }
168
169 return 1;
170}
171
0c51f43d
OW
172static void save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset,
173 int cont, int flag)
174{
175 qemu_put_be64(f, offset | cont | flag);
176 if (!cont) {
177 qemu_put_byte(f, strlen(block->idstr));
178 qemu_put_buffer(f, (uint8_t *)block->idstr,
179 strlen(block->idstr));
180 }
181
182}
183
760e77ea
AW
184static RAMBlock *last_block;
185static ram_addr_t last_offset;
186
ad96090a
BS
187static int ram_save_block(QEMUFile *f)
188{
e44359c3
AW
189 RAMBlock *block = last_block;
190 ram_addr_t offset = last_offset;
3fc250b4 191 int bytes_sent = 0;
71c510e2 192 MemoryRegion *mr;
ad96090a 193
e44359c3
AW
194 if (!block)
195 block = QLIST_FIRST(&ram_list.blocks);
196
e44359c3 197 do {
71c510e2 198 mr = block->mr;
cd7a45c9
BS
199 if (memory_region_get_dirty(mr, offset, TARGET_PAGE_SIZE,
200 DIRTY_MEMORY_MIGRATION)) {
ad96090a 201 uint8_t *p;
a55bbe31 202 int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
ad96090a 203
71c510e2
AK
204 memory_region_reset_dirty(mr, offset, TARGET_PAGE_SIZE,
205 DIRTY_MEMORY_MIGRATION);
ad96090a 206
71c510e2 207 p = memory_region_get_ram_ptr(mr) + offset;
ad96090a 208
86003615 209 if (is_dup_page(p)) {
0c51f43d 210 save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_COMPRESS);
ad96090a 211 qemu_put_byte(f, *p);
3fc250b4 212 bytes_sent = 1;
ad96090a 213 } else {
0c51f43d 214 save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE);
ad96090a 215 qemu_put_buffer(f, p, TARGET_PAGE_SIZE);
3fc250b4 216 bytes_sent = TARGET_PAGE_SIZE;
ad96090a
BS
217 }
218
ad96090a
BS
219 break;
220 }
e44359c3
AW
221
222 offset += TARGET_PAGE_SIZE;
223 if (offset >= block->length) {
224 offset = 0;
225 block = QLIST_NEXT(block, next);
226 if (!block)
227 block = QLIST_FIRST(&ram_list.blocks);
228 }
71c510e2 229 } while (block != last_block || offset != last_offset);
e44359c3
AW
230
231 last_block = block;
232 last_offset = offset;
ad96090a 233
3fc250b4 234 return bytes_sent;
ad96090a
BS
235}
236
237static uint64_t bytes_transferred;
238
239static ram_addr_t ram_save_remaining(void)
240{
e44359c3 241 RAMBlock *block;
ad96090a
BS
242 ram_addr_t count = 0;
243
e44359c3
AW
244 QLIST_FOREACH(block, &ram_list.blocks, next) {
245 ram_addr_t addr;
71c510e2 246 for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) {
cd7a45c9 247 if (memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
71c510e2 248 DIRTY_MEMORY_MIGRATION)) {
e44359c3
AW
249 count++;
250 }
ad96090a
BS
251 }
252 }
253
254 return count;
255}
256
257uint64_t ram_bytes_remaining(void)
258{
259 return ram_save_remaining() * TARGET_PAGE_SIZE;
260}
261
262uint64_t ram_bytes_transferred(void)
263{
264 return bytes_transferred;
265}
266
267uint64_t ram_bytes_total(void)
268{
d17b5288
AW
269 RAMBlock *block;
270 uint64_t total = 0;
271
272 QLIST_FOREACH(block, &ram_list.blocks, next)
273 total += block->length;
274
275 return total;
ad96090a
BS
276}
277
b2e0a138
MT
278static int block_compar(const void *a, const void *b)
279{
280 RAMBlock * const *ablock = a;
281 RAMBlock * const *bblock = b;
8fec98b4
AK
282
283 return strcmp((*ablock)->idstr, (*bblock)->idstr);
b2e0a138
MT
284}
285
286static void sort_ram_list(void)
287{
288 RAMBlock *block, *nblock, **blocks;
289 int n;
290 n = 0;
291 QLIST_FOREACH(block, &ram_list.blocks, next) {
292 ++n;
293 }
7267c094 294 blocks = g_malloc(n * sizeof *blocks);
b2e0a138
MT
295 n = 0;
296 QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) {
297 blocks[n++] = block;
298 QLIST_REMOVE(block, next);
299 }
300 qsort(blocks, n, sizeof *blocks, block_compar);
301 while (--n >= 0) {
302 QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next);
303 }
7267c094 304 g_free(blocks);
b2e0a138
MT
305}
306
8e21cd32
OW
307static void migration_end(void)
308{
309 memory_global_dirty_log_stop();
310}
311
539de124 312int ram_save_live(QEMUFile *f, int stage, void *opaque)
ad96090a
BS
313{
314 ram_addr_t addr;
315 uint64_t bytes_transferred_last;
316 double bwidth = 0;
2975725f 317 int ret;
ad96090a
BS
318
319 if (stage < 0) {
8e21cd32 320 migration_end();
ad96090a
BS
321 return 0;
322 }
323
86e775c6 324 memory_global_sync_dirty_bitmap(get_system_memory());
ad96090a
BS
325
326 if (stage == 1) {
97ab12d4 327 RAMBlock *block;
ad96090a 328 bytes_transferred = 0;
760e77ea
AW
329 last_block = NULL;
330 last_offset = 0;
b2e0a138 331 sort_ram_list();
ad96090a
BS
332
333 /* Make sure all dirty bits are set */
e44359c3 334 QLIST_FOREACH(block, &ram_list.blocks, next) {
71c510e2 335 for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) {
cd7a45c9 336 if (!memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
71c510e2 337 DIRTY_MEMORY_MIGRATION)) {
fd4aa979 338 memory_region_set_dirty(block->mr, addr, TARGET_PAGE_SIZE);
e44359c3 339 }
ad96090a
BS
340 }
341 }
342
8f77558f 343 memory_global_dirty_log_start();
ad96090a 344
e44359c3 345 qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE);
97ab12d4
AW
346
347 QLIST_FOREACH(block, &ram_list.blocks, next) {
348 qemu_put_byte(f, strlen(block->idstr));
349 qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr));
350 qemu_put_be64(f, block->length);
351 }
ad96090a
BS
352 }
353
354 bytes_transferred_last = bytes_transferred;
355 bwidth = qemu_get_clock_ns(rt_clock);
356
2975725f 357 while ((ret = qemu_file_rate_limit(f)) == 0) {
3fc250b4 358 int bytes_sent;
ad96090a 359
3fc250b4
PR
360 bytes_sent = ram_save_block(f);
361 bytes_transferred += bytes_sent;
362 if (bytes_sent == 0) { /* no more blocks */
ad96090a
BS
363 break;
364 }
365 }
366
2975725f
JQ
367 if (ret < 0) {
368 return ret;
369 }
370
ad96090a
BS
371 bwidth = qemu_get_clock_ns(rt_clock) - bwidth;
372 bwidth = (bytes_transferred - bytes_transferred_last) / bwidth;
373
374 /* if we haven't transferred anything this round, force expected_time to a
375 * a very high value, but without crashing */
376 if (bwidth == 0) {
377 bwidth = 0.000001;
378 }
379
380 /* try transferring iterative blocks of memory */
381 if (stage == 3) {
3fc250b4
PR
382 int bytes_sent;
383
ad96090a 384 /* flush all remaining blocks regardless of rate limiting */
3fc250b4
PR
385 while ((bytes_sent = ram_save_block(f)) != 0) {
386 bytes_transferred += bytes_sent;
ad96090a 387 }
8f77558f 388 memory_global_dirty_log_stop();
ad96090a
BS
389 }
390
391 qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
392
5b3c9638
JQ
393 if (stage == 2) {
394 uint64_t expected_time;
395 expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth;
ad96090a 396
5b3c9638
JQ
397 DPRINTF("ram_save_live: expected(" PRIu64 ") <= max(" PRIu64 ")?\n",
398 expected_time, migrate_max_downtime());
3a697f69 399
5b3c9638
JQ
400 return expected_time <= migrate_max_downtime();
401 }
402 return 0;
ad96090a
BS
403}
404
a55bbe31
AW
405static inline void *host_from_stream_offset(QEMUFile *f,
406 ram_addr_t offset,
407 int flags)
408{
409 static RAMBlock *block = NULL;
410 char id[256];
411 uint8_t len;
412
413 if (flags & RAM_SAVE_FLAG_CONTINUE) {
414 if (!block) {
415 fprintf(stderr, "Ack, bad migration stream!\n");
416 return NULL;
417 }
418
dc94a7ed 419 return memory_region_get_ram_ptr(block->mr) + offset;
a55bbe31
AW
420 }
421
422 len = qemu_get_byte(f);
423 qemu_get_buffer(f, (uint8_t *)id, len);
424 id[len] = 0;
425
426 QLIST_FOREACH(block, &ram_list.blocks, next) {
427 if (!strncmp(id, block->idstr, sizeof(id)))
dc94a7ed 428 return memory_region_get_ram_ptr(block->mr) + offset;
a55bbe31
AW
429 }
430
431 fprintf(stderr, "Can't find block %s!\n", id);
432 return NULL;
433}
434
ad96090a
BS
435int ram_load(QEMUFile *f, void *opaque, int version_id)
436{
437 ram_addr_t addr;
3a697f69 438 int flags, ret = 0;
42802d47 439 int error;
3a697f69
OW
440 static uint64_t seq_iter;
441
442 seq_iter++;
ad96090a 443
f09f2189 444 if (version_id < 4 || version_id > 4) {
ad96090a
BS
445 return -EINVAL;
446 }
447
448 do {
449 addr = qemu_get_be64(f);
450
451 flags = addr & ~TARGET_PAGE_MASK;
452 addr &= TARGET_PAGE_MASK;
453
454 if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
f09f2189 455 if (version_id == 4) {
97ab12d4
AW
456 /* Synchronize RAM block list */
457 char id[256];
458 ram_addr_t length;
459 ram_addr_t total_ram_bytes = addr;
460
461 while (total_ram_bytes) {
462 RAMBlock *block;
463 uint8_t len;
464
465 len = qemu_get_byte(f);
466 qemu_get_buffer(f, (uint8_t *)id, len);
467 id[len] = 0;
468 length = qemu_get_be64(f);
469
470 QLIST_FOREACH(block, &ram_list.blocks, next) {
471 if (!strncmp(id, block->idstr, sizeof(id))) {
3a697f69
OW
472 if (block->length != length) {
473 ret = -EINVAL;
474 goto done;
475 }
97ab12d4
AW
476 break;
477 }
478 }
479
480 if (!block) {
fb787f81
AW
481 fprintf(stderr, "Unknown ramblock \"%s\", cannot "
482 "accept migration\n", id);
3a697f69
OW
483 ret = -EINVAL;
484 goto done;
97ab12d4
AW
485 }
486
487 total_ram_bytes -= length;
488 }
ad96090a
BS
489 }
490 }
491
492 if (flags & RAM_SAVE_FLAG_COMPRESS) {
97ab12d4
AW
493 void *host;
494 uint8_t ch;
495
f09f2189 496 host = host_from_stream_offset(f, addr, flags);
492fb99c
MT
497 if (!host) {
498 return -EINVAL;
499 }
97ab12d4 500
97ab12d4
AW
501 ch = qemu_get_byte(f);
502 memset(host, ch, TARGET_PAGE_SIZE);
ad96090a
BS
503#ifndef _WIN32
504 if (ch == 0 &&
505 (!kvm_enabled() || kvm_has_sync_mmu())) {
e78815a5 506 qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED);
ad96090a
BS
507 }
508#endif
509 } else if (flags & RAM_SAVE_FLAG_PAGE) {
97ab12d4
AW
510 void *host;
511
f09f2189 512 host = host_from_stream_offset(f, addr, flags);
0ff1f9f5
OW
513 if (!host) {
514 return -EINVAL;
515 }
97ab12d4 516
97ab12d4 517 qemu_get_buffer(f, host, TARGET_PAGE_SIZE);
ad96090a 518 }
42802d47
JQ
519 error = qemu_file_get_error(f);
520 if (error) {
3a697f69
OW
521 ret = error;
522 goto done;
ad96090a
BS
523 }
524 } while (!(flags & RAM_SAVE_FLAG_EOS));
525
3a697f69
OW
526done:
527 DPRINTF("Completed load of VM with exit code %d seq iteration " PRIu64 "\n",
528 ret, seq_iter);
529 return ret;
ad96090a
BS
530}
531
ad96090a 532#ifdef HAS_AUDIO
0dfa5ef9
IY
533struct soundhw {
534 const char *name;
535 const char *descr;
536 int enabled;
537 int isa;
538 union {
4a0f031d 539 int (*init_isa) (ISABus *bus);
0dfa5ef9
IY
540 int (*init_pci) (PCIBus *bus);
541 } init;
542};
543
544static struct soundhw soundhw[] = {
ad96090a 545#ifdef HAS_AUDIO_CHOICE
da12872a 546#ifdef CONFIG_PCSPK
ad96090a
BS
547 {
548 "pcspk",
549 "PC speaker",
550 0,
551 1,
552 { .init_isa = pcspk_audio_init }
553 },
554#endif
555
556#ifdef CONFIG_SB16
557 {
558 "sb16",
559 "Creative Sound Blaster 16",
560 0,
561 1,
562 { .init_isa = SB16_init }
563 },
564#endif
565
566#ifdef CONFIG_CS4231A
567 {
568 "cs4231a",
569 "CS4231A",
570 0,
571 1,
572 { .init_isa = cs4231a_init }
573 },
574#endif
575
576#ifdef CONFIG_ADLIB
577 {
578 "adlib",
579#ifdef HAS_YMF262
580 "Yamaha YMF262 (OPL3)",
581#else
582 "Yamaha YM3812 (OPL2)",
583#endif
584 0,
585 1,
586 { .init_isa = Adlib_init }
587 },
588#endif
589
590#ifdef CONFIG_GUS
591 {
592 "gus",
593 "Gravis Ultrasound GF1",
594 0,
595 1,
596 { .init_isa = GUS_init }
597 },
598#endif
599
600#ifdef CONFIG_AC97
601 {
602 "ac97",
603 "Intel 82801AA AC97 Audio",
604 0,
605 0,
606 { .init_pci = ac97_init }
607 },
608#endif
609
610#ifdef CONFIG_ES1370
611 {
612 "es1370",
613 "ENSONIQ AudioPCI ES1370",
614 0,
615 0,
616 { .init_pci = es1370_init }
617 },
618#endif
619
d61a4ce8
GH
620#ifdef CONFIG_HDA
621 {
622 "hda",
623 "Intel HD Audio",
624 0,
625 0,
626 { .init_pci = intel_hda_and_codec_init }
627 },
628#endif
629
ad96090a
BS
630#endif /* HAS_AUDIO_CHOICE */
631
632 { NULL, NULL, 0, 0, { NULL } }
633};
634
635void select_soundhw(const char *optarg)
636{
637 struct soundhw *c;
638
639 if (*optarg == '?') {
640 show_valid_cards:
641
642 printf("Valid sound card names (comma separated):\n");
643 for (c = soundhw; c->name; ++c) {
644 printf ("%-11s %s\n", c->name, c->descr);
645 }
646 printf("\n-soundhw all will enable all of the above\n");
647 exit(*optarg != '?');
648 }
649 else {
650 size_t l;
651 const char *p;
652 char *e;
653 int bad_card = 0;
654
655 if (!strcmp(optarg, "all")) {
656 for (c = soundhw; c->name; ++c) {
657 c->enabled = 1;
658 }
659 return;
660 }
661
662 p = optarg;
663 while (*p) {
664 e = strchr(p, ',');
665 l = !e ? strlen(p) : (size_t) (e - p);
666
667 for (c = soundhw; c->name; ++c) {
668 if (!strncmp(c->name, p, l) && !c->name[l]) {
669 c->enabled = 1;
670 break;
671 }
672 }
673
674 if (!c->name) {
675 if (l > 80) {
676 fprintf(stderr,
677 "Unknown sound card name (too big to show)\n");
678 }
679 else {
680 fprintf(stderr, "Unknown sound card name `%.*s'\n",
681 (int) l, p);
682 }
683 bad_card = 1;
684 }
685 p += l + (e != NULL);
686 }
687
688 if (bad_card) {
689 goto show_valid_cards;
690 }
691 }
692}
0dfa5ef9 693
4a0f031d 694void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
0dfa5ef9
IY
695{
696 struct soundhw *c;
697
698 for (c = soundhw; c->name; ++c) {
699 if (c->enabled) {
700 if (c->isa) {
4a0f031d
HP
701 if (isa_bus) {
702 c->init.init_isa(isa_bus);
0dfa5ef9
IY
703 }
704 } else {
705 if (pci_bus) {
706 c->init.init_pci(pci_bus);
707 }
708 }
709 }
710 }
711}
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712#else
713void select_soundhw(const char *optarg)
714{
715}
4a0f031d 716void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
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717{
718}
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719#endif
720
721int qemu_uuid_parse(const char *str, uint8_t *uuid)
722{
723 int ret;
724
725 if (strlen(str) != 36) {
726 return -1;
727 }
728
729 ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3],
730 &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9],
731 &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14],
732 &uuid[15]);
733
734 if (ret != 16) {
735 return -1;
736 }
737#ifdef TARGET_I386
738 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid);
739#endif
740 return 0;
741}
742
743void do_acpitable_option(const char *optarg)
744{
745#ifdef TARGET_I386
746 if (acpi_table_add(optarg) < 0) {
747 fprintf(stderr, "Wrong acpi table provided\n");
748 exit(1);
749 }
750#endif
751}
752
753void do_smbios_option(const char *optarg)
754{
755#ifdef TARGET_I386
756 if (smbios_entry_add(optarg) < 0) {
757 fprintf(stderr, "Wrong smbios provided\n");
758 exit(1);
759 }
760#endif
761}
762
763void cpudef_init(void)
764{
765#if defined(cpudef_setup)
766 cpudef_setup(); /* parse cpu definitions in target config file */
767#endif
768}
769
770int audio_available(void)
771{
772#ifdef HAS_AUDIO
773 return 1;
774#else
775 return 0;
776#endif
777}
778
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779int tcg_available(void)
780{
781 return 1;
782}
783
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784int kvm_available(void)
785{
786#ifdef CONFIG_KVM
787 return 1;
788#else
789 return 0;
790#endif
791}
792
793int xen_available(void)
794{
795#ifdef CONFIG_XEN
796 return 1;
797#else
798 return 0;
799#endif
800}