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902b3d5c | 1 | #ifndef QEMU_CACHE_UTILS_H |
2 | #define QEMU_CACHE_UTILS_H | |
3 | ||
e58ffeb3 | 4 | #if defined(_ARCH_PPC) |
902b3d5c | 5 | struct qemu_cache_conf { |
6 | unsigned long dcache_bsize; | |
7 | unsigned long icache_bsize; | |
8 | }; | |
9 | ||
10 | extern struct qemu_cache_conf qemu_cache_conf; | |
11 | ||
64b85a8f | 12 | void qemu_cache_utils_init(char **envp); |
902b3d5c | 13 | |
14 | /* mildly adjusted code from tcg-dyngen.c */ | |
15 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | |
16 | { | |
17 | unsigned long p, start1, stop1; | |
18 | unsigned long dsize = qemu_cache_conf.dcache_bsize; | |
19 | unsigned long isize = qemu_cache_conf.icache_bsize; | |
20 | ||
21 | start1 = start & ~(dsize - 1); | |
22 | stop1 = (stop + dsize - 1) & ~(dsize - 1); | |
23 | for (p = start1; p < stop1; p += dsize) { | |
24 | asm volatile ("dcbst 0,%0" : : "r"(p) : "memory"); | |
25 | } | |
26 | asm volatile ("sync" : : : "memory"); | |
27 | ||
28 | start &= start & ~(isize - 1); | |
29 | stop1 = (stop + isize - 1) & ~(isize - 1); | |
30 | for (p = start1; p < stop1; p += isize) { | |
31 | asm volatile ("icbi 0,%0" : : "r"(p) : "memory"); | |
32 | } | |
33 | asm volatile ("sync" : : : "memory"); | |
34 | asm volatile ("isync" : : : "memory"); | |
35 | } | |
36 | ||
37 | #else | |
38 | #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0) | |
39 | #endif | |
40 | ||
41 | #endif /* QEMU_CACHE_UTILS_H */ |