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1 | /* |
2 | * Distributed under the Boost Software License, Version 1.0. | |
3 | * (See accompanying file LICENSE_1_0.txt or copy at | |
4 | * http://www.boost.org/LICENSE_1_0.txt) | |
5 | * | |
6 | * Copyright (c) 2020 Andrey Semashev | |
7 | */ | |
8 | /*! | |
9 | * \file atomic/detail/caps_arch_gcc_aarch64.hpp | |
10 | * | |
11 | * This header defines feature capabilities macros | |
12 | */ | |
13 | ||
14 | #ifndef BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_AARCH64_HPP_INCLUDED_ | |
15 | #define BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_AARCH64_HPP_INCLUDED_ | |
16 | ||
17 | #include <boost/atomic/detail/config.hpp> | |
18 | ||
19 | #ifdef BOOST_HAS_PRAGMA_ONCE | |
20 | #pragma once | |
21 | #endif | |
22 | ||
23 | #if defined(__AARCH64EL__) || \ | |
24 | (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) || \ | |
25 | (defined(__LITTLE_ENDIAN__) && !defined(__BIG_ENDIAN__)) || \ | |
26 | defined(BOOST_WINDOWS) | |
27 | #define BOOST_ATOMIC_DETAIL_AARCH64_LITTLE_ENDIAN | |
28 | #elif defined(__AARCH64EB__) || \ | |
29 | defined(__ARM_BIG_ENDIAN) || \ | |
30 | (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) || \ | |
31 | (defined(__BIG_ENDIAN__) && !defined(__LITTLE_ENDIAN__)) | |
32 | #define BOOST_ATOMIC_DETAIL_AARCH64_BIG_ENDIAN | |
33 | #else | |
34 | #error "Boost.Atomic: Failed to determine AArch64 endianness, the target platform is not supported. Please, report to the developers (patches are welcome)." | |
35 | #endif | |
36 | ||
37 | #if defined(__ARM_FEATURE_ATOMICS) | |
38 | // ARMv8.1 added Large System Extensions, which includes cas, swp, and a number of other read-modify-write instructions | |
39 | #define BOOST_ATOMIC_DETAIL_AARCH64_HAS_LSE | |
40 | #endif | |
41 | ||
42 | #if defined(__ARM_FEATURE_COMPLEX) | |
43 | // ARMv8.3 added Release Consistency processor consistent (RCpc) memory model, which includes ldapr and similar instructions. | |
44 | // Unfortunately, there seems to be no dedicated __ARM_FEATURE macro for this, so we use __ARM_FEATURE_COMPLEX, which is also defined starting ARMv8.3. | |
45 | #define BOOST_ATOMIC_DETAIL_AARCH64_HAS_RCPC | |
46 | #endif | |
47 | ||
48 | #define BOOST_ATOMIC_INT8_LOCK_FREE 2 | |
49 | #define BOOST_ATOMIC_INT16_LOCK_FREE 2 | |
50 | #define BOOST_ATOMIC_INT32_LOCK_FREE 2 | |
51 | #define BOOST_ATOMIC_INT64_LOCK_FREE 2 | |
52 | #define BOOST_ATOMIC_INT128_LOCK_FREE 2 | |
53 | #define BOOST_ATOMIC_POINTER_LOCK_FREE 2 | |
54 | ||
55 | #define BOOST_ATOMIC_THREAD_FENCE 2 | |
56 | #define BOOST_ATOMIC_SIGNAL_FENCE 2 | |
57 | ||
58 | #endif // BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_AARCH64_HPP_INCLUDED_ |