projects / ceph.git / blame
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|---|---|---|
| 20effc67 TL |
1 | /* |
| 2 | * Distributed under the Boost Software License, Version 1.0. | |
| 3 | * (See accompanying file LICENSE_1_0.txt or copy at | |
| 4 | * http://www.boost.org/LICENSE_1_0.txt) | |
| 5 | * | |
| 6 | * Copyright (c) 2009 Helge Bahmann | |
| 7 | * Copyright (c) 2013 Tim Blechmann | |
| 8 | * Copyright (c) 2014, 2020 Andrey Semashev | |
| 9 | */ | |
| 10 | /*! | |
| 11 | * \file atomic/detail/gcc_arm_asm_common.hpp | |
| 12 | * | |
| 13 | * This header contains basic utilities for gcc asm-based ARM backend. | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef BOOST_ATOMIC_DETAIL_GCC_ARM_ASM_COMMON_HPP_INCLUDED_ | |
| 17 | #define BOOST_ATOMIC_DETAIL_GCC_ARM_ASM_COMMON_HPP_INCLUDED_ | |
| 18 | ||
| 19 | #include <boost/atomic/detail/config.hpp> | |
| 20 | #include <boost/atomic/detail/capabilities.hpp> | |
| 21 | ||
| 22 | // A memory barrier is effected using a "co-processor 15" instruction, | |
| 23 | // though a separate assembler mnemonic is available for it in v7. | |
| 24 | // | |
| 25 | // "Thumb 1" is a subset of the ARM instruction set that uses a 16-bit encoding. It | |
| 26 | // doesn't include all instructions and in particular it doesn't include the co-processor | |
| 27 | // instruction used for the memory barrier or the load-locked/store-conditional | |
| 28 | // instructions. So, if we're compiling in "Thumb 1" mode, we need to wrap all of our | |
| 29 | // asm blocks with code to temporarily change to ARM mode. | |
| 30 | // | |
| 31 | // You can only change between ARM and Thumb modes when branching using the bx instruction. | |
| 32 | // bx takes an address specified in a register. The least significant bit of the address | |
| 33 | // indicates the mode, so 1 is added to indicate that the destination code is Thumb. | |
| 34 | // A temporary register is needed for the address and is passed as an argument to these | |
| 35 | // macros. It must be one of the "low" registers accessible to Thumb code, specified | |
| 36 | // using the "l" attribute in the asm statement. | |
| 37 | // | |
| 38 | // Architecture v7 introduces "Thumb 2", which does include (almost?) all of the ARM | |
| 39 | // instruction set. (Actually, there was an extension of v6 called v6T2 which supported | |
| 40 | // "Thumb 2" mode, but its architecture manual is no longer available, referring to v7.) | |
| 41 | // So in v7 we don't need to change to ARM mode; we can write "universal | |
| 42 | // assembler" which will assemble to Thumb 2 or ARM code as appropriate. The only thing | |
| 43 | // we need to do to make this "universal" assembler mode work is to insert "IT" instructions | |
| 44 | // to annotate the conditional instructions. These are ignored in other modes (e.g. v6), | |
| 45 | // so they can always be present. | |
| 46 | ||
| 47 | // A note about memory_order_consume. Technically, this architecture allows to avoid | |
| 48 | // unnecessary memory barrier after consume load since it supports data dependency ordering. | |
| 49 | // However, some compiler optimizations may break a seemingly valid code relying on data | |
| 50 | // dependency tracking by injecting bogus branches to aid out of order execution. | |
| 51 | // This may happen not only in Boost.Atomic code but also in user's code, which we have no | |
| 52 | // control of. See this thread: http://lists.boost.org/Archives/boost/2014/06/213890.php. | |
| 53 | // For this reason we promote memory_order_consume to memory_order_acquire. | |
| 54 | ||
| 55 | #if defined(__thumb__) && !defined(__thumb2__) | |
| 56 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_START(TMPREG) "adr " #TMPREG ", 8f\n\t" "bx " #TMPREG "\n\t" ".arm\n\t" ".align 4\n\t" "8:\n\t" | |
| 57 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_END(TMPREG) "adr " #TMPREG ", 9f + 1\n\t" "bx " #TMPREG "\n\t" ".thumb\n\t" ".align 2\n\t" "9:\n\t" | |
| 58 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(var) "=&l" (var) | |
| 59 | #else | |
| 60 | // Indicate that start/end macros are empty and the tmpreg is not needed | |
| 61 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_UNUSED | |
| 62 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_START(TMPREG) | |
| 63 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_END(TMPREG) | |
| 64 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_TMPREG_CONSTRAINT(var) "=&l" (var) | |
| 65 | #endif | |
| 66 | ||
| 67 | #if defined(BOOST_ATOMIC_DETAIL_ARM_LITTLE_ENDIAN) | |
| 68 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(arg) "%" BOOST_STRINGIZE(arg) | |
| 69 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(arg) "%H" BOOST_STRINGIZE(arg) | |
| 70 | #else | |
| 71 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_LO(arg) "%H" BOOST_STRINGIZE(arg) | |
| 72 | #define BOOST_ATOMIC_DETAIL_ARM_ASM_ARG_HI(arg) "%" BOOST_STRINGIZE(arg) | |
| 73 | #endif | |
| 74 | ||
| 75 | #endif // BOOST_ATOMIC_DETAIL_GCC_ARM_ASM_COMMON_HPP_INCLUDED_ |