projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| 7c673cae FG |
1 | /* |
| 2 | * Distributed under the Boost Software License, Version 1.0. | |
| 3 | * (See accompanying file LICENSE_1_0.txt or copy at | |
| 4 | * http://www.boost.org/LICENSE_1_0.txt) | |
| 5 | * | |
| 6 | * Copyright (c) 2009 Helge Bahmann | |
| 7 | * Copyright (c) 2012 Tim Blechmann | |
| 8 | * Copyright (c) 2013 - 2014 Andrey Semashev | |
| 9 | */ | |
| 10 | /*! | |
| 11 | * \file atomic/detail/caps_gcc_x86.hpp | |
| 12 | * | |
| 13 | * This header defines feature capabilities macros | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef BOOST_ATOMIC_DETAIL_CAPS_GCC_X86_HPP_INCLUDED_ | |
| 17 | #define BOOST_ATOMIC_DETAIL_CAPS_GCC_X86_HPP_INCLUDED_ | |
| 18 | ||
| 19 | #include <boost/atomic/detail/config.hpp> | |
| 20 | ||
| 21 | #ifdef BOOST_HAS_PRAGMA_ONCE | |
| 22 | #pragma once | |
| 23 | #endif | |
| 24 | ||
| 25 | #if defined(__GNUC__) | |
| 26 | ||
| 27 | #if defined(__i386__) &&\ | |
| 28 | (\ | |
| 29 | defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) ||\ | |
| 30 | defined(__i586__) || defined(__i686__) || defined(__pentium4__) || defined(__nocona__) || defined(__core2__) || defined(__corei7__) ||\ | |
| 31 | defined(__k6__) || defined(__athlon__) || defined(__k8__) || defined(__amdfam10__) || defined(__bdver1__) || defined(__bdver2__) || defined(__bdver3__) || defined(__btver1__) || defined(__btver2__)\ | |
| 32 | ) | |
| 33 | #define BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG8B 1 | |
| 34 | #endif | |
| 35 | ||
| 36 | #if defined(__x86_64__) && defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16) | |
| 37 | #define BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B 1 | |
| 38 | #endif | |
| 39 | ||
| 40 | #if defined(__x86_64__) || defined(__SSE2__) | |
| 41 | // Use mfence only if SSE2 is available | |
| 42 | #define BOOST_ATOMIC_DETAIL_X86_HAS_MFENCE 1 | |
| 43 | #endif | |
| 44 | ||
| 45 | #else // defined(__GNUC__) | |
| 46 | ||
| 47 | #if defined(__i386__) && !defined(BOOST_ATOMIC_NO_CMPXCHG8B) | |
| 48 | #define BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG8B 1 | |
| 49 | #endif | |
| 50 | ||
| 51 | #if defined(__x86_64__) && !defined(BOOST_ATOMIC_NO_CMPXCHG16B) | |
| 52 | #define BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B 1 | |
| 53 | #endif | |
| 54 | ||
| 55 | #if !defined(BOOST_ATOMIC_NO_MFENCE) | |
| 56 | #define BOOST_ATOMIC_DETAIL_X86_HAS_MFENCE 1 | |
| 57 | #endif | |
| 58 | ||
| 59 | #endif // defined(__GNUC__) | |
| 60 | ||
| 61 | #define BOOST_ATOMIC_INT8_LOCK_FREE 2 | |
| 62 | #define BOOST_ATOMIC_INT16_LOCK_FREE 2 | |
| 63 | #define BOOST_ATOMIC_INT32_LOCK_FREE 2 | |
| 64 | #if defined(__x86_64__) || defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG8B) | |
| 65 | #define BOOST_ATOMIC_INT64_LOCK_FREE 2 | |
| 66 | #endif | |
| 67 | #if defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B) && (defined(BOOST_HAS_INT128) || !defined(BOOST_NO_ALIGNMENT)) | |
| 68 | #define BOOST_ATOMIC_INT128_LOCK_FREE 2 | |
| 69 | #endif | |
| 70 | #define BOOST_ATOMIC_POINTER_LOCK_FREE 2 | |
| 71 | ||
| 72 | #define BOOST_ATOMIC_THREAD_FENCE 2 | |
| 73 | #define BOOST_ATOMIC_SIGNAL_FENCE 2 | |
| 74 | ||
| 75 | #endif // BOOST_ATOMIC_DETAIL_CAPS_GCC_X86_HPP_INCLUDED_ |