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1 | /********************************************************************** |
2 | Copyright(c) 2011-2016 Intel Corporation All rights reserved. | |
3 | ||
4 | Redistribution and use in source and binary forms, with or without | |
1e59de90 | 5 | modification, are permitted provided that the following conditions |
7c673cae FG |
6 | are met: |
7 | * Redistributions of source code must retain the above copyright | |
8 | notice, this list of conditions and the following disclaimer. | |
9 | * Redistributions in binary form must reproduce the above copyright | |
10 | notice, this list of conditions and the following disclaimer in | |
11 | the documentation and/or other materials provided with the | |
12 | distribution. | |
13 | * Neither the name of Intel Corporation nor the names of its | |
14 | contributors may be used to endorse or promote products derived | |
15 | from this software without specific prior written permission. | |
16 | ||
17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
28 | **********************************************************************/ | |
29 | ||
1e59de90 TL |
30 | #if defined(__clang__) |
31 | # pragma clang attribute push (__attribute__((target("avx2"))), apply_to=function) | |
32 | #elif defined(__ICC) | |
33 | # pragma intel optimization_parameter target_arch=AVX2 | |
34 | #elif defined(__ICL) | |
35 | # pragma [intel] optimization_parameter target_arch=AVX2 | |
36 | #elif (__GNUC__ >= 5) | |
37 | # pragma GCC target("avx2") | |
38 | #endif | |
39 | ||
7c673cae FG |
40 | #include "md5_mb.h" |
41 | #include "memcpy_inline.h" | |
42 | ||
43 | #ifdef _MSC_VER | |
44 | #include <intrin.h> | |
45 | #define inline __inline | |
46 | #endif | |
47 | ||
48 | #ifdef HAVE_AS_KNOWS_AVX512 | |
49 | ||
50 | static inline void hash_init_digest(MD5_WORD_T * digest); | |
1e59de90 | 51 | static inline uint32_t hash_pad(uint8_t padblock[MD5_BLOCK_SIZE * 2], uint64_t total_len); |
7c673cae FG |
52 | static MD5_HASH_CTX *md5_ctx_mgr_resubmit(MD5_HASH_CTX_MGR * mgr, MD5_HASH_CTX * ctx); |
53 | ||
54 | void md5_ctx_mgr_init_avx512(MD5_HASH_CTX_MGR * mgr) | |
55 | { | |
56 | md5_mb_mgr_init_avx512(&mgr->mgr); | |
57 | } | |
58 | ||
59 | MD5_HASH_CTX *md5_ctx_mgr_submit_avx512(MD5_HASH_CTX_MGR * mgr, MD5_HASH_CTX * ctx, | |
60 | const void *buffer, uint32_t len, HASH_CTX_FLAG flags) | |
61 | { | |
62 | if (flags & (~HASH_ENTIRE)) { | |
63 | // User should not pass anything other than FIRST, UPDATE, or LAST | |
64 | ctx->error = HASH_CTX_ERROR_INVALID_FLAGS; | |
65 | return ctx; | |
66 | } | |
67 | ||
68 | if (ctx->status & HASH_CTX_STS_PROCESSING) { | |
69 | // Cannot submit to a currently processing job. | |
70 | ctx->error = HASH_CTX_ERROR_ALREADY_PROCESSING; | |
71 | return ctx; | |
72 | } | |
73 | ||
74 | if ((ctx->status & HASH_CTX_STS_COMPLETE) && !(flags & HASH_FIRST)) { | |
75 | // Cannot update a finished job. | |
76 | ctx->error = HASH_CTX_ERROR_ALREADY_COMPLETED; | |
77 | return ctx; | |
78 | } | |
79 | ||
80 | if (flags & HASH_FIRST) { | |
81 | // Init digest | |
82 | hash_init_digest(ctx->job.result_digest); | |
83 | ||
84 | // Reset byte counter | |
85 | ctx->total_length = 0; | |
86 | ||
87 | // Clear extra blocks | |
88 | ctx->partial_block_buffer_length = 0; | |
89 | } | |
90 | // If we made it here, there were no errors during this call to submit | |
91 | ctx->error = HASH_CTX_ERROR_NONE; | |
92 | ||
93 | // Store buffer ptr info from user | |
94 | ctx->incoming_buffer = buffer; | |
95 | ctx->incoming_buffer_length = len; | |
96 | ||
97 | // Store the user's request flags and mark this ctx as currently being processed. | |
98 | ctx->status = (flags & HASH_LAST) ? | |
99 | (HASH_CTX_STS) (HASH_CTX_STS_PROCESSING | HASH_CTX_STS_LAST) : | |
100 | HASH_CTX_STS_PROCESSING; | |
101 | ||
102 | // Advance byte counter | |
103 | ctx->total_length += len; | |
104 | ||
105 | // If there is anything currently buffered in the extra blocks, append to it until it contains a whole block. | |
106 | // Or if the user's buffer contains less than a whole block, append as much as possible to the extra block. | |
107 | if ((ctx->partial_block_buffer_length) | (len < MD5_BLOCK_SIZE)) { | |
108 | // Compute how many bytes to copy from user buffer into extra block | |
109 | uint32_t copy_len = MD5_BLOCK_SIZE - ctx->partial_block_buffer_length; | |
110 | if (len < copy_len) | |
111 | copy_len = len; | |
112 | ||
113 | if (copy_len) { | |
114 | // Copy and update relevant pointers and counters | |
115 | memcpy_varlen(&ctx->partial_block_buffer | |
116 | [ctx->partial_block_buffer_length], buffer, copy_len); | |
117 | ||
118 | ctx->partial_block_buffer_length += copy_len; | |
119 | ctx->incoming_buffer = (const void *)((const char *)buffer + copy_len); | |
120 | ctx->incoming_buffer_length = len - copy_len; | |
121 | } | |
122 | // The extra block should never contain more than 1 block here | |
123 | assert(ctx->partial_block_buffer_length <= MD5_BLOCK_SIZE); | |
124 | ||
125 | // If the extra block buffer contains exactly 1 block, it can be hashed. | |
126 | if (ctx->partial_block_buffer_length >= MD5_BLOCK_SIZE) { | |
127 | ctx->partial_block_buffer_length = 0; | |
128 | ||
129 | ctx->job.buffer = ctx->partial_block_buffer; | |
130 | ctx->job.len = 1; | |
131 | ctx = (MD5_HASH_CTX *) md5_mb_mgr_submit_avx512(&mgr->mgr, &ctx->job); | |
132 | } | |
133 | } | |
134 | ||
135 | return md5_ctx_mgr_resubmit(mgr, ctx); | |
136 | } | |
137 | ||
138 | MD5_HASH_CTX *md5_ctx_mgr_flush_avx512(MD5_HASH_CTX_MGR * mgr) | |
139 | { | |
140 | MD5_HASH_CTX *ctx; | |
141 | ||
142 | while (1) { | |
143 | ctx = (MD5_HASH_CTX *) md5_mb_mgr_flush_avx512(&mgr->mgr); | |
144 | ||
145 | // If flush returned 0, there are no more jobs in flight. | |
146 | if (!ctx) | |
147 | return NULL; | |
148 | ||
149 | // If flush returned a job, verify that it is safe to return to the user. | |
150 | // If it is not ready, resubmit the job to finish processing. | |
151 | ctx = md5_ctx_mgr_resubmit(mgr, ctx); | |
152 | ||
153 | // If md5_ctx_mgr_resubmit returned a job, it is ready to be returned. | |
154 | if (ctx) | |
155 | return ctx; | |
156 | ||
157 | // Otherwise, all jobs currently being managed by the HASH_CTX_MGR still need processing. Loop. | |
158 | } | |
159 | } | |
160 | ||
161 | static MD5_HASH_CTX *md5_ctx_mgr_resubmit(MD5_HASH_CTX_MGR * mgr, MD5_HASH_CTX * ctx) | |
162 | { | |
163 | while (ctx) { | |
164 | ||
165 | if (ctx->status & HASH_CTX_STS_COMPLETE) { | |
166 | ctx->status = HASH_CTX_STS_COMPLETE; // Clear PROCESSING bit | |
167 | return ctx; | |
168 | } | |
169 | // If the extra blocks are empty, begin hashing what remains in the user's buffer. | |
170 | if (ctx->partial_block_buffer_length == 0 && ctx->incoming_buffer_length) { | |
171 | const void *buffer = ctx->incoming_buffer; | |
172 | uint32_t len = ctx->incoming_buffer_length; | |
173 | ||
174 | // Only entire blocks can be hashed. Copy remainder to extra blocks buffer. | |
175 | uint32_t copy_len = len & (MD5_BLOCK_SIZE - 1); | |
176 | ||
177 | if (copy_len) { | |
178 | len -= copy_len; | |
179 | //memcpy(ctx->partial_block_buffer, ((const char*)buffer + len), copy_len); | |
180 | memcpy_varlen(ctx->partial_block_buffer, | |
181 | ((const char *)buffer + len), copy_len); | |
182 | ctx->partial_block_buffer_length = copy_len; | |
183 | } | |
184 | ||
185 | ctx->incoming_buffer_length = 0; | |
186 | ||
187 | // len should be a multiple of the block size now | |
188 | assert((len % MD5_BLOCK_SIZE) == 0); | |
189 | ||
190 | // Set len to the number of blocks to be hashed in the user's buffer | |
191 | len >>= MD5_LOG2_BLOCK_SIZE; | |
192 | ||
193 | if (len) { | |
194 | ctx->job.buffer = (uint8_t *) buffer; | |
195 | ctx->job.len = len; | |
196 | ctx = (MD5_HASH_CTX *) md5_mb_mgr_submit_avx512(&mgr->mgr, | |
197 | &ctx->job); | |
198 | continue; | |
199 | } | |
200 | } | |
201 | // If the extra blocks are not empty, then we are either on the last block(s) | |
202 | // or we need more user input before continuing. | |
203 | if (ctx->status & HASH_CTX_STS_LAST) { | |
204 | ||
205 | uint8_t *buf = ctx->partial_block_buffer; | |
206 | uint32_t n_extra_blocks = hash_pad(buf, ctx->total_length); | |
207 | ||
208 | ctx->status = | |
209 | (HASH_CTX_STS) (HASH_CTX_STS_PROCESSING | HASH_CTX_STS_COMPLETE); | |
210 | ||
211 | ctx->job.buffer = buf; | |
212 | ctx->job.len = (uint32_t) n_extra_blocks; | |
213 | ctx = (MD5_HASH_CTX *) md5_mb_mgr_submit_avx512(&mgr->mgr, &ctx->job); | |
214 | continue; | |
215 | } | |
216 | ||
217 | if (ctx) | |
218 | ctx->status = HASH_CTX_STS_IDLE; | |
219 | return ctx; | |
220 | } | |
221 | ||
222 | return NULL; | |
223 | } | |
224 | ||
225 | static inline void hash_init_digest(MD5_WORD_T * digest) | |
226 | { | |
227 | static const MD5_WORD_T hash_initial_digest[MD5_DIGEST_NWORDS] = | |
228 | { MD5_INITIAL_DIGEST }; | |
229 | //memcpy(digest, hash_initial_digest, sizeof(hash_initial_digest)); | |
230 | memcpy_fixedlen(digest, hash_initial_digest, sizeof(hash_initial_digest)); | |
231 | } | |
232 | ||
1e59de90 | 233 | static inline uint32_t hash_pad(uint8_t padblock[MD5_BLOCK_SIZE * 2], uint64_t total_len) |
7c673cae | 234 | { |
1e59de90 | 235 | uint32_t i = (uint32_t) (total_len & (MD5_BLOCK_SIZE - 1)); |
7c673cae FG |
236 | |
237 | // memset(&padblock[i], 0, MD5_BLOCK_SIZE); | |
238 | memclr_fixedlen(&padblock[i], MD5_BLOCK_SIZE); | |
239 | padblock[i] = 0x80; | |
240 | ||
241 | i += ((MD5_BLOCK_SIZE - 1) & (0 - (total_len + MD5_PADLENGTHFIELD_SIZE + 1))) + 1 + | |
242 | MD5_PADLENGTHFIELD_SIZE; | |
243 | ||
244 | *((uint64_t *) & padblock[i - 8]) = ((uint64_t) total_len << 3); | |
245 | ||
246 | return i >> MD5_LOG2_BLOCK_SIZE; // Number of extra blocks to hash | |
247 | } | |
248 | ||
249 | struct slver { | |
250 | uint16_t snum; | |
251 | uint8_t ver; | |
252 | uint8_t core; | |
253 | }; | |
254 | struct slver md5_ctx_mgr_init_avx512_slver_0600018c; | |
255 | struct slver md5_ctx_mgr_init_avx512_slver = { 0x018c, 0x00, 0x06 }; | |
256 | ||
257 | struct slver md5_ctx_mgr_submit_avx512_slver_0600018d; | |
258 | struct slver md5_ctx_mgr_submit_avx512_slver = { 0x018d, 0x00, 0x06 }; | |
259 | ||
260 | struct slver md5_ctx_mgr_flush_avx512_slver_0600018e; | |
261 | struct slver md5_ctx_mgr_flush_avx512_slver = { 0x018e, 0x00, 0x06 }; | |
262 | ||
1e59de90 TL |
263 | #if defined(__clang__) |
264 | # pragma clang attribute pop | |
265 | #endif | |
266 | ||
7c673cae | 267 | #endif // HAVE_AS_KNOWS_AVX512 |