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[ceph.git] / ceph / src / dpdk / app / test-pipeline / runtime.c
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1/*-
2 * BSD LICENSE
3 *
4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <stdio.h>
35#include <stdlib.h>
36#include <stdint.h>
37#include <inttypes.h>
38#include <sys/types.h>
39#include <string.h>
40#include <sys/queue.h>
41#include <stdarg.h>
42#include <errno.h>
43#include <getopt.h>
44
45#include <rte_common.h>
46#include <rte_byteorder.h>
47#include <rte_log.h>
48#include <rte_memory.h>
49#include <rte_memcpy.h>
50#include <rte_memzone.h>
51#include <rte_eal.h>
52#include <rte_per_lcore.h>
53#include <rte_launch.h>
54#include <rte_atomic.h>
55#include <rte_cycles.h>
56#include <rte_prefetch.h>
57#include <rte_lcore.h>
58#include <rte_per_lcore.h>
59#include <rte_branch_prediction.h>
60#include <rte_interrupts.h>
61#include <rte_pci.h>
62#include <rte_random.h>
63#include <rte_debug.h>
64#include <rte_ether.h>
65#include <rte_ethdev.h>
66#include <rte_ring.h>
67#include <rte_mempool.h>
68#include <rte_mbuf.h>
69#include <rte_ip.h>
70#include <rte_tcp.h>
71#include <rte_lpm.h>
72#include <rte_lpm6.h>
73#include <rte_malloc.h>
74
75#include "main.h"
76
77void
78app_main_loop_rx(void) {
79 uint32_t i;
80 int ret;
81
82 RTE_LOG(INFO, USER1, "Core %u is doing RX\n", rte_lcore_id());
83
84 for (i = 0; ; i = ((i + 1) & (app.n_ports - 1))) {
85 uint16_t n_mbufs;
86
87 n_mbufs = rte_eth_rx_burst(
88 app.ports[i],
89 0,
90 app.mbuf_rx.array,
91 app.burst_size_rx_read);
92
93 if (n_mbufs == 0)
94 continue;
95
96 do {
97 ret = rte_ring_sp_enqueue_bulk(
98 app.rings_rx[i],
99 (void **) app.mbuf_rx.array,
100 n_mbufs);
101 } while (ret < 0);
102 }
103}
104
105void
106app_main_loop_worker(void) {
107 struct app_mbuf_array *worker_mbuf;
108 uint32_t i;
109
110 RTE_LOG(INFO, USER1, "Core %u is doing work (no pipeline)\n",
111 rte_lcore_id());
112
113 worker_mbuf = rte_malloc_socket(NULL, sizeof(struct app_mbuf_array),
114 RTE_CACHE_LINE_SIZE, rte_socket_id());
115 if (worker_mbuf == NULL)
116 rte_panic("Worker thread: cannot allocate buffer space\n");
117
118 for (i = 0; ; i = ((i + 1) & (app.n_ports - 1))) {
119 int ret;
120
121 ret = rte_ring_sc_dequeue_bulk(
122 app.rings_rx[i],
123 (void **) worker_mbuf->array,
124 app.burst_size_worker_read);
125
126 if (ret == -ENOENT)
127 continue;
128
129 do {
130 ret = rte_ring_sp_enqueue_bulk(
131 app.rings_tx[i ^ 1],
132 (void **) worker_mbuf->array,
133 app.burst_size_worker_write);
134 } while (ret < 0);
135 }
136}
137
138void
139app_main_loop_tx(void) {
140 uint32_t i;
141
142 RTE_LOG(INFO, USER1, "Core %u is doing TX\n", rte_lcore_id());
143
144 for (i = 0; ; i = ((i + 1) & (app.n_ports - 1))) {
145 uint16_t n_mbufs, n_pkts;
146 int ret;
147
148 n_mbufs = app.mbuf_tx[i].n_mbufs;
149
150 ret = rte_ring_sc_dequeue_bulk(
151 app.rings_tx[i],
152 (void **) &app.mbuf_tx[i].array[n_mbufs],
153 app.burst_size_tx_read);
154
155 if (ret == -ENOENT)
156 continue;
157
158 n_mbufs += app.burst_size_tx_read;
159
160 if (n_mbufs < app.burst_size_tx_write) {
161 app.mbuf_tx[i].n_mbufs = n_mbufs;
162 continue;
163 }
164
165 n_pkts = rte_eth_tx_burst(
166 app.ports[i],
167 0,
168 app.mbuf_tx[i].array,
169 n_mbufs);
170
171 if (n_pkts < n_mbufs) {
172 uint16_t k;
173
174 for (k = n_pkts; k < n_mbufs; k++) {
175 struct rte_mbuf *pkt_to_free;
176
177 pkt_to_free = app.mbuf_tx[i].array[k];
178 rte_pktmbuf_free(pkt_to_free);
179 }
180 }
181
182 app.mbuf_tx[i].n_mbufs = 0;
183 }
184}