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1 | /*- |
2 | * BSD LICENSE | |
3 | * | |
4 | * Copyright(c) Broadcom Limited. | |
5 | * All rights reserved. | |
6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | |
10 | * | |
11 | * * Redistributions of source code must retain the above copyright | |
12 | * notice, this list of conditions and the following disclaimer. | |
13 | * * Redistributions in binary form must reproduce the above copyright | |
14 | * notice, this list of conditions and the following disclaimer in | |
15 | * the documentation and/or other materials provided with the | |
16 | * distribution. | |
17 | * * Neither the name of Broadcom Corporation nor the names of its | |
18 | * contributors may be used to endorse or promote products derived | |
19 | * from this software without specific prior written permission. | |
20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
22 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
23 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
24 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
25 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
26 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
27 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
28 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
29 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
32 | */ | |
33 | ||
34 | #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_ | |
35 | #define _HSI_STRUCT_DEF_EXTERNAL_H_ | |
36 | ||
37 | /* | |
38 | * per-context HW statistics -- chip view | |
39 | */ | |
40 | ||
41 | struct ctx_hw_stats64 { | |
42 | uint64_t rx_ucast_pkts; | |
43 | uint64_t rx_mcast_pkts; | |
44 | uint64_t rx_bcast_pkts; | |
45 | uint64_t rx_drop_pkts; | |
46 | uint64_t rx_discard_pkts; | |
47 | uint64_t rx_ucast_bytes; | |
48 | uint64_t rx_mcast_bytes; | |
49 | uint64_t rx_bcast_bytes; | |
50 | ||
51 | uint64_t tx_ucast_pkts; | |
52 | uint64_t tx_mcast_pkts; | |
53 | uint64_t tx_bcast_pkts; | |
54 | uint64_t tx_drop_pkts; | |
55 | uint64_t tx_discard_pkts; | |
56 | uint64_t tx_ucast_bytes; | |
57 | uint64_t tx_mcast_bytes; | |
58 | uint64_t tx_bcast_bytes; | |
59 | ||
60 | uint64_t tpa_pkts; | |
61 | uint64_t tpa_bytes; | |
62 | uint64_t tpa_events; | |
63 | uint64_t tpa_aborts; | |
64 | } __attribute__((packed)); | |
65 | ||
66 | /* HW Resource Manager Specification 1.5.1 */ | |
67 | #define HWRM_VERSION_MAJOR 1 | |
68 | #define HWRM_VERSION_MINOR 5 | |
69 | #define HWRM_VERSION_UPDATE 1 | |
70 | ||
71 | #define HWRM_VERSION_STR "1.5.1" | |
72 | ||
73 | /* | |
74 | * Following is the signature for HWRM message field that indicates not | |
75 | * applicable (All F's). Need to cast it the size of the field if needed. | |
76 | */ | |
77 | #define HWRM_NA_SIGNATURE ((uint32_t)(-1)) | |
78 | #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */ | |
79 | #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */ | |
80 | #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */ | |
81 | #define HW_HASH_KEY_SIZE 40 | |
82 | #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */ | |
83 | ||
84 | /* | |
85 | * Request types | |
86 | */ | |
87 | #define HWRM_VER_GET (UINT32_C(0x0)) | |
88 | #define HWRM_FUNC_RESET (UINT32_C(0x11)) | |
89 | #define HWRM_FUNC_QCAPS (UINT32_C(0x15)) | |
90 | #define HWRM_FUNC_QCFG (UINT32_C(0x16)) | |
91 | #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a)) | |
92 | #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d)) | |
93 | #define HWRM_PORT_PHY_CFG (UINT32_C(0x20)) | |
94 | #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27)) | |
95 | #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30)) | |
96 | #define HWRM_VNIC_ALLOC (UINT32_C(0x40)) | |
97 | #define HWRM_VNIC_FREE (UINT32_C(0x41)) | |
98 | #define HWRM_VNIC_CFG (UINT32_C(0x42)) | |
99 | #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46)) | |
100 | #define HWRM_RING_ALLOC (UINT32_C(0x50)) | |
101 | #define HWRM_RING_FREE (UINT32_C(0x51)) | |
102 | #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60)) | |
103 | #define HWRM_RING_GRP_FREE (UINT32_C(0x61)) | |
104 | #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70)) | |
105 | #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71)) | |
106 | #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90)) | |
107 | #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91)) | |
108 | #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92)) | |
109 | #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93)) | |
110 | #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0)) | |
111 | #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1)) | |
112 | #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3)) | |
113 | #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0)) | |
114 | ||
115 | /* Return Codes */ | |
116 | #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2)) | |
117 | #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3)) | |
118 | ||
119 | /* Short TX BD (16 bytes) */ | |
120 | struct tx_bd_short { | |
121 | uint16_t flags_type; | |
122 | /* | |
123 | * All bits in this field must be valid on the first BD of a | |
124 | * packet. Only the packet_end bit must be valid for the | |
125 | * remaining BDs of a packet. | |
126 | */ | |
127 | /* This value identifies the type of buffer descriptor. */ | |
128 | #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f) | |
129 | #define TX_BD_SHORT_TYPE_SFT 0 | |
130 | /* | |
131 | * Indicates that this BD is 16B long and is | |
132 | * used for normal L2 packet transmission. | |
133 | */ | |
134 | #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0) | |
135 | /* | |
136 | * If set to 1, the packet ends with the data in the buffer | |
137 | * pointed to by this descriptor. This flag must be valid on | |
138 | * every BD. | |
139 | */ | |
140 | #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40) | |
141 | /* | |
142 | * If set to 1, the device will not generate a completion for | |
143 | * this transmit packet unless there is an error in it's | |
144 | * processing. If this bit is set to 0, then the packet will be | |
145 | * completed normally. This bit must be valid only on the first | |
146 | * BD of a packet. | |
147 | */ | |
148 | #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80) | |
149 | /* | |
150 | * This value indicates how many 16B BD locations are consumed | |
151 | * in the ring by this packet. A value of 1 indicates that this | |
152 | * BD is the only BD (and that the it is a short BD). A value of | |
153 | * 3 indicates either 3 short BDs or 1 long BD and one short BD | |
154 | * in the packet. A value of 0 indicates that there are 32 BD | |
155 | * locations in the packet (the maximum). This field is valid | |
156 | * only on the first BD of a packet. | |
157 | */ | |
158 | #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00) | |
159 | #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8 | |
160 | /* | |
161 | * This value is a hint for the length of the entire packet. It | |
162 | * is used by the chip to optimize internal processing. The | |
163 | * packet will be dropped if the hint is too short. This field | |
164 | * is valid only on the first BD of a packet. | |
165 | */ | |
166 | #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000) | |
167 | #define TX_BD_SHORT_FLAGS_LHINT_SFT 13 | |
168 | /* indicates packet length < 512B */ | |
169 | #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13) | |
170 | /* indicates 512 <= packet length < 1KB */ | |
171 | #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13) | |
172 | /* indicates 1KB <= packet length < 2KB */ | |
173 | #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13) | |
174 | /* indicates packet length >= 2KB */ | |
175 | #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13) | |
176 | #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K | |
177 | /* | |
178 | * If set to 1, the device immediately updates the Send Consumer | |
179 | * Index after the buffer associated with this descriptor has | |
180 | * been transferred via DMA to NIC memory from host memory. An | |
181 | * interrupt may or may not be generated according to the state | |
182 | * of the interrupt avoidance mechanisms. If this bit is set to | |
183 | * 0, then the Consumer Index is only updated as soon as one of | |
184 | * the host interrupt coalescing conditions has been met. This | |
185 | * bit must be valid on the first BD of a packet. | |
186 | */ | |
187 | #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000) | |
188 | /* | |
189 | * All bits in this field must be valid on the first BD of a | |
190 | * packet. Only the packet_end bit must be valid for the | |
191 | * remaining BDs of a packet. | |
192 | */ | |
193 | #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0) | |
194 | #define TX_BD_SHORT_FLAGS_SFT 6 | |
195 | uint16_t len; | |
196 | /* | |
197 | * This is the length of the host physical buffer this BD | |
198 | * describes in bytes. This field must be valid on all BDs of a | |
199 | * packet. | |
200 | */ | |
201 | uint32_t opaque; | |
202 | /* | |
203 | * The opaque data field is pass through to the completion and | |
204 | * can be used for any data that the driver wants to associate | |
205 | * with the transmit BD. This field must be valid on the first | |
206 | * BD of a packet. | |
207 | */ | |
208 | uint64_t addr; | |
209 | /* | |
210 | * This is the host physical address for the portion of the | |
211 | * packet described by this TX BD. This value must be valid on | |
212 | * all BDs of a packet. | |
213 | */ | |
214 | } __attribute__((packed)); | |
215 | ||
216 | /* Long TX BD (32 bytes split to 2 16-byte struct) */ | |
217 | struct tx_bd_long { | |
218 | uint16_t flags_type; | |
219 | /* | |
220 | * All bits in this field must be valid on the first BD of a | |
221 | * packet. Only the packet_end bit must be valid for the | |
222 | * remaining BDs of a packet. | |
223 | */ | |
224 | /* This value identifies the type of buffer descriptor. */ | |
225 | #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f) | |
226 | #define TX_BD_LONG_TYPE_SFT 0 | |
227 | /* | |
228 | * Indicates that this BD is 32B long and is | |
229 | * used for normal L2 packet transmission. | |
230 | */ | |
231 | #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10) | |
232 | /* | |
233 | * If set to 1, the packet ends with the data in the buffer | |
234 | * pointed to by this descriptor. This flag must be valid on | |
235 | * every BD. | |
236 | */ | |
237 | #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40) | |
238 | /* | |
239 | * If set to 1, the device will not generate a completion for | |
240 | * this transmit packet unless there is an error in it's | |
241 | * processing. If this bit is set to 0, then the packet will be | |
242 | * completed normally. This bit must be valid only on the first | |
243 | * BD of a packet. | |
244 | */ | |
245 | #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80) | |
246 | /* | |
247 | * This value indicates how many 16B BD locations are consumed | |
248 | * in the ring by this packet. A value of 1 indicates that this | |
249 | * BD is the only BD (and that the it is a short BD). A value of | |
250 | * 3 indicates either 3 short BDs or 1 long BD and one short BD | |
251 | * in the packet. A value of 0 indicates that there are 32 BD | |
252 | * locations in the packet (the maximum). This field is valid | |
253 | * only on the first BD of a packet. | |
254 | */ | |
255 | #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00) | |
256 | #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8 | |
257 | /* | |
258 | * This value is a hint for the length of the entire packet. It | |
259 | * is used by the chip to optimize internal processing. The | |
260 | * packet will be dropped if the hint is too short. This field | |
261 | * is valid only on the first BD of a packet. | |
262 | */ | |
263 | #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000) | |
264 | #define TX_BD_LONG_FLAGS_LHINT_SFT 13 | |
265 | /* indicates packet length < 512B */ | |
266 | #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13) | |
267 | /* indicates 512 <= packet length < 1KB */ | |
268 | #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13) | |
269 | /* indicates 1KB <= packet length < 2KB */ | |
270 | #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13) | |
271 | /* indicates packet length >= 2KB */ | |
272 | #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13) | |
273 | #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K | |
274 | /* | |
275 | * If set to 1, the device immediately updates the Send Consumer | |
276 | * Index after the buffer associated with this descriptor has | |
277 | * been transferred via DMA to NIC memory from host memory. An | |
278 | * interrupt may or may not be generated according to the state | |
279 | * of the interrupt avoidance mechanisms. If this bit is set to | |
280 | * 0, then the Consumer Index is only updated as soon as one of | |
281 | * the host interrupt coalescing conditions has been met. This | |
282 | * bit must be valid on the first BD of a packet. | |
283 | */ | |
284 | #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000) | |
285 | /* | |
286 | * All bits in this field must be valid on the first BD of a | |
287 | * packet. Only the packet_end bit must be valid for the | |
288 | * remaining BDs of a packet. | |
289 | */ | |
290 | #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0) | |
291 | #define TX_BD_LONG_FLAGS_SFT 6 | |
292 | uint16_t len; | |
293 | /* | |
294 | * This is the length of the host physical buffer this BD | |
295 | * describes in bytes. This field must be valid on all BDs of a | |
296 | * packet. | |
297 | */ | |
298 | uint32_t opaque; | |
299 | /* | |
300 | * The opaque data field is pass through to the completion and | |
301 | * can be used for any data that the driver wants to associate | |
302 | * with the transmit BD. This field must be valid on the first | |
303 | * BD of a packet. | |
304 | */ | |
305 | uint64_t addr; | |
306 | /* | |
307 | * This is the host physical address for the portion of the | |
308 | * packet described by this TX BD. This value must be valid on | |
309 | * all BDs of a packet. | |
310 | */ | |
311 | } __attribute__((packed)); | |
312 | ||
313 | /* last 16 bytes of Long TX BD */ | |
314 | struct tx_bd_long_hi { | |
315 | uint16_t lflags; | |
316 | /* | |
317 | * All bits in this field must be valid on the first BD of a | |
318 | * packet. Their value on other BDs of the packet will be | |
319 | * ignored. | |
320 | */ | |
321 | /* | |
322 | * If set to 1, the controller replaces the TCP/UPD checksum | |
323 | * fields of normal TCP/UPD checksum, or the inner TCP/UDP | |
324 | * checksum field of the encapsulated TCP/UDP packets with the | |
325 | * hardware calculated TCP/UDP checksum for the packet | |
326 | * associated with this descriptor. The flag is ignored if the | |
327 | * LSO flag is set. This bit must be valid on the first BD of a | |
328 | * packet. | |
329 | */ | |
330 | #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1) | |
331 | /* | |
332 | * If set to 1, the controller replaces the IP checksum of the | |
333 | * normal packets, or the inner IP checksum of the encapsulated | |
334 | * packets with the hardware calculated IP checksum for the | |
335 | * packet associated with this descriptor. This bit must be | |
336 | * valid on the first BD of a packet. | |
337 | */ | |
338 | #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2) | |
339 | /* | |
340 | * If set to 1, the controller will not append an Ethernet CRC | |
341 | * to the end of the frame. This bit must be valid on the first | |
342 | * BD of a packet. Packet must be 64B or longer when this flag | |
343 | * is set. It is not useful to use this bit with any form of TX | |
344 | * offload such as CSO or LSO. The intent is that the packet | |
345 | * from the host already has a valid Ethernet CRC on the packet. | |
346 | */ | |
347 | #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4) | |
348 | /* | |
349 | * If set to 1, the device will record the time at which the | |
350 | * packet was actually transmitted at the TX MAC. This bit must | |
351 | * be valid on the first BD of a packet. | |
352 | */ | |
353 | #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8) | |
354 | /* | |
355 | * If set to 1, The controller replaces the tunnel IP checksum | |
356 | * field with hardware calculated IP checksum for the IP header | |
357 | * of the packet associated with this descriptor. For outer UDP | |
358 | * checksum, global outer UDP checksum TE_NIC register needs to | |
359 | * be enabled. If the global outer UDP checksum TE_NIC register | |
360 | * bit is set, outer UDP checksum will be calculated for the | |
361 | * following cases: 1. Packets with tcp_udp_chksum flag set to | |
362 | * offload checksum for inner packet AND the inner packet is | |
363 | * TCP/UDP. If the inner packet is ICMP for example (non- | |
364 | * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP | |
365 | * checksum will not be calculated. 2. Packets with lso flag set | |
366 | * which implies inner TCP checksum calculation as part of LSO | |
367 | * operation. | |
368 | */ | |
369 | #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10) | |
370 | /* | |
371 | * If set to 1, the device will treat this packet with LSO(Large | |
372 | * Send Offload) processing for both normal or encapsulated | |
373 | * packets, which is a form of TCP segmentation. When this bit | |
374 | * is 1, the hdr_size and mss fields must be valid. The driver | |
375 | * doesn't need to set t_ip_chksum, ip_chksum, and | |
376 | * tcp_udp_chksum flags since the controller will replace the | |
377 | * appropriate checksum fields for segmented packets. When this | |
378 | * bit is 1, the hdr_size and mss fields must be valid. | |
379 | */ | |
380 | #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20) | |
381 | /* | |
382 | * If set to zero when LSO is '1', then the IPID will be treated | |
383 | * as a 16b number and will be wrapped if it exceeds a value of | |
384 | * 0xffff. If set to one when LSO is '1', then the IPID will be | |
385 | * treated as a 15b number and will be wrapped if it exceeds a | |
386 | * value 0f 0x7fff. | |
387 | */ | |
388 | #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40) | |
389 | /* | |
390 | * If set to zero when LSO is '1', then the IPID of the tunnel | |
391 | * IP header will not be modified during LSO operations. If set | |
392 | * to one when LSO is '1', then the IPID of the tunnel IP header | |
393 | * will be incremented for each subsequent segment of an LSO | |
394 | * operation. The flag is ignored if the LSO packet is a normal | |
395 | * (non-tunneled) TCP packet. | |
396 | */ | |
397 | #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80) | |
398 | /* | |
399 | * If set to '1', then the RoCE ICRC will be appended to the | |
400 | * packet. Packet must be a valid RoCE format packet. | |
401 | */ | |
402 | #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100) | |
403 | /* | |
404 | * If set to '1', then the FCoE CRC will be appended to the | |
405 | * packet. Packet must be a valid FCoE format packet. | |
406 | */ | |
407 | #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200) | |
408 | uint16_t hdr_size; | |
409 | /* | |
410 | * When LSO is '1', this field must contain the offset of the | |
411 | * TCP payload from the beginning of the packet in as 16b words. | |
412 | * In case of encapsulated/tunneling packet, this field contains | |
413 | * the offset of the inner TCP payload from beginning of the | |
414 | * packet as 16-bit words. This value must be valid on the first | |
415 | * BD of a packet. | |
416 | */ | |
417 | #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff) | |
418 | #define TX_BD_LONG_HDR_SIZE_SFT 0 | |
419 | uint32_t mss; | |
420 | /* | |
421 | * This is the MSS value that will be used to do the LSO | |
422 | * processing. The value is the length in bytes of the TCP | |
423 | * payload for each segment generated by the LSO operation. This | |
424 | * value must be valid on the first BD of a packet. | |
425 | */ | |
426 | #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff) | |
427 | #define TX_BD_LONG_MSS_SFT 0 | |
428 | uint16_t unused_2; | |
429 | uint16_t cfa_action; | |
430 | /* | |
431 | * This value selects a CFA action to perform on the packet. Set | |
432 | * this value to zero if no CFA action is desired. This value | |
433 | * must be valid on the first BD of a packet. | |
434 | */ | |
435 | uint32_t cfa_meta; | |
436 | /* | |
437 | * This value is action meta-data that defines CFA edit | |
438 | * operations that are done in addition to any action editing. | |
439 | */ | |
440 | /* When key=1, This is the VLAN tag VID value. */ | |
441 | #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff) | |
442 | #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0 | |
443 | /* When key=1, This is the VLAN tag DE value. */ | |
444 | #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000) | |
445 | /* When key=1, This is the VLAN tag PRI value. */ | |
446 | #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000) | |
447 | #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13 | |
448 | /* When key=1, This is the VLAN tag TPID select value. */ | |
449 | #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000) | |
450 | #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16 | |
451 | /* 0x88a8 */ | |
452 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16) | |
453 | /* 0x8100 */ | |
454 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16) | |
455 | /* 0x9100 */ | |
456 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16) | |
457 | /* 0x9200 */ | |
458 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16) | |
459 | /* 0x9300 */ | |
460 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16) | |
461 | /* Value programmed in CFA VLANTPID register. */ | |
462 | #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16) | |
463 | #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \ | |
464 | TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG | |
465 | /* When key=1, This is the VLAN tag TPID select value. */ | |
466 | #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000) | |
467 | #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19 | |
468 | /* | |
469 | * This field identifies the type of edit to be performed on the | |
470 | * packet. This value must be valid on the first BD of a packet. | |
471 | */ | |
472 | #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000) | |
473 | #define TX_BD_LONG_CFA_META_KEY_SFT 28 | |
474 | /* No editing */ | |
475 | #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28) | |
476 | /* | |
477 | * - meta[17:16] - TPID select value (0 = | |
478 | * 0x8100). - meta[15:12] - PRI/DE value. - | |
479 | * meta[11:0] - VID value. | |
480 | */ | |
481 | #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28) | |
482 | #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG | |
483 | } __attribute__((packed)); | |
484 | ||
485 | /* RX Producer Packet BD (16 bytes) */ | |
486 | struct rx_prod_pkt_bd { | |
487 | uint16_t flags_type; | |
488 | /* This value identifies the type of buffer descriptor. */ | |
489 | #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f) | |
490 | #define RX_PROD_PKT_BD_TYPE_SFT 0 | |
491 | /* | |
492 | * Indicates that this BD is 16B long and is an | |
493 | * RX Producer (ie. empty) buffer descriptor. | |
494 | */ | |
495 | #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4) | |
496 | /* | |
497 | * If set to 1, the packet will be placed at the address plus | |
498 | * 2B. The 2 Bytes of padding will be written as zero. | |
499 | */ | |
500 | /* | |
501 | * This is intended to be used when the host buffer is cache- | |
502 | * line aligned to produce packets that are easy to parse in | |
503 | * host memory while still allowing writes to be cache line | |
504 | * aligned. | |
505 | */ | |
506 | #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40) | |
507 | /* | |
508 | * If set to 1, the packet write will be padded out to the | |
509 | * nearest cache-line with zero value padding. | |
510 | */ | |
511 | /* | |
512 | * If receive buffers start/end on cache-line boundaries, this | |
513 | * feature will ensure that all data writes on the PCI bus | |
514 | * start/end on cache line boundaries. | |
515 | */ | |
516 | #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80) | |
517 | /* | |
518 | * This value is the number of additional buffers in the ring | |
519 | * that describe the buffer space to be consumed for the this | |
520 | * packet. If the value is zero, then the packet must fit within | |
521 | * the space described by this BD. If this value is 1 or more, | |
522 | * it indicates how many additional "buffer" BDs are in the ring | |
523 | * immediately following this BD to be used for the same network | |
524 | * packet. Even if the packet to be placed does not need all the | |
525 | * additional buffers, they will be consumed anyway. | |
526 | */ | |
527 | #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300) | |
528 | #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8 | |
529 | #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0) | |
530 | #define RX_PROD_PKT_BD_FLAGS_SFT 6 | |
531 | uint16_t len; | |
532 | /* | |
533 | * This is the length in Bytes of the host physical buffer where | |
534 | * data for the packet may be placed in host memory. | |
535 | */ | |
536 | /* | |
537 | * While this is a Byte resolution value, it is often | |
538 | * advantageous to ensure that the buffers provided end on a | |
539 | * host cache line. | |
540 | */ | |
541 | uint32_t opaque; | |
542 | /* | |
543 | * The opaque data field is pass through to the completion and | |
544 | * can be used for any data that the driver wants to associate | |
545 | * with this receive buffer set. | |
546 | */ | |
547 | uint64_t addr; | |
548 | /* | |
549 | * This is the host physical address where data for the packet | |
550 | * may by placed in host memory. | |
551 | */ | |
552 | /* | |
553 | * While this is a Byte resolution value, it is often | |
554 | * advantageous to ensure that the buffers provide start on a | |
555 | * host cache line. | |
556 | */ | |
557 | } __attribute__((packed)); | |
558 | ||
559 | /* Completion Ring Structures */ | |
560 | /* Note: This structure is used by the HWRM to communicate HWRM Error. */ | |
561 | /* Base Completion Record (16 bytes) */ | |
562 | struct cmpl_base { | |
563 | uint16_t type; | |
564 | /* unused is 10 b */ | |
565 | /* | |
566 | * This field indicates the exact type of the completion. By | |
567 | * convention, the LSB identifies the length of the record in | |
568 | * 16B units. Even values indicate 16B records. Odd values | |
569 | * indicate 32B records. | |
570 | */ | |
571 | #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f) | |
572 | #define CMPL_BASE_TYPE_SFT 0 | |
573 | /* TX L2 completion: Completion of TX packet. Length = 16B */ | |
574 | #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0) | |
575 | /* | |
576 | * RX L2 completion: Completion of and L2 RX | |
577 | * packet. Length = 32B | |
578 | */ | |
579 | #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11) | |
580 | /* | |
581 | * RX Aggregation Buffer completion : Completion | |
582 | * of an L2 aggregation buffer in support of | |
583 | * TPA, HDS, or Jumbo packet completion. Length | |
584 | * = 16B | |
585 | */ | |
586 | #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12) | |
587 | /* | |
588 | * RX L2 TPA Start Completion: Completion at the | |
589 | * beginning of a TPA operation. Length = 32B | |
590 | */ | |
591 | #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13) | |
592 | /* | |
593 | * RX L2 TPA End Completion: Completion at the | |
594 | * end of a TPA operation. Length = 32B | |
595 | */ | |
596 | #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15) | |
597 | /* | |
598 | * Statistics Ejection Completion: Completion of | |
599 | * statistics data ejection buffer. Length = 16B | |
600 | */ | |
601 | #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a) | |
602 | /* HWRM Command Completion: Completion of an HWRM command. */ | |
603 | #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20) | |
604 | /* Forwarded HWRM Request */ | |
605 | #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22) | |
606 | /* Forwarded HWRM Response */ | |
607 | #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24) | |
608 | /* HWRM Asynchronous Event Information */ | |
609 | #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e) | |
610 | /* CQ Notification */ | |
611 | #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30) | |
612 | /* SRQ Threshold Event */ | |
613 | #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32) | |
614 | /* DBQ Threshold Event */ | |
615 | #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34) | |
616 | /* QP Async Notification */ | |
617 | #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38) | |
618 | /* Function Async Notification */ | |
619 | #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a) | |
620 | /* unused is 10 b */ | |
621 | uint16_t info1; | |
622 | /* info1 is 16 b */ | |
623 | uint32_t info2; | |
624 | /* info2 is 32 b */ | |
625 | uint32_t info3_v; | |
626 | /* info3 is 31 b */ | |
627 | /* | |
628 | * This value is written by the NIC such that it will be | |
629 | * different for each pass through the completion queue. The | |
630 | * even passes will write 1. The odd passes will write 0. | |
631 | */ | |
632 | #define CMPL_BASE_V UINT32_C(0x1) | |
633 | /* info3 is 31 b */ | |
634 | #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe) | |
635 | #define CMPL_BASE_INFO3_SFT 1 | |
636 | uint32_t info4; | |
637 | /* info4 is 32 b */ | |
638 | } __attribute__((packed)); | |
639 | ||
640 | /* TX Completion Record (16 bytes) */ | |
641 | struct tx_cmpl { | |
642 | uint16_t flags_type; | |
643 | /* | |
644 | * This field indicates the exact type of the completion. By | |
645 | * convention, the LSB identifies the length of the record in | |
646 | * 16B units. Even values indicate 16B records. Odd values | |
647 | * indicate 32B records. | |
648 | */ | |
649 | #define TX_CMPL_TYPE_MASK UINT32_C(0x3f) | |
650 | #define TX_CMPL_TYPE_SFT 0 | |
651 | /* TX L2 completion: Completion of TX packet. Length = 16B */ | |
652 | #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0) | |
653 | /* | |
654 | * When this bit is '1', it indicates a packet that has an error | |
655 | * of some type. Type of error is indicated in error_flags. | |
656 | */ | |
657 | #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40) | |
658 | /* | |
659 | * When this bit is '1', it indicates that the packet completed | |
660 | * was transmitted using the push acceleration data provided by | |
661 | * the driver. When this bit is '0', it indicates that the | |
662 | * packet had not push acceleration data written or was executed | |
663 | * as a normal packet even though push data was provided. | |
664 | */ | |
665 | #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80) | |
666 | #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0) | |
667 | #define TX_CMPL_FLAGS_SFT 6 | |
668 | uint16_t unused_0; | |
669 | /* unused1 is 16 b */ | |
670 | uint32_t opaque; | |
671 | /* | |
672 | * This is a copy of the opaque field from the first TX BD of | |
673 | * this transmitted packet. | |
674 | */ | |
675 | uint16_t errors_v; | |
676 | /* | |
677 | * This value is written by the NIC such that it will be | |
678 | * different for each pass through the completion queue. The | |
679 | * even passes will write 1. The odd passes will write 0. | |
680 | */ | |
681 | #define TX_CMPL_V UINT32_C(0x1) | |
682 | /* | |
683 | * This error indicates that there was some sort of problem with | |
684 | * the BDs for the packet. | |
685 | */ | |
686 | #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe) | |
687 | #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1 | |
688 | /* No error */ | |
689 | #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1) | |
690 | /* Bad Format: BDs were not formatted correctly. */ | |
691 | #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1) | |
692 | #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \ | |
693 | TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT | |
694 | /* | |
695 | * When this bit is '1', it indicates that the length of the | |
696 | * packet was zero. No packet was transmitted. | |
697 | */ | |
698 | #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10) | |
699 | /* | |
700 | * When this bit is '1', it indicates that the packet was longer | |
701 | * than the programmed limit in TDI. No packet was transmitted. | |
702 | */ | |
703 | #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20) | |
704 | /* | |
705 | * When this bit is '1', it indicates that one or more of the | |
706 | * BDs associated with this packet generated a PCI error. This | |
707 | * probably means the address was not valid. | |
708 | */ | |
709 | #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40) | |
710 | /* | |
711 | * When this bit is '1', it indicates that the packet was longer | |
712 | * than indicated by the hint. No packet was transmitted. | |
713 | */ | |
714 | #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80) | |
715 | /* | |
716 | * When this bit is '1', it indicates that the packet was | |
717 | * dropped due to Poison TLP error on one or more of the TLPs in | |
718 | * the PXP completion. | |
719 | */ | |
720 | #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100) | |
721 | #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe) | |
722 | #define TX_CMPL_ERRORS_SFT 1 | |
723 | uint16_t unused_1; | |
724 | /* unused2 is 16 b */ | |
725 | uint32_t unused_2; | |
726 | /* unused3 is 32 b */ | |
727 | } __attribute__((packed)); | |
728 | ||
729 | /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */ | |
730 | struct rx_pkt_cmpl { | |
731 | uint16_t flags_type; | |
732 | /* | |
733 | * This field indicates the exact type of the completion. By | |
734 | * convention, the LSB identifies the length of the record in | |
735 | * 16B units. Even values indicate 16B records. Odd values | |
736 | * indicate 32B records. | |
737 | */ | |
738 | #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f) | |
739 | #define RX_PKT_CMPL_TYPE_SFT 0 | |
740 | /* | |
741 | * RX L2 completion: Completion of and L2 RX | |
742 | * packet. Length = 32B | |
743 | */ | |
744 | #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11) | |
745 | /* | |
746 | * When this bit is '1', it indicates a packet that has an error | |
747 | * of some type. Type of error is indicated in error_flags. | |
748 | */ | |
749 | #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40) | |
750 | /* This field indicates how the packet was placed in the buffer. */ | |
751 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380) | |
752 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7 | |
753 | /* Normal: Packet was placed using normal algorithm. */ | |
754 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7) | |
755 | /* Jumbo: Packet was placed using jumbo algorithm. */ | |
756 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7) | |
757 | /* | |
758 | * Header/Data Separation: Packet was placed | |
759 | * using Header/Data separation algorithm. The | |
760 | * separation location is indicated by the itype | |
761 | * field. | |
762 | */ | |
763 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7) | |
764 | #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST RX_PKT_CMPL_FLAGS_PLACEMENT_HDS | |
765 | /* This bit is '1' if the RSS field in this completion is valid. */ | |
766 | #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400) | |
767 | /* unused is 1 b */ | |
768 | /* | |
769 | * This value indicates what the inner packet determined for the | |
770 | * packet was. | |
771 | */ | |
772 | #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000) | |
773 | #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12 | |
774 | /* Not Known: Indicates that the packet type was not known. */ | |
775 | #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12) | |
776 | /* | |
777 | * IP Packet: Indicates that the packet was an | |
778 | * IP packet, but further classification was not | |
779 | * possible. | |
780 | */ | |
781 | #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12) | |
782 | /* | |
783 | * TCP Packet: Indicates that the packet was IP | |
784 | * and TCP. This indicates that the | |
785 | * payload_offset field is valid. | |
786 | */ | |
787 | #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12) | |
788 | /* | |
789 | * UDP Packet: Indicates that the packet was IP | |
790 | * and UDP. This indicates that the | |
791 | * payload_offset field is valid. | |
792 | */ | |
793 | #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12) | |
794 | /* | |
795 | * FCoE Packet: Indicates that the packet was | |
796 | * recognized as a FCoE. This also indicates | |
797 | * that the payload_offset field is valid. | |
798 | */ | |
799 | #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12) | |
800 | /* | |
801 | * RoCE Packet: Indicates that the packet was | |
802 | * recognized as a RoCE. This also indicates | |
803 | * that the payload_offset field is valid. | |
804 | */ | |
805 | #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12) | |
806 | /* | |
807 | * ICMP Packet: Indicates that the packet was | |
808 | * recognized as ICMP. This indicates that the | |
809 | * payload_offset field is valid. | |
810 | */ | |
811 | #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12) | |
812 | /* | |
813 | * PtP packet wo/timestamp: Indicates that the | |
814 | * packet was recognized as a PtP packet. | |
815 | */ | |
816 | #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12) | |
817 | /* | |
818 | * PtP packet w/timestamp: Indicates that the | |
819 | * packet was recognized as a PtP packet and | |
820 | * that a timestamp was taken for the packet. | |
821 | */ | |
822 | #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12) | |
823 | #define RX_PKT_CMPL_FLAGS_ITYPE_LAST RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP | |
824 | #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0) | |
825 | #define RX_PKT_CMPL_FLAGS_SFT 6 | |
826 | uint16_t len; | |
827 | /* | |
828 | * This is the length of the data for the packet stored in the | |
829 | * buffer(s) identified by the opaque value. This includes the | |
830 | * packet BD and any associated buffer BDs. This does not | |
831 | * include the the length of any data places in aggregation BDs. | |
832 | */ | |
833 | uint32_t opaque; | |
834 | /* | |
835 | * This is a copy of the opaque field from the RX BD this | |
836 | * completion corresponds to. | |
837 | */ | |
838 | uint8_t agg_bufs_v1; | |
839 | /* unused1 is 2 b */ | |
840 | /* | |
841 | * This value is written by the NIC such that it will be | |
842 | * different for each pass through the completion queue. The | |
843 | * even passes will write 1. The odd passes will write 0. | |
844 | */ | |
845 | #define RX_PKT_CMPL_V1 UINT32_C(0x1) | |
846 | /* | |
847 | * This value is the number of aggregation buffers that follow | |
848 | * this entry in the completion ring that are a part of this | |
849 | * packet. If the value is zero, then the packet is completely | |
850 | * contained in the buffer space provided for the packet in the | |
851 | * RX ring. | |
852 | */ | |
853 | #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e) | |
854 | #define RX_PKT_CMPL_AGG_BUFS_SFT 1 | |
855 | /* unused1 is 2 b */ | |
856 | uint8_t rss_hash_type; | |
857 | /* | |
858 | * This is the RSS hash type for the packet. The value is packed | |
859 | * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]} | |
860 | * . The value of tuple_extrac_op provides the information about | |
861 | * what fields the hash was computed on. * 0: The RSS hash was | |
862 | * computed over source IP address, destination IP address, | |
863 | * source port, and destination port of inner IP and TCP or UDP | |
864 | * headers. Note: For non-tunneled packets, the packet headers | |
865 | * are considered inner packet headers for the RSS hash | |
866 | * computation purpose. * 1: The RSS hash was computed over | |
867 | * source IP address and destination IP address of inner IP | |
868 | * header. Note: For non-tunneled packets, the packet headers | |
869 | * are considered inner packet headers for the RSS hash | |
870 | * computation purpose. * 2: The RSS hash was computed over | |
871 | * source IP address, destination IP address, source port, and | |
872 | * destination port of IP and TCP or UDP headers of outer tunnel | |
873 | * headers. Note: For non-tunneled packets, this value is not | |
874 | * applicable. * 3: The RSS hash was computed over source IP | |
875 | * address and destination IP address of IP header of outer | |
876 | * tunnel headers. Note: For non-tunneled packets, this value is | |
877 | * not applicable. Note that 4-tuples values listed above are | |
878 | * applicable for layer 4 protocols supported and enabled for | |
879 | * RSS in the hardware, HWRM firmware, and drivers. For example, | |
880 | * if RSS hash is supported and enabled for TCP traffic only, | |
881 | * then the values of tuple_extract_op corresponding to 4-tuples | |
882 | * are only valid for TCP traffic. | |
883 | */ | |
884 | uint8_t payload_offset; | |
885 | /* | |
886 | * This value indicates the offset in bytes from the beginning | |
887 | * of the packet where the inner payload starts. This value is | |
888 | * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero | |
889 | * indicates that header is 256B into the packet. | |
890 | */ | |
891 | uint8_t unused_1; | |
892 | /* unused2 is 8 b */ | |
893 | uint32_t rss_hash; | |
894 | /* | |
895 | * This value is the RSS hash value calculated for the packet | |
896 | * based on the mode bits and key value in the VNIC. | |
897 | */ | |
898 | } __attribute__((packed)); | |
899 | ||
900 | /* last 16 bytes of RX Packet Completion Record */ | |
901 | struct rx_pkt_cmpl_hi { | |
902 | uint32_t flags2; | |
903 | /* | |
904 | * This indicates that the ip checksum was calculated for the | |
905 | * inner packet and that the ip_cs_error field indicates if | |
906 | * there was an error. | |
907 | */ | |
908 | #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1) | |
909 | /* | |
910 | * This indicates that the TCP, UDP or ICMP checksum was | |
911 | * calculated for the inner packet and that the l4_cs_error | |
912 | * field indicates if there was an error. | |
913 | */ | |
914 | #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2) | |
915 | /* | |
916 | * This indicates that the ip checksum was calculated for the | |
917 | * tunnel header and that the t_ip_cs_error field indicates if | |
918 | * there was an error. | |
919 | */ | |
920 | #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4) | |
921 | /* | |
922 | * This indicates that the UDP checksum was calculated for the | |
923 | * tunnel packet and that the t_l4_cs_error field indicates if | |
924 | * there was an error. | |
925 | */ | |
926 | #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8) | |
927 | /* This value indicates what format the metadata field is. */ | |
928 | #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0) | |
929 | #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4 | |
930 | /* No metadata informtaion. Value is zero. */ | |
931 | #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4) | |
932 | /* | |
933 | * The metadata field contains the VLAN tag and | |
934 | * TPID value. - metadata[11:0] contains the | |
935 | * vlan VID value. - metadata[12] contains the | |
936 | * vlan DE value. - metadata[15:13] contains the | |
937 | * vlan PRI value. - metadata[31:16] contains | |
938 | * the vlan TPID value. | |
939 | */ | |
940 | #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4) | |
941 | #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \ | |
942 | RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN | |
943 | /* | |
944 | * This field indicates the IP type for the inner-most IP | |
945 | * header. A value of '0' indicates IPv4. A value of '1' | |
946 | * indicates IPv6. This value is only valid if itype indicates a | |
947 | * packet with an IP header. | |
948 | */ | |
949 | #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100) | |
950 | uint32_t metadata; | |
951 | /* | |
952 | * This is data from the CFA block as indicated by the | |
953 | * meta_format field. | |
954 | */ | |
955 | /* When meta_format=1, this value is the VLAN VID. */ | |
956 | #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff) | |
957 | #define RX_PKT_CMPL_METADATA_VID_SFT 0 | |
958 | /* When meta_format=1, this value is the VLAN DE. */ | |
959 | #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000) | |
960 | /* When meta_format=1, this value is the VLAN PRI. */ | |
961 | #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000) | |
962 | #define RX_PKT_CMPL_METADATA_PRI_SFT 13 | |
963 | /* When meta_format=1, this value is the VLAN TPID. */ | |
964 | #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000) | |
965 | #define RX_PKT_CMPL_METADATA_TPID_SFT 16 | |
966 | uint16_t errors_v2; | |
967 | /* | |
968 | * This value is written by the NIC such that it will be | |
969 | * different for each pass through the completion queue. The | |
970 | * even passes will write 1. The odd passes will write 0. | |
971 | */ | |
972 | #define RX_PKT_CMPL_V2 UINT32_C(0x1) | |
973 | /* | |
974 | * This error indicates that there was some sort of problem with | |
975 | * the BDs for the packet that was found after part of the | |
976 | * packet was already placed. The packet should be treated as | |
977 | * invalid. | |
978 | */ | |
979 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe) | |
980 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1 | |
981 | /* No buffer error */ | |
982 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1) | |
983 | /* | |
984 | * Did Not Fit: Packet did not fit into packet | |
985 | * buffer provided. For regular placement, this | |
986 | * means the packet did not fit in the buffer | |
987 | * provided. For HDS and jumbo placement, this | |
988 | * means that the packet could not be placed | |
989 | * into 7 physical buffers or less. | |
990 | */ | |
991 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT (UINT32_C(0x1) << 1) | |
992 | /* | |
993 | * Not On Chip: All BDs needed for the packet | |
994 | * were not on-chip when the packet arrived. | |
995 | */ | |
996 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1) | |
997 | /* Bad Format: BDs were not formatted correctly. */ | |
998 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1) | |
999 | #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \ | |
1000 | RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT | |
1001 | /* This indicates that there was an error in the IP header checksum. */ | |
1002 | #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10) | |
1003 | /* | |
1004 | * This indicates that there was an error in the TCP, UDP or | |
1005 | * ICMP checksum. | |
1006 | */ | |
1007 | #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20) | |
1008 | /* | |
1009 | * This indicates that there was an error in the tunnel IP | |
1010 | * header checksum. | |
1011 | */ | |
1012 | #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40) | |
1013 | /* | |
1014 | * This indicates that there was an error in the tunnel UDP | |
1015 | * checksum. | |
1016 | */ | |
1017 | #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80) | |
1018 | /* | |
1019 | * This indicates that there was a CRC error on either an FCoE | |
1020 | * or RoCE packet. The itype indicates the packet type. | |
1021 | */ | |
1022 | #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100) | |
1023 | /* | |
1024 | * This indicates that there was an error in the tunnel portion | |
1025 | * of the packet when this field is non-zero. | |
1026 | */ | |
1027 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00) | |
1028 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9 | |
1029 | /* | |
1030 | * No additional error occurred on the tunnel | |
1031 | * portion of the packet of the packet does not | |
1032 | * have a tunnel. | |
1033 | */ | |
1034 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9) | |
1035 | /* | |
1036 | * Indicates that IP header version does not | |
1037 | * match expectation from L2 Ethertype for IPv4 | |
1038 | * and IPv6 in the tunnel header. | |
1039 | */ | |
1040 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION (UINT32_C(0x1) << 9) | |
1041 | /* | |
1042 | * Indicates that header length is out of range | |
1043 | * in the tunnel header. Valid for IPv4. | |
1044 | */ | |
1045 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN (UINT32_C(0x2) << 9) | |
1046 | /* | |
1047 | * Indicates that the physical packet is shorter | |
1048 | * than that claimed by the PPPoE header length | |
1049 | * for a tunnel PPPoE packet. | |
1050 | */ | |
1051 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9) | |
1052 | /* | |
1053 | * Indicates that physical packet is shorter | |
1054 | * than that claimed by the tunnel l3 header | |
1055 | * length. Valid for IPv4, or IPv6 tunnel packet | |
1056 | * packets. | |
1057 | */ | |
1058 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR (UINT32_C(0x4) << 9) | |
1059 | /* | |
1060 | * Indicates that the physical packet is shorter | |
1061 | * than that claimed by the tunnel UDP header | |
1062 | * length for a tunnel UDP packet that is not | |
1063 | * fragmented. | |
1064 | */ | |
1065 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR (UINT32_C(0x5) << 9) | |
1066 | /* | |
1067 | * indicates that the IPv4 TTL or IPv6 hop limit | |
1068 | * check have failed (e.g. TTL = 0) in the | |
1069 | * tunnel header. Valid for IPv4, and IPv6. | |
1070 | */ | |
1071 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL (UINT32_C(0x6) << 9) | |
1072 | #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \ | |
1073 | RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL | |
1074 | /* | |
1075 | * This indicates that there was an error in the inner portion | |
1076 | * of the packet when this field is non-zero. | |
1077 | */ | |
1078 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000) | |
1079 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12 | |
1080 | /* | |
1081 | * No additional error occurred on the tunnel | |
1082 | * portion of the packet of the packet does not | |
1083 | * have a tunnel. | |
1084 | */ | |
1085 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12) | |
1086 | /* | |
1087 | * Indicates that IP header version does not | |
1088 | * match expectation from L2 Ethertype for IPv4 | |
1089 | * and IPv6 or that option other than VFT was | |
1090 | * parsed on FCoE packet. | |
1091 | */ | |
1092 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION (UINT32_C(0x1) << 12) | |
1093 | /* | |
1094 | * indicates that header length is out of range. | |
1095 | * Valid for IPv4 and RoCE | |
1096 | */ | |
1097 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN (UINT32_C(0x2) << 12) | |
1098 | /* | |
1099 | * indicates that the IPv4 TTL or IPv6 hop limit | |
1100 | * check have failed (e.g. TTL = 0). Valid for | |
1101 | * IPv4, and IPv6 | |
1102 | */ | |
1103 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12) | |
1104 | /* | |
1105 | * Indicates that physical packet is shorter | |
1106 | * than that claimed by the l3 header length. | |
1107 | * Valid for IPv4, IPv6 packet or RoCE packets. | |
1108 | */ | |
1109 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR (UINT32_C(0x4) << 12) | |
1110 | /* | |
1111 | * Indicates that the physical packet is shorter | |
1112 | * than that claimed by the UDP header length | |
1113 | * for a UDP packet that is not fragmented. | |
1114 | */ | |
1115 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR (UINT32_C(0x5) << 12) | |
1116 | /* | |
1117 | * Indicates that TCP header length > IP | |
1118 | * payload. Valid for TCP packets only. | |
1119 | */ | |
1120 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN (UINT32_C(0x6) << 12) | |
1121 | /* Indicates that TCP header length < 5. Valid for TCP. */ | |
1122 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \ | |
1123 | (UINT32_C(0x7) << 12) | |
1124 | /* | |
1125 | * Indicates that TCP option headers result in a | |
1126 | * TCP header size that does not match data | |
1127 | * offset in TCP header. Valid for TCP. | |
1128 | */ | |
1129 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \ | |
1130 | (UINT32_C(0x8) << 12) | |
1131 | #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \ | |
1132 | RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN | |
1133 | #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe) | |
1134 | #define RX_PKT_CMPL_ERRORS_SFT 1 | |
1135 | uint16_t cfa_code; | |
1136 | /* | |
1137 | * This field identifies the CFA action rule that was used for | |
1138 | * this packet. | |
1139 | */ | |
1140 | uint32_t reorder; | |
1141 | /* | |
1142 | * This value holds the reordering sequence number for the | |
1143 | * packet. If the reordering sequence is not valid, then this | |
1144 | * value is zero. The reordering domain for the packet is in the | |
1145 | * bottom 8 to 10b of the rss_hash value. The bottom 20b of this | |
1146 | * value contain the ordering domain value for the packet. | |
1147 | */ | |
1148 | #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff) | |
1149 | #define RX_PKT_CMPL_REORDER_SFT 0 | |
1150 | } __attribute__((packed)); | |
1151 | ||
1152 | /* HWRM Forwarded Request (16 bytes) */ | |
1153 | struct hwrm_fwd_req_cmpl { | |
1154 | uint16_t req_len_type; | |
1155 | /* Length of forwarded request in bytes. */ | |
1156 | /* | |
1157 | * This field indicates the exact type of the completion. By | |
1158 | * convention, the LSB identifies the length of the record in | |
1159 | * 16B units. Even values indicate 16B records. Odd values | |
1160 | * indicate 32B records. | |
1161 | */ | |
1162 | #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f) | |
1163 | #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0 | |
1164 | /* Forwarded HWRM Request */ | |
1165 | #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22) | |
1166 | /* Length of forwarded request in bytes. */ | |
1167 | #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0) | |
1168 | #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6 | |
1169 | uint16_t source_id; | |
1170 | /* | |
1171 | * Source ID of this request. Typically used in forwarding | |
1172 | * requests and responses. 0x0 - 0xFFF8 - Used for function ids | |
1173 | * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - | |
1174 | * HWRM | |
1175 | */ | |
1176 | uint32_t unused_0; | |
1177 | /* unused1 is 32 b */ | |
1178 | uint32_t req_buf_addr_v[2]; | |
1179 | /* Address of forwarded request. */ | |
1180 | /* | |
1181 | * This value is written by the NIC such that it will be | |
1182 | * different for each pass through the completion queue. The | |
1183 | * even passes will write 1. The odd passes will write 0. | |
1184 | */ | |
1185 | #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1) | |
1186 | /* Address of forwarded request. */ | |
1187 | #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe) | |
1188 | #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1 | |
1189 | } __attribute__((packed)); | |
1190 | ||
1191 | /* HWRM Asynchronous Event Completion Record (16 bytes) */ | |
1192 | struct hwrm_async_event_cmpl { | |
1193 | uint16_t type; | |
1194 | /* unused1 is 10 b */ | |
1195 | /* | |
1196 | * This field indicates the exact type of the completion. By | |
1197 | * convention, the LSB identifies the length of the record in | |
1198 | * 16B units. Even values indicate 16B records. Odd values | |
1199 | * indicate 32B records. | |
1200 | */ | |
1201 | #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f) | |
1202 | #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0 | |
1203 | /* HWRM Asynchronous Event Information */ | |
1204 | #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e) | |
1205 | /* unused1 is 10 b */ | |
1206 | uint16_t event_id; | |
1207 | /* Identifiers of events. */ | |
1208 | /* Link status changed */ | |
1209 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0) | |
1210 | /* Link MTU changed */ | |
1211 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1) | |
1212 | /* Link speed changed */ | |
1213 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2) | |
1214 | /* DCB Configuration changed */ | |
1215 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3) | |
1216 | /* Port connection not allowed */ | |
1217 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4) | |
1218 | /* Link speed configuration was not allowed */ | |
1219 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5) | |
1220 | /* Link speed configuration change */ | |
1221 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6) | |
1222 | /* Port PHY configuration change */ | |
1223 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7) | |
1224 | /* Function driver unloaded */ | |
1225 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10) | |
1226 | /* Function driver loaded */ | |
1227 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11) | |
1228 | /* Function FLR related processing has completed */ | |
1229 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12) | |
1230 | /* PF driver unloaded */ | |
1231 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20) | |
1232 | /* PF driver loaded */ | |
1233 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21) | |
1234 | /* VF Function Level Reset (FLR) */ | |
1235 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30) | |
1236 | /* VF MAC Address Change */ | |
1237 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31) | |
1238 | /* PF-VF communication channel status change. */ | |
1239 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32) | |
1240 | /* VF Configuration Change */ | |
1241 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33) | |
1242 | /* HWRM Error */ | |
1243 | #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff) | |
1244 | uint32_t event_data2; | |
1245 | /* Event specific data */ | |
1246 | uint8_t opaque_v; | |
1247 | /* opaque is 7 b */ | |
1248 | /* | |
1249 | * This value is written by the NIC such that it will be | |
1250 | * different for each pass through the completion queue. The | |
1251 | * even passes will write 1. The odd passes will write 0. | |
1252 | */ | |
1253 | #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1) | |
1254 | /* opaque is 7 b */ | |
1255 | #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe) | |
1256 | #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1 | |
1257 | uint8_t timestamp_lo; | |
1258 | /* 8-lsb timestamp from POR (100-msec resolution) */ | |
1259 | uint16_t timestamp_hi; | |
1260 | /* 16-lsb timestamp from POR (100-msec resolution) */ | |
1261 | uint32_t event_data1; | |
1262 | /* Event specific data */ | |
1263 | } __attribute__((packed)); | |
1264 | ||
1265 | /* | |
1266 | * Note: The Hardware Resource Manager (HWRM) manages various hardware resources | |
1267 | * inside the chip. The HWRM is implemented in firmware, and runs on embedded | |
1268 | * processors inside the chip. This firmware service is vital part of the chip. | |
1269 | * The chip can not be used by a driver or HWRM client without the HWRM. | |
1270 | */ | |
1271 | ||
1272 | /* Input (16 bytes) */ | |
1273 | struct input { | |
1274 | uint16_t req_type; | |
1275 | /* | |
1276 | * This value indicates what type of request this is. The format | |
1277 | * for the rest of the command is determined by this field. | |
1278 | */ | |
1279 | uint16_t cmpl_ring; | |
1280 | /* | |
1281 | * This value indicates the what completion ring the request | |
1282 | * will be optionally completed on. If the value is -1, then no | |
1283 | * CR completion will be generated. Any other value must be a | |
1284 | * valid CR ring_id value for this function. | |
1285 | */ | |
1286 | uint16_t seq_id; | |
1287 | /* This value indicates the command sequence number. */ | |
1288 | uint16_t target_id; | |
1289 | /* | |
1290 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
1291 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
1292 | * - HWRM | |
1293 | */ | |
1294 | uint64_t resp_addr; | |
1295 | /* | |
1296 | * This is the host address where the response will be written | |
1297 | * when the request is complete. This area must be 16B aligned | |
1298 | * and must be cleared to zero before the request is made. | |
1299 | */ | |
1300 | } __attribute__((packed)); | |
1301 | ||
1302 | /* Output (8 bytes) */ | |
1303 | struct output { | |
1304 | uint16_t error_code; | |
1305 | /* | |
1306 | * Pass/Fail or error type Note: receiver to verify the in | |
1307 | * parameters, and fail the call with an error when appropriate | |
1308 | */ | |
1309 | uint16_t req_type; | |
1310 | /* This field returns the type of original request. */ | |
1311 | uint16_t seq_id; | |
1312 | /* This field provides original sequence number of the command. */ | |
1313 | uint16_t resp_len; | |
1314 | /* | |
1315 | * This field is the length of the response in bytes. The last | |
1316 | * byte of the response is a valid flag that will read as '1' | |
1317 | * when the command has been completely written to memory. | |
1318 | */ | |
1319 | } __attribute__((packed)); | |
1320 | ||
1321 | /* hwrm_ver_get */ | |
1322 | /* | |
1323 | * Description: This function is called by a driver to determine the HWRM | |
1324 | * interface version supported by the HWRM firmware, the version of HWRM | |
1325 | * firmware implementation, the name of HWRM firmware, the versions of other | |
1326 | * embedded firmwares, and the names of other embedded firmwares, etc. Any | |
1327 | * interface or firmware version with major = 0, minor = 0, and update = 0 shall | |
1328 | * be considered an invalid version. | |
1329 | */ | |
1330 | /* Input (24 bytes) */ | |
1331 | struct hwrm_ver_get_input { | |
1332 | uint16_t req_type; | |
1333 | /* | |
1334 | * This value indicates what type of request this is. The format | |
1335 | * for the rest of the command is determined by this field. | |
1336 | */ | |
1337 | uint16_t cmpl_ring; | |
1338 | /* | |
1339 | * This value indicates the what completion ring the request | |
1340 | * will be optionally completed on. If the value is -1, then no | |
1341 | * CR completion will be generated. Any other value must be a | |
1342 | * valid CR ring_id value for this function. | |
1343 | */ | |
1344 | uint16_t seq_id; | |
1345 | /* This value indicates the command sequence number. */ | |
1346 | uint16_t target_id; | |
1347 | /* | |
1348 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
1349 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
1350 | * - HWRM | |
1351 | */ | |
1352 | uint64_t resp_addr; | |
1353 | /* | |
1354 | * This is the host address where the response will be written | |
1355 | * when the request is complete. This area must be 16B aligned | |
1356 | * and must be cleared to zero before the request is made. | |
1357 | */ | |
1358 | uint8_t hwrm_intf_maj; | |
1359 | /* | |
1360 | * This field represents the major version of HWRM interface | |
1361 | * specification supported by the driver HWRM implementation. | |
1362 | * The interface major version is intended to change only when | |
1363 | * non backward compatible changes are made to the HWRM | |
1364 | * interface specification. | |
1365 | */ | |
1366 | uint8_t hwrm_intf_min; | |
1367 | /* | |
1368 | * This field represents the minor version of HWRM interface | |
1369 | * specification supported by the driver HWRM implementation. A | |
1370 | * change in interface minor version is used to reflect | |
1371 | * significant backward compatible modification to HWRM | |
1372 | * interface specification. This can be due to addition or | |
1373 | * removal of functionality. HWRM interface specifications with | |
1374 | * the same major version but different minor versions are | |
1375 | * compatible. | |
1376 | */ | |
1377 | uint8_t hwrm_intf_upd; | |
1378 | /* | |
1379 | * This field represents the update version of HWRM interface | |
1380 | * specification supported by the driver HWRM implementation. | |
1381 | * The interface update version is used to reflect minor changes | |
1382 | * or bug fixes to a released HWRM interface specification. | |
1383 | */ | |
1384 | uint8_t unused_0[5]; | |
1385 | } __attribute__((packed)); | |
1386 | ||
1387 | /* Output (128 bytes) */ | |
1388 | struct hwrm_ver_get_output { | |
1389 | uint16_t error_code; | |
1390 | /* | |
1391 | * Pass/Fail or error type Note: receiver to verify the in | |
1392 | * parameters, and fail the call with an error when appropriate | |
1393 | */ | |
1394 | uint16_t req_type; | |
1395 | /* This field returns the type of original request. */ | |
1396 | uint16_t seq_id; | |
1397 | /* This field provides original sequence number of the command. */ | |
1398 | uint16_t resp_len; | |
1399 | /* | |
1400 | * This field is the length of the response in bytes. The last | |
1401 | * byte of the response is a valid flag that will read as '1' | |
1402 | * when the command has been completely written to memory. | |
1403 | */ | |
1404 | uint8_t hwrm_intf_maj; | |
1405 | /* | |
1406 | * This field represents the major version of HWRM interface | |
1407 | * specification supported by the HWRM implementation. The | |
1408 | * interface major version is intended to change only when non | |
1409 | * backward compatible changes are made to the HWRM interface | |
1410 | * specification. A HWRM implementation that is compliant with | |
1411 | * this specification shall provide value of 1 in this field. | |
1412 | */ | |
1413 | uint8_t hwrm_intf_min; | |
1414 | /* | |
1415 | * This field represents the minor version of HWRM interface | |
1416 | * specification supported by the HWRM implementation. A change | |
1417 | * in interface minor version is used to reflect significant | |
1418 | * backward compatible modification to HWRM interface | |
1419 | * specification. This can be due to addition or removal of | |
1420 | * functionality. HWRM interface specifications with the same | |
1421 | * major version but different minor versions are compatible. A | |
1422 | * HWRM implementation that is compliant with this specification | |
1423 | * shall provide value of 2 in this field. | |
1424 | */ | |
1425 | uint8_t hwrm_intf_upd; | |
1426 | /* | |
1427 | * This field represents the update version of HWRM interface | |
1428 | * specification supported by the HWRM implementation. The | |
1429 | * interface update version is used to reflect minor changes or | |
1430 | * bug fixes to a released HWRM interface specification. A HWRM | |
1431 | * implementation that is compliant with this specification | |
1432 | * shall provide value of 2 in this field. | |
1433 | */ | |
1434 | uint8_t hwrm_intf_rsvd; | |
1435 | uint8_t hwrm_fw_maj; | |
1436 | /* | |
1437 | * This field represents the major version of HWRM firmware. A | |
1438 | * change in firmware major version represents a major firmware | |
1439 | * release. | |
1440 | */ | |
1441 | uint8_t hwrm_fw_min; | |
1442 | /* | |
1443 | * This field represents the minor version of HWRM firmware. A | |
1444 | * change in firmware minor version represents significant | |
1445 | * firmware functionality changes. | |
1446 | */ | |
1447 | uint8_t hwrm_fw_bld; | |
1448 | /* | |
1449 | * This field represents the build version of HWRM firmware. A | |
1450 | * change in firmware build version represents bug fixes to a | |
1451 | * released firmware. | |
1452 | */ | |
1453 | uint8_t hwrm_fw_rsvd; | |
1454 | /* | |
1455 | * This field is a reserved field. This field can be used to | |
1456 | * represent firmware branches or customer specific releases | |
1457 | * tied to a specific (major,minor,update) version of the HWRM | |
1458 | * firmware. | |
1459 | */ | |
1460 | uint8_t mgmt_fw_maj; | |
1461 | /* | |
1462 | * This field represents the major version of mgmt firmware. A | |
1463 | * change in major version represents a major release. | |
1464 | */ | |
1465 | uint8_t mgmt_fw_min; | |
1466 | /* | |
1467 | * This field represents the minor version of mgmt firmware. A | |
1468 | * change in minor version represents significant functionality | |
1469 | * changes. | |
1470 | */ | |
1471 | uint8_t mgmt_fw_bld; | |
1472 | /* | |
1473 | * This field represents the build version of mgmt firmware. A | |
1474 | * change in update version represents bug fixes. | |
1475 | */ | |
1476 | uint8_t mgmt_fw_rsvd; | |
1477 | /* | |
1478 | * This field is a reserved field. This field can be used to | |
1479 | * represent firmware branches or customer specific releases | |
1480 | * tied to a specific (major,minor,update) version | |
1481 | */ | |
1482 | uint8_t netctrl_fw_maj; | |
1483 | /* | |
1484 | * This field represents the major version of network control | |
1485 | * firmware. A change in major version represents a major | |
1486 | * release. | |
1487 | */ | |
1488 | uint8_t netctrl_fw_min; | |
1489 | /* | |
1490 | * This field represents the minor version of network control | |
1491 | * firmware. A change in minor version represents significant | |
1492 | * functionality changes. | |
1493 | */ | |
1494 | uint8_t netctrl_fw_bld; | |
1495 | /* | |
1496 | * This field represents the build version of network control | |
1497 | * firmware. A change in update version represents bug fixes. | |
1498 | */ | |
1499 | uint8_t netctrl_fw_rsvd; | |
1500 | /* | |
1501 | * This field is a reserved field. This field can be used to | |
1502 | * represent firmware branches or customer specific releases | |
1503 | * tied to a specific (major,minor,update) version | |
1504 | */ | |
1505 | uint32_t dev_caps_cfg; | |
1506 | /* | |
1507 | * This field is used to indicate device's capabilities and | |
1508 | * configurations. | |
1509 | */ | |
1510 | /* | |
1511 | * If set to 1, then secure firmware update behavior is | |
1512 | * supported. If set to 0, then secure firmware update behavior | |
1513 | * is not supported. | |
1514 | */ | |
1515 | #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED UINT32_C(0x1) | |
1516 | /* | |
1517 | * If set to 1, then firmware based DCBX agent is supported. If | |
1518 | * set to 0, then firmware based DCBX agent capability is not | |
1519 | * supported on this device. | |
1520 | */ | |
1521 | #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED UINT32_C(0x2) | |
1522 | uint8_t roce_fw_maj; | |
1523 | /* | |
1524 | * This field represents the major version of RoCE firmware. A | |
1525 | * change in major version represents a major release. | |
1526 | */ | |
1527 | uint8_t roce_fw_min; | |
1528 | /* | |
1529 | * This field represents the minor version of RoCE firmware. A | |
1530 | * change in minor version represents significant functionality | |
1531 | * changes. | |
1532 | */ | |
1533 | uint8_t roce_fw_bld; | |
1534 | /* | |
1535 | * This field represents the build version of RoCE firmware. A | |
1536 | * change in update version represents bug fixes. | |
1537 | */ | |
1538 | uint8_t roce_fw_rsvd; | |
1539 | /* | |
1540 | * This field is a reserved field. This field can be used to | |
1541 | * represent firmware branches or customer specific releases | |
1542 | * tied to a specific (major,minor,update) version | |
1543 | */ | |
1544 | char hwrm_fw_name[16]; | |
1545 | /* | |
1546 | * This field represents the name of HWRM FW (ASCII chars with | |
1547 | * NULL at the end). | |
1548 | */ | |
1549 | char mgmt_fw_name[16]; | |
1550 | /* | |
1551 | * This field represents the name of mgmt FW (ASCII chars with | |
1552 | * NULL at the end). | |
1553 | */ | |
1554 | char netctrl_fw_name[16]; | |
1555 | /* | |
1556 | * This field represents the name of network control firmware | |
1557 | * (ASCII chars with NULL at the end). | |
1558 | */ | |
1559 | uint32_t reserved2[4]; | |
1560 | /* | |
1561 | * This field is reserved for future use. The responder should | |
1562 | * set it to 0. The requester should ignore this field. | |
1563 | */ | |
1564 | char roce_fw_name[16]; | |
1565 | /* | |
1566 | * This field represents the name of RoCE FW (ASCII chars with | |
1567 | * NULL at the end). | |
1568 | */ | |
1569 | uint16_t chip_num; | |
1570 | /* This field returns the chip number. */ | |
1571 | uint8_t chip_rev; | |
1572 | /* This field returns the revision of chip. */ | |
1573 | uint8_t chip_metal; | |
1574 | /* This field returns the chip metal number. */ | |
1575 | uint8_t chip_bond_id; | |
1576 | /* This field returns the bond id of the chip. */ | |
1577 | uint8_t chip_platform_type; | |
1578 | /* | |
1579 | * This value indicates the type of platform used for chip | |
1580 | * implementation. | |
1581 | */ | |
1582 | /* ASIC */ | |
1583 | #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0) | |
1584 | /* FPGA platform of the chip. */ | |
1585 | #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1) | |
1586 | /* Palladium platform of the chip. */ | |
1587 | #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2) | |
1588 | uint16_t max_req_win_len; | |
1589 | /* | |
1590 | * This field returns the maximum value of request window that | |
1591 | * is supported by the HWRM. The request window is mapped into | |
1592 | * device address space using MMIO. | |
1593 | */ | |
1594 | uint16_t max_resp_len; | |
1595 | /* This field returns the maximum value of response buffer in bytes. */ | |
1596 | uint16_t def_req_timeout; | |
1597 | /* | |
1598 | * This field returns the default request timeout value in | |
1599 | * milliseconds. | |
1600 | */ | |
1601 | uint8_t unused_0; | |
1602 | uint8_t unused_1; | |
1603 | uint8_t unused_2; | |
1604 | uint8_t valid; | |
1605 | /* | |
1606 | * This field is used in Output records to indicate that the | |
1607 | * output is completely written to RAM. This field should be | |
1608 | * read as '1' to indicate that the output has been completely | |
1609 | * written. When writing a command completion or response to an | |
1610 | * internal processor, the order of writes has to be such that | |
1611 | * this field is written last. | |
1612 | */ | |
1613 | } __attribute__((packed)); | |
1614 | ||
1615 | /* hwrm_func_reset */ | |
1616 | /* | |
1617 | * Description: This command resets a hardware function (PCIe function) and | |
1618 | * frees any resources used by the function. This command shall be initiated by | |
1619 | * the driver after an FLR has occurred to prepare the function for re-use. This | |
1620 | * command may also be initiated by a driver prior to doing it's own | |
1621 | * configuration. This command puts the function into the reset state. In the | |
1622 | * reset state, global and port related features of the chip are not available. | |
1623 | */ | |
1624 | /* | |
1625 | * Note: This command will reset a function that has already been disabled or | |
1626 | * idled. The command returns all the resources owned by the function so a new | |
1627 | * driver may allocate and configure resources normally. | |
1628 | */ | |
1629 | /* Input (24 bytes) */ | |
1630 | struct hwrm_func_reset_input { | |
1631 | uint16_t req_type; | |
1632 | /* | |
1633 | * This value indicates what type of request this is. The format | |
1634 | * for the rest of the command is determined by this field. | |
1635 | */ | |
1636 | uint16_t cmpl_ring; | |
1637 | /* | |
1638 | * This value indicates the what completion ring the request | |
1639 | * will be optionally completed on. If the value is -1, then no | |
1640 | * CR completion will be generated. Any other value must be a | |
1641 | * valid CR ring_id value for this function. | |
1642 | */ | |
1643 | uint16_t seq_id; | |
1644 | /* This value indicates the command sequence number. */ | |
1645 | uint16_t target_id; | |
1646 | /* | |
1647 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
1648 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
1649 | * - HWRM | |
1650 | */ | |
1651 | uint64_t resp_addr; | |
1652 | /* | |
1653 | * This is the host address where the response will be written | |
1654 | * when the request is complete. This area must be 16B aligned | |
1655 | * and must be cleared to zero before the request is made. | |
1656 | */ | |
1657 | uint32_t enables; | |
1658 | /* This bit must be '1' for the vf_id_valid field to be configured. */ | |
1659 | #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1) | |
1660 | uint16_t vf_id; | |
1661 | /* | |
1662 | * The ID of the VF that this PF is trying to reset. Only the | |
1663 | * parent PF shall be allowed to reset a child VF. A parent PF | |
1664 | * driver shall use this field only when a specific child VF is | |
1665 | * requested to be reset. | |
1666 | */ | |
1667 | uint8_t func_reset_level; | |
1668 | /* This value indicates the level of a function reset. */ | |
1669 | /* | |
1670 | * Reset the caller function and its children | |
1671 | * VFs (if any). If no children functions exist, | |
1672 | * then reset the caller function only. | |
1673 | */ | |
1674 | #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0) | |
1675 | /* Reset the caller function only */ | |
1676 | #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1) | |
1677 | /* | |
1678 | * Reset all children VFs of the caller function | |
1679 | * driver if the caller is a PF driver. It is an | |
1680 | * error to specify this level by a VF driver. | |
1681 | * It is an error to specify this level by a PF | |
1682 | * driver with no children VFs. | |
1683 | */ | |
1684 | #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN UINT32_C(0x2) | |
1685 | /* | |
1686 | * Reset a specific VF of the caller function | |
1687 | * driver if the caller is the parent PF driver. | |
1688 | * It is an error to specify this level by a VF | |
1689 | * driver. It is an error to specify this level | |
1690 | * by a PF driver that is not the parent of the | |
1691 | * VF that is being requested to reset. | |
1692 | */ | |
1693 | #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3) | |
1694 | uint8_t unused_0; | |
1695 | } __attribute__((packed)); | |
1696 | ||
1697 | /* Output (16 bytes) */ | |
1698 | struct hwrm_func_reset_output { | |
1699 | uint16_t error_code; | |
1700 | /* | |
1701 | * Pass/Fail or error type Note: receiver to verify the in | |
1702 | * parameters, and fail the call with an error when appropriate | |
1703 | */ | |
1704 | uint16_t req_type; | |
1705 | /* This field returns the type of original request. */ | |
1706 | uint16_t seq_id; | |
1707 | /* This field provides original sequence number of the command. */ | |
1708 | uint16_t resp_len; | |
1709 | /* | |
1710 | * This field is the length of the response in bytes. The last | |
1711 | * byte of the response is a valid flag that will read as '1' | |
1712 | * when the command has been completely written to memory. | |
1713 | */ | |
1714 | uint32_t unused_0; | |
1715 | uint8_t unused_1; | |
1716 | uint8_t unused_2; | |
1717 | uint8_t unused_3; | |
1718 | uint8_t valid; | |
1719 | /* | |
1720 | * This field is used in Output records to indicate that the | |
1721 | * output is completely written to RAM. This field should be | |
1722 | * read as '1' to indicate that the output has been completely | |
1723 | * written. When writing a command completion or response to an | |
1724 | * internal processor, the order of writes has to be such that | |
1725 | * this field is written last. | |
1726 | */ | |
1727 | } __attribute__((packed)); | |
1728 | ||
1729 | /* hwrm_func_qcaps */ | |
1730 | /* | |
1731 | * Description: This command returns capabilities of a function. The input FID | |
1732 | * value is used to indicate what function is being queried. This allows a | |
1733 | * physical function driver to query virtual functions that are children of the | |
1734 | * physical function. The output FID value is needed to configure Rings and | |
1735 | * MSI-X vectors so their DMA operations appear correctly on the PCI bus. | |
1736 | */ | |
1737 | /* Input (24 bytes) */ | |
1738 | struct hwrm_func_qcaps_input { | |
1739 | uint16_t req_type; | |
1740 | /* | |
1741 | * This value indicates what type of request this is. The format | |
1742 | * for the rest of the command is determined by this field. | |
1743 | */ | |
1744 | uint16_t cmpl_ring; | |
1745 | /* | |
1746 | * This value indicates the what completion ring the request | |
1747 | * will be optionally completed on. If the value is -1, then no | |
1748 | * CR completion will be generated. Any other value must be a | |
1749 | * valid CR ring_id value for this function. | |
1750 | */ | |
1751 | uint16_t seq_id; | |
1752 | /* This value indicates the command sequence number. */ | |
1753 | uint16_t target_id; | |
1754 | /* | |
1755 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
1756 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
1757 | * - HWRM | |
1758 | */ | |
1759 | uint64_t resp_addr; | |
1760 | /* | |
1761 | * This is the host address where the response will be written | |
1762 | * when the request is complete. This area must be 16B aligned | |
1763 | * and must be cleared to zero before the request is made. | |
1764 | */ | |
1765 | uint16_t fid; | |
1766 | /* | |
1767 | * Function ID of the function that is being queried. 0xFF... | |
1768 | * (All Fs) if the query is for the requesting function. | |
1769 | */ | |
1770 | uint16_t unused_0[3]; | |
1771 | } __attribute__((packed)); | |
1772 | ||
1773 | /* Output (80 bytes) */ | |
1774 | struct hwrm_func_qcaps_output { | |
1775 | uint16_t error_code; | |
1776 | /* | |
1777 | * Pass/Fail or error type Note: receiver to verify the in | |
1778 | * parameters, and fail the call with an error when appropriate | |
1779 | */ | |
1780 | uint16_t req_type; | |
1781 | /* This field returns the type of original request. */ | |
1782 | uint16_t seq_id; | |
1783 | /* This field provides original sequence number of the command. */ | |
1784 | uint16_t resp_len; | |
1785 | /* | |
1786 | * This field is the length of the response in bytes. The last | |
1787 | * byte of the response is a valid flag that will read as '1' | |
1788 | * when the command has been completely written to memory. | |
1789 | */ | |
1790 | uint16_t fid; | |
1791 | /* | |
1792 | * FID value. This value is used to identify operations on the | |
1793 | * PCI bus as belonging to a particular PCI function. | |
1794 | */ | |
1795 | uint16_t port_id; | |
1796 | /* | |
1797 | * Port ID of port that this function is associated with. Valid | |
1798 | * only for the PF. 0xFF... (All Fs) if this function is not | |
1799 | * associated with any port. 0xFF... (All Fs) if this function | |
1800 | * is called from a VF. | |
1801 | */ | |
1802 | uint32_t flags; | |
1803 | /* If 1, then Push mode is supported on this function. */ | |
1804 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1) | |
1805 | /* | |
1806 | * If 1, then the global MSI-X auto-masking is enabled for the | |
1807 | * device. | |
1808 | */ | |
1809 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2) | |
1810 | /* | |
1811 | * If 1, then the Precision Time Protocol (PTP) processing is | |
1812 | * supported on this function. The HWRM should enable PTP on | |
1813 | * only a single Physical Function (PF) per port. | |
1814 | */ | |
1815 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4) | |
1816 | /* | |
1817 | * If 1, then RDMA over Converged Ethernet (RoCE) v1 is | |
1818 | * supported on this function. | |
1819 | */ | |
1820 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8) | |
1821 | /* | |
1822 | * If 1, then RDMA over Converged Ethernet (RoCE) v2 is | |
1823 | * supported on this function. | |
1824 | */ | |
1825 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10) | |
1826 | /* | |
1827 | * If 1, then control and configuration of WoL magic packet are | |
1828 | * supported on this function. | |
1829 | */ | |
1830 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20) | |
1831 | /* | |
1832 | * If 1, then control and configuration of bitmap pattern packet | |
1833 | * are supported on this function. | |
1834 | */ | |
1835 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40) | |
1836 | /* | |
1837 | * If set to 1, then the control and configuration of rate limit | |
1838 | * of an allocated TX ring on the queried function is supported. | |
1839 | */ | |
1840 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80) | |
1841 | /* | |
1842 | * If 1, then control and configuration of minimum and maximum | |
1843 | * bandwidths are supported on the queried function. | |
1844 | */ | |
1845 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100) | |
1846 | /* | |
1847 | * If the query is for a VF, then this flag shall be ignored. If | |
1848 | * this query is for a PF and this flag is set to 1, then the PF | |
1849 | * has the capability to set the rate limits on the TX rings of | |
1850 | * its children VFs. If this query is for a PF and this flag is | |
1851 | * set to 0, then the PF does not have the capability to set the | |
1852 | * rate limits on the TX rings of its children VFs. | |
1853 | */ | |
1854 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED UINT32_C(0x200) | |
1855 | /* | |
1856 | * If the query is for a VF, then this flag shall be ignored. If | |
1857 | * this query is for a PF and this flag is set to 1, then the PF | |
1858 | * has the capability to set the minimum and/or maximum | |
1859 | * bandwidths for its children VFs. If this query is for a PF | |
1860 | * and this flag is set to 0, then the PF does not have the | |
1861 | * capability to set the minimum or maximum bandwidths for its | |
1862 | * children VFs. | |
1863 | */ | |
1864 | #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400) | |
1865 | uint8_t mac_address[6]; | |
1866 | /* | |
1867 | * This value is current MAC address configured for this | |
1868 | * function. A value of 00-00-00-00-00-00 indicates no MAC | |
1869 | * address is currently configured. | |
1870 | */ | |
1871 | uint16_t max_rsscos_ctx; | |
1872 | /* | |
1873 | * The maximum number of RSS/COS contexts that can be allocated | |
1874 | * to the function. | |
1875 | */ | |
1876 | uint16_t max_cmpl_rings; | |
1877 | /* | |
1878 | * The maximum number of completion rings that can be allocated | |
1879 | * to the function. | |
1880 | */ | |
1881 | uint16_t max_tx_rings; | |
1882 | /* | |
1883 | * The maximum number of transmit rings that can be allocated to | |
1884 | * the function. | |
1885 | */ | |
1886 | uint16_t max_rx_rings; | |
1887 | /* | |
1888 | * The maximum number of receive rings that can be allocated to | |
1889 | * the function. | |
1890 | */ | |
1891 | uint16_t max_l2_ctxs; | |
1892 | /* | |
1893 | * The maximum number of L2 contexts that can be allocated to | |
1894 | * the function. | |
1895 | */ | |
1896 | uint16_t max_vnics; | |
1897 | /* | |
1898 | * The maximum number of VNICs that can be allocated to the | |
1899 | * function. | |
1900 | */ | |
1901 | uint16_t first_vf_id; | |
1902 | /* | |
1903 | * The identifier for the first VF enabled on a PF. This is | |
1904 | * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if | |
1905 | * this command is called on a PF with SR-IOV disabled or on a | |
1906 | * VF. | |
1907 | */ | |
1908 | uint16_t max_vfs; | |
1909 | /* | |
1910 | * The maximum number of VFs that can be allocated to the | |
1911 | * function. This is valid only on the PF with SR-IOV enabled. | |
1912 | * 0xFF... (All Fs) if this command is called on a PF with SR- | |
1913 | * IOV disabled or on a VF. | |
1914 | */ | |
1915 | uint16_t max_stat_ctx; | |
1916 | /* | |
1917 | * The maximum number of statistic contexts that can be | |
1918 | * allocated to the function. | |
1919 | */ | |
1920 | uint32_t max_encap_records; | |
1921 | /* | |
1922 | * The maximum number of Encapsulation records that can be | |
1923 | * offloaded by this function. | |
1924 | */ | |
1925 | uint32_t max_decap_records; | |
1926 | /* | |
1927 | * The maximum number of decapsulation records that can be | |
1928 | * offloaded by this function. | |
1929 | */ | |
1930 | uint32_t max_tx_em_flows; | |
1931 | /* | |
1932 | * The maximum number of Exact Match (EM) flows that can be | |
1933 | * offloaded by this function on the TX side. | |
1934 | */ | |
1935 | uint32_t max_tx_wm_flows; | |
1936 | /* | |
1937 | * The maximum number of Wildcard Match (WM) flows that can be | |
1938 | * offloaded by this function on the TX side. | |
1939 | */ | |
1940 | uint32_t max_rx_em_flows; | |
1941 | /* | |
1942 | * The maximum number of Exact Match (EM) flows that can be | |
1943 | * offloaded by this function on the RX side. | |
1944 | */ | |
1945 | uint32_t max_rx_wm_flows; | |
1946 | /* | |
1947 | * The maximum number of Wildcard Match (WM) flows that can be | |
1948 | * offloaded by this function on the RX side. | |
1949 | */ | |
1950 | uint32_t max_mcast_filters; | |
1951 | /* | |
1952 | * The maximum number of multicast filters that can be supported | |
1953 | * by this function on the RX side. | |
1954 | */ | |
1955 | uint32_t max_flow_id; | |
1956 | /* | |
1957 | * The maximum value of flow_id that can be supported in | |
1958 | * completion records. | |
1959 | */ | |
1960 | uint32_t max_hw_ring_grps; | |
1961 | /* | |
1962 | * The maximum number of HW ring groups that can be supported on | |
1963 | * this function. | |
1964 | */ | |
1965 | uint16_t max_sp_tx_rings; | |
1966 | /* | |
1967 | * The maximum number of strict priority transmit rings that can | |
1968 | * be allocated to the function. This number indicates the | |
1969 | * maximum number of TX rings that can be assigned strict | |
1970 | * priorities out of the maximum number of TX rings that can be | |
1971 | * allocated (max_tx_rings) to the function. | |
1972 | */ | |
1973 | uint8_t unused_0; | |
1974 | uint8_t valid; | |
1975 | /* | |
1976 | * This field is used in Output records to indicate that the | |
1977 | * output is completely written to RAM. This field should be | |
1978 | * read as '1' to indicate that the output has been completely | |
1979 | * written. When writing a command completion or response to an | |
1980 | * internal processor, the order of writes has to be such that | |
1981 | * this field is written last. | |
1982 | */ | |
1983 | } __attribute__((packed)); | |
1984 | ||
1985 | /* hwrm_func_qcfg */ | |
1986 | /* | |
1987 | * Description: This command returns the current configuration of a function. | |
1988 | * The input FID value is used to indicate what function is being queried. This | |
1989 | * allows a physical function driver to query virtual functions that are | |
1990 | * children of the physical function. The output FID value is needed to | |
1991 | * configure Rings and MSI-X vectors so their DMA operations appear correctly on | |
1992 | * the PCI bus. | |
1993 | */ | |
1994 | /* Input (24 bytes) */ | |
1995 | struct hwrm_func_qcfg_input { | |
1996 | uint16_t req_type; | |
1997 | /* | |
1998 | * This value indicates what type of request this is. The format | |
1999 | * for the rest of the command is determined by this field. | |
2000 | */ | |
2001 | uint16_t cmpl_ring; | |
2002 | /* | |
2003 | * This value indicates the what completion ring the request | |
2004 | * will be optionally completed on. If the value is -1, then no | |
2005 | * CR completion will be generated. Any other value must be a | |
2006 | * valid CR ring_id value for this function. | |
2007 | */ | |
2008 | uint16_t seq_id; | |
2009 | /* This value indicates the command sequence number. */ | |
2010 | uint16_t target_id; | |
2011 | /* | |
2012 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
2013 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
2014 | * - HWRM | |
2015 | */ | |
2016 | uint64_t resp_addr; | |
2017 | /* | |
2018 | * This is the host address where the response will be written | |
2019 | * when the request is complete. This area must be 16B aligned | |
2020 | * and must be cleared to zero before the request is made. | |
2021 | */ | |
2022 | uint16_t fid; | |
2023 | /* | |
2024 | * Function ID of the function that is being queried. 0xFF... | |
2025 | * (All Fs) if the query is for the requesting function. | |
2026 | */ | |
2027 | uint16_t unused_0[3]; | |
2028 | } __attribute__((packed)); | |
2029 | ||
2030 | /* Output (72 bytes) */ | |
2031 | struct hwrm_func_qcfg_output { | |
2032 | uint16_t error_code; | |
2033 | /* | |
2034 | * Pass/Fail or error type Note: receiver to verify the in | |
2035 | * parameters, and fail the call with an error when appropriate | |
2036 | */ | |
2037 | uint16_t req_type; | |
2038 | /* This field returns the type of original request. */ | |
2039 | uint16_t seq_id; | |
2040 | /* This field provides original sequence number of the command. */ | |
2041 | uint16_t resp_len; | |
2042 | /* | |
2043 | * This field is the length of the response in bytes. The last | |
2044 | * byte of the response is a valid flag that will read as '1' | |
2045 | * when the command has been completely written to memory. | |
2046 | */ | |
2047 | uint16_t fid; | |
2048 | /* | |
2049 | * FID value. This value is used to identify operations on the | |
2050 | * PCI bus as belonging to a particular PCI function. | |
2051 | */ | |
2052 | uint16_t port_id; | |
2053 | /* | |
2054 | * Port ID of port that this function is associated with. | |
2055 | * 0xFF... (All Fs) if this function is not associated with any | |
2056 | * port. | |
2057 | */ | |
2058 | uint16_t vlan; | |
2059 | /* | |
2060 | * This value is the current VLAN setting for this function. The | |
2061 | * value of 0 for this field indicates no priority tagging or | |
2062 | * VLAN is used. This field's format is same as 802.1Q Tag's Tag | |
2063 | * Control Information (TCI) format that includes both Priority | |
2064 | * Code Point (PCP) and VLAN Identifier (VID). | |
2065 | */ | |
2066 | uint16_t flags; | |
2067 | /* | |
2068 | * If 1, then magic packet based Out-Of-Box WoL is enabled on | |
2069 | * the port associated with this function. | |
2070 | */ | |
2071 | #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \ | |
2072 | UINT32_C(0x1) | |
2073 | /* | |
2074 | * If 1, then bitmap pattern based Out-Of-Box WoL packet is | |
2075 | * enabled on the port associated with this function. | |
2076 | */ | |
2077 | #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2) | |
2078 | /* | |
2079 | * If set to 1, then FW based DCBX agent is enabled and running | |
2080 | * on the port associated with this function. If set to 0, then | |
2081 | * DCBX agent is not running in the firmware. | |
2082 | */ | |
2083 | #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \ | |
2084 | UINT32_C(0x4) | |
2085 | uint8_t mac_address[6]; | |
2086 | /* | |
2087 | * This value is current MAC address configured for this | |
2088 | * function. A value of 00-00-00-00-00-00 indicates no MAC | |
2089 | * address is currently configured. | |
2090 | */ | |
2091 | uint16_t pci_id; | |
2092 | /* | |
2093 | * This value is current PCI ID of this function. If ARI is | |
2094 | * enabled, then it is Bus Number (8b):Function Number(8b). | |
2095 | * Otherwise, it is Bus Number (8b):Device Number (4b):Function | |
2096 | * Number(4b). | |
2097 | */ | |
2098 | uint16_t alloc_rsscos_ctx; | |
2099 | /* | |
2100 | * The number of RSS/COS contexts currently allocated to the | |
2101 | * function. | |
2102 | */ | |
2103 | uint16_t alloc_cmpl_rings; | |
2104 | /* | |
2105 | * The number of completion rings currently allocated to the | |
2106 | * function. This does not include the rings allocated to any | |
2107 | * children functions if any. | |
2108 | */ | |
2109 | uint16_t alloc_tx_rings; | |
2110 | /* | |
2111 | * The number of transmit rings currently allocated to the | |
2112 | * function. This does not include the rings allocated to any | |
2113 | * children functions if any. | |
2114 | */ | |
2115 | uint16_t alloc_rx_rings; | |
2116 | /* | |
2117 | * The number of receive rings currently allocated to the | |
2118 | * function. This does not include the rings allocated to any | |
2119 | * children functions if any. | |
2120 | */ | |
2121 | uint16_t alloc_l2_ctx; | |
2122 | /* The allocated number of L2 contexts to the function. */ | |
2123 | uint16_t alloc_vnics; | |
2124 | /* The allocated number of vnics to the function. */ | |
2125 | uint16_t mtu; | |
2126 | /* | |
2127 | * The maximum transmission unit of the function. For rings | |
2128 | * allocated on this function, this default value is used if | |
2129 | * ring MTU is not specified. | |
2130 | */ | |
2131 | uint16_t mru; | |
2132 | /* | |
2133 | * The maximum receive unit of the function. For vnics allocated | |
2134 | * on this function, this default value is used if vnic MRU is | |
2135 | * not specified. | |
2136 | */ | |
2137 | uint16_t stat_ctx_id; | |
2138 | /* The statistics context assigned to a function. */ | |
2139 | uint8_t port_partition_type; | |
2140 | /* | |
2141 | * The HWRM shall return Unknown value for this field when this | |
2142 | * command is used to query VF's configuration. | |
2143 | */ | |
2144 | /* Single physical function */ | |
2145 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0) | |
2146 | /* Multiple physical functions */ | |
2147 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1) | |
2148 | /* Network Partitioning 1.0 */ | |
2149 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \ | |
2150 | UINT32_C(0x2) | |
2151 | /* Network Partitioning 1.5 */ | |
2152 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \ | |
2153 | UINT32_C(0x3) | |
2154 | /* Network Partitioning 2.0 */ | |
2155 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \ | |
2156 | UINT32_C(0x4) | |
2157 | /* Unknown */ | |
2158 | #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \ | |
2159 | UINT32_C(0xff) | |
2160 | uint8_t unused_0; | |
2161 | uint16_t dflt_vnic_id; | |
2162 | /* The default VNIC ID assigned to a function that is being queried. */ | |
2163 | uint8_t unused_1; | |
2164 | uint8_t unused_2; | |
2165 | uint32_t min_bw; | |
2166 | /* | |
2167 | * Minimum BW allocated for this function. The HWRM will | |
2168 | * translate this value into byte counter and time interval used | |
2169 | * for the scheduler inside the device. A value of 0 indicates | |
2170 | * the minimum bandwidth is not configured. | |
2171 | */ | |
2172 | /* Bandwidth value */ | |
2173 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK \ | |
2174 | UINT32_C(0xfffffff) | |
2175 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0 | |
2176 | /* Reserved */ | |
2177 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_RSVD UINT32_C(0x10000000) | |
2178 | /* bw_value_unit is 3 b */ | |
2179 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \ | |
2180 | UINT32_C(0xe0000000) | |
2181 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29 | |
2182 | /* Value is in Mbps */ | |
2183 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MBPS \ | |
2184 | (UINT32_C(0x0) << 29) | |
2185 | /* Value is in 1/100th of a percentage of total bandwidth. */ | |
2186 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \ | |
2187 | (UINT32_C(0x1) << 29) | |
2188 | /* Invalid unit */ | |
2189 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \ | |
2190 | (UINT32_C(0x7) << 29) | |
2191 | #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \ | |
2192 | FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID | |
2193 | uint32_t max_bw; | |
2194 | /* | |
2195 | * Maximum BW allocated for this function. The HWRM will | |
2196 | * translate this value into byte counter and time interval used | |
2197 | * for the scheduler inside the device. A value of 0 indicates | |
2198 | * that the maximum bandwidth is not configured. | |
2199 | */ | |
2200 | /* Bandwidth value */ | |
2201 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK \ | |
2202 | UINT32_C(0xfffffff) | |
2203 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0 | |
2204 | /* Reserved */ | |
2205 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_RSVD UINT32_C(0x10000000) | |
2206 | /* bw_value_unit is 3 b */ | |
2207 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \ | |
2208 | UINT32_C(0xe0000000) | |
2209 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29 | |
2210 | /* Value is in Mbps */ | |
2211 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MBPS \ | |
2212 | (UINT32_C(0x0) << 29) | |
2213 | /* Value is in 1/100th of a percentage of total bandwidth. */ | |
2214 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \ | |
2215 | (UINT32_C(0x1) << 29) | |
2216 | /* Invalid unit */ | |
2217 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \ | |
2218 | (UINT32_C(0x7) << 29) | |
2219 | #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \ | |
2220 | FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID | |
2221 | uint8_t evb_mode; | |
2222 | /* | |
2223 | * This value indicates the Edge virtual bridge mode for the | |
2224 | * domain that this function belongs to. | |
2225 | */ | |
2226 | /* No Edge Virtual Bridging (EVB) */ | |
2227 | #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0) | |
2228 | /* Virtual Ethernet Bridge (VEB) */ | |
2229 | #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1) | |
2230 | /* Virtual Ethernet Port Aggregator (VEPA) */ | |
2231 | #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2) | |
2232 | uint8_t unused_3; | |
2233 | uint16_t alloc_vfs; | |
2234 | /* | |
2235 | * The number of VFs that are allocated to the function. This is | |
2236 | * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if | |
2237 | * this command is called on a PF with SR-IOV disabled or on a | |
2238 | * VF. | |
2239 | */ | |
2240 | uint32_t alloc_mcast_filters; | |
2241 | /* | |
2242 | * The number of allocated multicast filters for this function | |
2243 | * on the RX side. | |
2244 | */ | |
2245 | uint32_t alloc_hw_ring_grps; | |
2246 | /* The number of allocated HW ring groups for this function. */ | |
2247 | uint16_t alloc_sp_tx_rings; | |
2248 | /* | |
2249 | * The number of strict priority transmit rings out of currently | |
2250 | * allocated TX rings to the function (alloc_tx_rings). | |
2251 | */ | |
2252 | uint8_t unused_4; | |
2253 | uint8_t valid; | |
2254 | /* | |
2255 | * This field is used in Output records to indicate that the | |
2256 | * output is completely written to RAM. This field should be | |
2257 | * read as '1' to indicate that the output has been completely | |
2258 | * written. When writing a command completion or response to an | |
2259 | * internal processor, the order of writes has to be such that | |
2260 | * this field is written last. | |
2261 | */ | |
2262 | } __attribute__((packed)); | |
2263 | ||
2264 | /* hwrm_func_drv_rgtr */ | |
2265 | /* | |
2266 | * Description: This command is used by the function driver to register its | |
2267 | * information with the HWRM. A function driver shall implement this command. A | |
2268 | * function driver shall use this command during the driver initialization right | |
2269 | * after the HWRM version discovery and default ring resources allocation. | |
2270 | */ | |
2271 | /* Input (80 bytes) */ | |
2272 | struct hwrm_func_drv_rgtr_input { | |
2273 | uint16_t req_type; | |
2274 | /* | |
2275 | * This value indicates what type of request this is. The format | |
2276 | * for the rest of the command is determined by this field. | |
2277 | */ | |
2278 | uint16_t cmpl_ring; | |
2279 | /* | |
2280 | * This value indicates the what completion ring the request | |
2281 | * will be optionally completed on. If the value is -1, then no | |
2282 | * CR completion will be generated. Any other value must be a | |
2283 | * valid CR ring_id value for this function. | |
2284 | */ | |
2285 | uint16_t seq_id; | |
2286 | /* This value indicates the command sequence number. */ | |
2287 | uint16_t target_id; | |
2288 | /* | |
2289 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
2290 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
2291 | * - HWRM | |
2292 | */ | |
2293 | uint64_t resp_addr; | |
2294 | /* | |
2295 | * This is the host address where the response will be written | |
2296 | * when the request is complete. This area must be 16B aligned | |
2297 | * and must be cleared to zero before the request is made. | |
2298 | */ | |
2299 | uint32_t flags; | |
2300 | /* | |
2301 | * When this bit is '1', the function driver is requesting all | |
2302 | * requests from its children VF drivers to be forwarded to | |
2303 | * itself. This flag can only be set by the PF driver. If a VF | |
2304 | * driver sets this flag, it should be ignored by the HWRM. | |
2305 | */ | |
2306 | #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1) | |
2307 | /* | |
2308 | * When this bit is '1', the function is requesting none of the | |
2309 | * requests from its children VF drivers to be forwarded to | |
2310 | * itself. This flag can only be set by the PF driver. If a VF | |
2311 | * driver sets this flag, it should be ignored by the HWRM. | |
2312 | */ | |
2313 | #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2) | |
2314 | uint32_t enables; | |
2315 | /* This bit must be '1' for the os_type field to be configured. */ | |
2316 | #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1) | |
2317 | /* This bit must be '1' for the ver field to be configured. */ | |
2318 | #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2) | |
2319 | /* This bit must be '1' for the timestamp field to be configured. */ | |
2320 | #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4) | |
2321 | /* This bit must be '1' for the vf_req_fwd field to be configured. */ | |
2322 | #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8) | |
2323 | /* | |
2324 | * This bit must be '1' for the async_event_fwd field to be | |
2325 | * configured. | |
2326 | */ | |
2327 | #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10) | |
2328 | uint16_t os_type; | |
2329 | /* This value indicates the type of OS. */ | |
2330 | /* Unknown */ | |
2331 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0) | |
2332 | /* Other OS not listed below. */ | |
2333 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1) | |
2334 | /* MSDOS OS. */ | |
2335 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe) | |
2336 | /* Windows OS. */ | |
2337 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12) | |
2338 | /* Solaris OS. */ | |
2339 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d) | |
2340 | /* Linux OS. */ | |
2341 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24) | |
2342 | /* FreeBSD OS. */ | |
2343 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a) | |
2344 | /* VMware ESXi OS. */ | |
2345 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68) | |
2346 | /* Microsoft Windows 8 64-bit OS. */ | |
2347 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73) | |
2348 | /* Microsoft Windows Server 2012 R2 OS. */ | |
2349 | #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74) | |
2350 | uint8_t ver_maj; | |
2351 | /* This is the major version of the driver. */ | |
2352 | uint8_t ver_min; | |
2353 | /* This is the minor version of the driver. */ | |
2354 | uint8_t ver_upd; | |
2355 | /* This is the update version of the driver. */ | |
2356 | uint8_t unused_0; | |
2357 | uint16_t unused_1; | |
2358 | uint32_t timestamp; | |
2359 | /* | |
2360 | * This is a 32-bit timestamp provided by the driver for keep | |
2361 | * alive. The timestamp is in multiples of 1ms. | |
2362 | */ | |
2363 | uint32_t unused_2; | |
2364 | uint32_t vf_req_fwd[8]; | |
2365 | /* | |
2366 | * This is a 256-bit bit mask provided by the PF driver for | |
2367 | * letting the HWRM know what commands issued by the VF driver | |
2368 | * to the HWRM should be forwarded to the PF driver. Nth bit | |
2369 | * refers to the Nth req_type. Setting Nth bit to 1 indicates | |
2370 | * that requests from the VF driver with req_type equal to N | |
2371 | * shall be forwarded to the parent PF driver. This field is not | |
2372 | * valid for the VF driver. | |
2373 | */ | |
2374 | uint32_t async_event_fwd[8]; | |
2375 | /* | |
2376 | * This is a 256-bit bit mask provided by the function driver | |
2377 | * (PF or VF driver) to indicate the list of asynchronous event | |
2378 | * completions to be forwarded. Nth bit refers to the Nth | |
2379 | * event_id. Setting Nth bit to 1 by the function driver shall | |
2380 | * result in the HWRM forwarding asynchronous event completion | |
2381 | * with event_id equal to N. If all bits are set to 0 (value of | |
2382 | * 0), then the HWRM shall not forward any asynchronous event | |
2383 | * completion to this function driver. | |
2384 | */ | |
2385 | } __attribute__((packed)); | |
2386 | ||
2387 | /* Output (16 bytes) */ | |
2388 | struct hwrm_func_drv_rgtr_output { | |
2389 | uint16_t error_code; | |
2390 | /* | |
2391 | * Pass/Fail or error type Note: receiver to verify the in | |
2392 | * parameters, and fail the call with an error when appropriate | |
2393 | */ | |
2394 | uint16_t req_type; | |
2395 | /* This field returns the type of original request. */ | |
2396 | uint16_t seq_id; | |
2397 | /* This field provides original sequence number of the command. */ | |
2398 | uint16_t resp_len; | |
2399 | /* | |
2400 | * This field is the length of the response in bytes. The last | |
2401 | * byte of the response is a valid flag that will read as '1' | |
2402 | * when the command has been completely written to memory. | |
2403 | */ | |
2404 | uint32_t unused_0; | |
2405 | uint8_t unused_1; | |
2406 | uint8_t unused_2; | |
2407 | uint8_t unused_3; | |
2408 | uint8_t valid; | |
2409 | /* | |
2410 | * This field is used in Output records to indicate that the | |
2411 | * output is completely written to RAM. This field should be | |
2412 | * read as '1' to indicate that the output has been completely | |
2413 | * written. When writing a command completion or response to an | |
2414 | * internal processor, the order of writes has to be such that | |
2415 | * this field is written last. | |
2416 | */ | |
2417 | } __attribute__((packed)); | |
2418 | ||
2419 | /* hwrm_func_drv_unrgtr */ | |
2420 | /* | |
2421 | * Description: This command is used by the function driver to un register with | |
2422 | * the HWRM. A function driver shall implement this command. A function driver | |
2423 | * shall use this command during the driver unloading. | |
2424 | */ | |
2425 | /* Input (24 bytes) */ | |
2426 | struct hwrm_func_drv_unrgtr_input { | |
2427 | uint16_t req_type; | |
2428 | /* | |
2429 | * This value indicates what type of request this is. The format | |
2430 | * for the rest of the command is determined by this field. | |
2431 | */ | |
2432 | uint16_t cmpl_ring; | |
2433 | /* | |
2434 | * This value indicates the what completion ring the request | |
2435 | * will be optionally completed on. If the value is -1, then no | |
2436 | * CR completion will be generated. Any other value must be a | |
2437 | * valid CR ring_id value for this function. | |
2438 | */ | |
2439 | uint16_t seq_id; | |
2440 | /* This value indicates the command sequence number. */ | |
2441 | uint16_t target_id; | |
2442 | /* | |
2443 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
2444 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
2445 | * - HWRM | |
2446 | */ | |
2447 | uint64_t resp_addr; | |
2448 | /* | |
2449 | * This is the host address where the response will be written | |
2450 | * when the request is complete. This area must be 16B aligned | |
2451 | * and must be cleared to zero before the request is made. | |
2452 | */ | |
2453 | uint32_t flags; | |
2454 | /* | |
2455 | * When this bit is '1', the function driver is notifying the | |
2456 | * HWRM to prepare for the shutdown. | |
2457 | */ | |
2458 | #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN UINT32_C(0x1) | |
2459 | uint32_t unused_0; | |
2460 | } __attribute__((packed)); | |
2461 | ||
2462 | /* Output (16 bytes) */ | |
2463 | struct hwrm_func_drv_unrgtr_output { | |
2464 | uint16_t error_code; | |
2465 | /* | |
2466 | * Pass/Fail or error type Note: receiver to verify the in | |
2467 | * parameters, and fail the call with an error when appropriate | |
2468 | */ | |
2469 | uint16_t req_type; | |
2470 | /* This field returns the type of original request. */ | |
2471 | uint16_t seq_id; | |
2472 | /* This field provides original sequence number of the command. */ | |
2473 | uint16_t resp_len; | |
2474 | /* | |
2475 | * This field is the length of the response in bytes. The last | |
2476 | * byte of the response is a valid flag that will read as '1' | |
2477 | * when the command has been completely written to memory. | |
2478 | */ | |
2479 | uint32_t unused_0; | |
2480 | uint8_t unused_1; | |
2481 | uint8_t unused_2; | |
2482 | uint8_t unused_3; | |
2483 | uint8_t valid; | |
2484 | /* | |
2485 | * This field is used in Output records to indicate that the | |
2486 | * output is completely written to RAM. This field should be | |
2487 | * read as '1' to indicate that the output has been completely | |
2488 | * written. When writing a command completion or response to an | |
2489 | * internal processor, the order of writes has to be such that | |
2490 | * this field is written last. | |
2491 | */ | |
2492 | } __attribute__((packed)); | |
2493 | ||
2494 | /* hwrm_port_phy_cfg */ | |
2495 | /* | |
2496 | * Description: This command configures the PHY device for the port. It allows | |
2497 | * setting of the most generic settings for the PHY. The HWRM shall complete | |
2498 | * this command as soon as PHY settings are configured. They may not be applied | |
2499 | * when the command response is provided. A VF driver shall not be allowed to | |
2500 | * configure PHY using this command. In a network partition mode, a PF driver | |
2501 | * shall not be allowed to configure PHY using this command. | |
2502 | */ | |
2503 | /* Input (56 bytes) */ | |
2504 | struct hwrm_port_phy_cfg_input { | |
2505 | uint16_t req_type; | |
2506 | /* | |
2507 | * This value indicates what type of request this is. The format | |
2508 | * for the rest of the command is determined by this field. | |
2509 | */ | |
2510 | uint16_t cmpl_ring; | |
2511 | /* | |
2512 | * This value indicates the what completion ring the request | |
2513 | * will be optionally completed on. If the value is -1, then no | |
2514 | * CR completion will be generated. Any other value must be a | |
2515 | * valid CR ring_id value for this function. | |
2516 | */ | |
2517 | uint16_t seq_id; | |
2518 | /* This value indicates the command sequence number. */ | |
2519 | uint16_t target_id; | |
2520 | /* | |
2521 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
2522 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
2523 | * - HWRM | |
2524 | */ | |
2525 | uint64_t resp_addr; | |
2526 | /* | |
2527 | * This is the host address where the response will be written | |
2528 | * when the request is complete. This area must be 16B aligned | |
2529 | * and must be cleared to zero before the request is made. | |
2530 | */ | |
2531 | uint32_t flags; | |
2532 | /* | |
2533 | * When this bit is set to '1', the PHY for the port shall be | |
2534 | * reset. # If this bit is set to 1, then the HWRM shall reset | |
2535 | * the PHY after applying PHY configuration changes specified in | |
2536 | * this command. # In order to guarantee that PHY configuration | |
2537 | * changes specified in this command take effect, the HWRM | |
2538 | * client should set this flag to 1. # If this bit is not set to | |
2539 | * 1, then the HWRM may reset the PHY depending on the current | |
2540 | * PHY configuration and settings specified in this command. | |
2541 | */ | |
2542 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1) | |
2543 | /* | |
2544 | * When this bit is set to '1', the link shall be forced to be | |
2545 | * taken down. # When this bit is set to '1", all other command | |
2546 | * input settings related to the link speed shall be ignored. | |
2547 | * Once the link state is forced down, it can be explicitly | |
2548 | * cleared from that state by setting this flag to '0'. # If | |
2549 | * this flag is set to '0', then the link shall be cleared from | |
2550 | * forced down state if the link is in forced down state. There | |
2551 | * may be conditions (e.g. out-of-band or sideband configuration | |
2552 | * changes for the link) outside the scope of the HWRM | |
2553 | * implementation that may clear forced down link state. | |
2554 | */ | |
2555 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2) | |
2556 | /* | |
2557 | * When this bit is set to '1', the link shall be forced to the | |
2558 | * force_link_speed value. When this bit is set to '1', the HWRM | |
2559 | * client should not enable any of the auto negotiation related | |
2560 | * fields represented by auto_XXX fields in this command. When | |
2561 | * this bit is set to '1' and the HWRM client has enabled a | |
2562 | * auto_XXX field in this command, then the HWRM shall ignore | |
2563 | * the enabled auto_XXX field. When this bit is set to zero, the | |
2564 | * link shall be allowed to autoneg. | |
2565 | */ | |
2566 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4) | |
2567 | /* | |
2568 | * When this bit is set to '1', the auto-negotiation process | |
2569 | * shall be restarted on the link. | |
2570 | */ | |
2571 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8) | |
2572 | /* | |
2573 | * When this bit is set to '1', Energy Efficient Ethernet (EEE) | |
2574 | * is requested to be enabled on this link. If EEE is not | |
2575 | * supported on this port, then this flag shall be ignored by | |
2576 | * the HWRM. | |
2577 | */ | |
2578 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10) | |
2579 | /* | |
2580 | * When this bit is set to '1', Energy Efficient Ethernet (EEE) | |
2581 | * is requested to be disabled on this link. If EEE is not | |
2582 | * supported on this port, then this flag shall be ignored by | |
2583 | * the HWRM. | |
2584 | */ | |
2585 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20) | |
2586 | /* | |
2587 | * When this bit is set to '1' and EEE is enabled on this link, | |
2588 | * then TX LPI is requested to be enabled on the link. If EEE is | |
2589 | * not supported on this port, then this flag shall be ignored | |
2590 | * by the HWRM. If EEE is disabled on this port, then this flag | |
2591 | * shall be ignored by the HWRM. | |
2592 | */ | |
2593 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40) | |
2594 | /* | |
2595 | * When this bit is set to '1' and EEE is enabled on this link, | |
2596 | * then TX LPI is requested to be disabled on the link. If EEE | |
2597 | * is not supported on this port, then this flag shall be | |
2598 | * ignored by the HWRM. If EEE is disabled on this port, then | |
2599 | * this flag shall be ignored by the HWRM. | |
2600 | */ | |
2601 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80) | |
2602 | /* | |
2603 | * When set to 1, then the HWRM shall enable FEC | |
2604 | * autonegotitation on this port if supported. When set to 0, | |
2605 | * then this flag shall be ignored. If FEC autonegotiation is | |
2606 | * not supported, then the HWRM shall ignore this flag. | |
2607 | */ | |
2608 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100) | |
2609 | /* | |
2610 | * When set to 1, then the HWRM shall disable FEC | |
2611 | * autonegotiation on this port if supported. When set to 0, | |
2612 | * then this flag shall be ignored. If FEC autonegotiation is | |
2613 | * not supported, then the HWRM shall ignore this flag. | |
2614 | */ | |
2615 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE UINT32_C(0x200) | |
2616 | /* | |
2617 | * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire | |
2618 | * Code) on this port if supported. When set to 0, then this | |
2619 | * flag shall be ignored. If FEC CLAUSE 74 is not supported, | |
2620 | * then the HWRM shall ignore this flag. | |
2621 | */ | |
2622 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE UINT32_C(0x400) | |
2623 | /* | |
2624 | * When set to 1, then the HWRM shall disable FEC CLAUSE 74 | |
2625 | * (Fire Code) on this port if supported. When set to 0, then | |
2626 | * this flag shall be ignored. If FEC CLAUSE 74 is not | |
2627 | * supported, then the HWRM shall ignore this flag. | |
2628 | */ | |
2629 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE UINT32_C(0x800) | |
2630 | /* | |
2631 | * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed | |
2632 | * Solomon) on this port if supported. When set to 0, then this | |
2633 | * flag shall be ignored. If FEC CLAUSE 91 is not supported, | |
2634 | * then the HWRM shall ignore this flag. | |
2635 | */ | |
2636 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE UINT32_C(0x1000) | |
2637 | /* | |
2638 | * When set to 1, then the HWRM shall disable FEC CLAUSE 91 | |
2639 | * (Reed Solomon) on this port if supported. When set to 0, then | |
2640 | * this flag shall be ignored. If FEC CLAUSE 91 is not | |
2641 | * supported, then the HWRM shall ignore this flag. | |
2642 | */ | |
2643 | #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE UINT32_C(0x2000) | |
2644 | uint32_t enables; | |
2645 | /* This bit must be '1' for the auto_mode field to be configured. */ | |
2646 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1) | |
2647 | /* This bit must be '1' for the auto_duplex field to be configured. */ | |
2648 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2) | |
2649 | /* This bit must be '1' for the auto_pause field to be configured. */ | |
2650 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4) | |
2651 | /* | |
2652 | * This bit must be '1' for the auto_link_speed field to be | |
2653 | * configured. | |
2654 | */ | |
2655 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8) | |
2656 | /* | |
2657 | * This bit must be '1' for the auto_link_speed_mask field to be | |
2658 | * configured. | |
2659 | */ | |
2660 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK UINT32_C(0x10) | |
2661 | /* This bit must be '1' for the wirespeed field to be configured. */ | |
2662 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20) | |
2663 | /* This bit must be '1' for the lpbk field to be configured. */ | |
2664 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40) | |
2665 | /* This bit must be '1' for the preemphasis field to be configured. */ | |
2666 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80) | |
2667 | /* This bit must be '1' for the force_pause field to be configured. */ | |
2668 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100) | |
2669 | /* | |
2670 | * This bit must be '1' for the eee_link_speed_mask field to be | |
2671 | * configured. | |
2672 | */ | |
2673 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK UINT32_C(0x200) | |
2674 | /* This bit must be '1' for the tx_lpi_timer field to be configured. */ | |
2675 | #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400) | |
2676 | uint16_t port_id; | |
2677 | /* Port ID of port that is to be configured. */ | |
2678 | uint16_t force_link_speed; | |
2679 | /* | |
2680 | * This is the speed that will be used if the force bit is '1'. | |
2681 | * If unsupported speed is selected, an error will be generated. | |
2682 | */ | |
2683 | /* 100Mb link speed */ | |
2684 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1) | |
2685 | /* 1Gb link speed */ | |
2686 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa) | |
2687 | /* 2Gb link speed */ | |
2688 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14) | |
2689 | /* 2.5Gb link speed */ | |
2690 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19) | |
2691 | /* 10Gb link speed */ | |
2692 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64) | |
2693 | /* 20Mb link speed */ | |
2694 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8) | |
2695 | /* 25Gb link speed */ | |
2696 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa) | |
2697 | /* 40Gb link speed */ | |
2698 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190) | |
2699 | /* 50Gb link speed */ | |
2700 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4) | |
2701 | /* 100Gb link speed */ | |
2702 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8) | |
2703 | /* 10Mb link speed */ | |
2704 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff) | |
2705 | uint8_t auto_mode; | |
2706 | /* | |
2707 | * This value is used to identify what autoneg mode is used when | |
2708 | * the link speed is not being forced. | |
2709 | */ | |
2710 | /* | |
2711 | * Disable autoneg or autoneg disabled. No | |
2712 | * speeds are selected. | |
2713 | */ | |
2714 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0) | |
2715 | /* Select all possible speeds for autoneg mode. */ | |
2716 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1) | |
2717 | /* | |
2718 | * Select only the auto_link_speed speed for | |
2719 | * autoneg mode. This mode has been DEPRECATED. | |
2720 | * An HWRM client should not use this mode. | |
2721 | */ | |
2722 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2) | |
2723 | /* | |
2724 | * Select the auto_link_speed or any speed below | |
2725 | * that speed for autoneg. This mode has been | |
2726 | * DEPRECATED. An HWRM client should not use | |
2727 | * this mode. | |
2728 | */ | |
2729 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3) | |
2730 | /* | |
2731 | * Select the speeds based on the corresponding | |
2732 | * link speed mask value that is provided. | |
2733 | */ | |
2734 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4) | |
2735 | uint8_t auto_duplex; | |
2736 | /* | |
2737 | * This is the duplex setting that will be used if the | |
2738 | * autoneg_mode is "one_speed" or "one_or_below". | |
2739 | */ | |
2740 | /* Half Duplex will be requested. */ | |
2741 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0) | |
2742 | /* Full duplex will be requested. */ | |
2743 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1) | |
2744 | /* Both Half and Full dupex will be requested. */ | |
2745 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2) | |
2746 | uint8_t auto_pause; | |
2747 | /* | |
2748 | * This value is used to configure the pause that will be used | |
2749 | * for autonegotiation. Add text on the usage of auto_pause and | |
2750 | * force_pause. | |
2751 | */ | |
2752 | /* | |
2753 | * When this bit is '1', Generation of tx pause messages has | |
2754 | * been requested. Disabled otherwise. | |
2755 | */ | |
2756 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1) | |
2757 | /* | |
2758 | * When this bit is '1', Reception of rx pause messages has been | |
2759 | * requested. Disabled otherwise. | |
2760 | */ | |
2761 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2) | |
2762 | /* | |
2763 | * When set to 1, the advertisement of pause is enabled. # When | |
2764 | * the auto_mode is not set to none and this flag is set to 1, | |
2765 | * then the auto_pause bits on this port are being advertised | |
2766 | * and autoneg pause results are being interpreted. # When the | |
2767 | * auto_mode is not set to none and this flag is set to 0, the | |
2768 | * pause is forced as indicated in force_pause, and also | |
2769 | * advertised as auto_pause bits, but the autoneg results are | |
2770 | * not interpreted since the pause configuration is being | |
2771 | * forced. # When the auto_mode is set to none and this flag is | |
2772 | * set to 1, auto_pause bits should be ignored and should be set | |
2773 | * to 0. | |
2774 | */ | |
2775 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4) | |
2776 | uint8_t unused_0; | |
2777 | uint16_t auto_link_speed; | |
2778 | /* | |
2779 | * This is the speed that will be used if the autoneg_mode is | |
2780 | * "one_speed" or "one_or_below". If an unsupported speed is | |
2781 | * selected, an error will be generated. | |
2782 | */ | |
2783 | /* 100Mb link speed */ | |
2784 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1) | |
2785 | /* 1Gb link speed */ | |
2786 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa) | |
2787 | /* 2Gb link speed */ | |
2788 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14) | |
2789 | /* 2.5Gb link speed */ | |
2790 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19) | |
2791 | /* 10Gb link speed */ | |
2792 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64) | |
2793 | /* 20Mb link speed */ | |
2794 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8) | |
2795 | /* 25Gb link speed */ | |
2796 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa) | |
2797 | /* 40Gb link speed */ | |
2798 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190) | |
2799 | /* 50Gb link speed */ | |
2800 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4) | |
2801 | /* 100Gb link speed */ | |
2802 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8) | |
2803 | /* 10Mb link speed */ | |
2804 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff) | |
2805 | uint16_t auto_link_speed_mask; | |
2806 | /* | |
2807 | * This is a mask of link speeds that will be used if | |
2808 | * autoneg_mode is "mask". If unsupported speed is enabled an | |
2809 | * error will be generated. | |
2810 | */ | |
2811 | /* 100Mb link speed (Half-duplex) */ | |
2812 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD UINT32_C(0x1) | |
2813 | /* 100Mb link speed (Full-duplex) */ | |
2814 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2) | |
2815 | /* 1Gb link speed (Half-duplex) */ | |
2816 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4) | |
2817 | /* 1Gb link speed (Full-duplex) */ | |
2818 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8) | |
2819 | /* 2Gb link speed */ | |
2820 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB UINT32_C(0x10) | |
2821 | /* 2.5Gb link speed */ | |
2822 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB UINT32_C(0x20) | |
2823 | /* 10Gb link speed */ | |
2824 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40) | |
2825 | /* 20Gb link speed */ | |
2826 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80) | |
2827 | /* 25Gb link speed */ | |
2828 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB UINT32_C(0x100) | |
2829 | /* 40Gb link speed */ | |
2830 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB UINT32_C(0x200) | |
2831 | /* 50Gb link speed */ | |
2832 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB UINT32_C(0x400) | |
2833 | /* 100Gb link speed */ | |
2834 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB UINT32_C(0x800) | |
2835 | /* 10Mb link speed (Half-duplex) */ | |
2836 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD UINT32_C(0x1000) | |
2837 | /* 10Mb link speed (Full-duplex) */ | |
2838 | #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB UINT32_C(0x2000) | |
2839 | uint8_t wirespeed; | |
2840 | /* This value controls the wirespeed feature. */ | |
2841 | /* Wirespeed feature is disabled. */ | |
2842 | #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0) | |
2843 | /* Wirespeed feature is enabled. */ | |
2844 | #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1) | |
2845 | uint8_t lpbk; | |
2846 | /* This value controls the loopback setting for the PHY. */ | |
2847 | /* No loopback is selected. Normal operation. */ | |
2848 | #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0) | |
2849 | /* | |
2850 | * The HW will be configured with local loopback | |
2851 | * such that host data is sent back to the host | |
2852 | * without modification. | |
2853 | */ | |
2854 | #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1) | |
2855 | /* | |
2856 | * The HW will be configured with remote | |
2857 | * loopback such that port logic will send | |
2858 | * packets back out the transmitter that are | |
2859 | * received. | |
2860 | */ | |
2861 | #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2) | |
2862 | uint8_t force_pause; | |
2863 | /* | |
2864 | * This value is used to configure the pause that will be used | |
2865 | * for force mode. | |
2866 | */ | |
2867 | /* | |
2868 | * When this bit is '1', Generation of tx pause messages is | |
2869 | * supported. Disabled otherwise. | |
2870 | */ | |
2871 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1) | |
2872 | /* | |
2873 | * When this bit is '1', Reception of rx pause messages is | |
2874 | * supported. Disabled otherwise. | |
2875 | */ | |
2876 | #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2) | |
2877 | uint8_t unused_1; | |
2878 | uint32_t preemphasis; | |
2879 | /* | |
2880 | * This value controls the pre-emphasis to be used for the link. | |
2881 | * Driver should not set this value (use enable.preemphasis = 0) | |
2882 | * unless driver is sure of setting. Normally HWRM FW will | |
2883 | * determine proper pre-emphasis. | |
2884 | */ | |
2885 | uint16_t eee_link_speed_mask; | |
2886 | /* | |
2887 | * Setting for link speed mask that is used to advertise speeds | |
2888 | * during autonegotiation when EEE is enabled. This field is | |
2889 | * valid only when EEE is enabled. The speeds specified in this | |
2890 | * field shall be a subset of speeds specified in | |
2891 | * auto_link_speed_mask. If EEE is enabled,then at least one | |
2892 | * speed shall be provided in this mask. | |
2893 | */ | |
2894 | /* Reserved */ | |
2895 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1) | |
2896 | /* 100Mb link speed (Full-duplex) */ | |
2897 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2) | |
2898 | /* Reserved */ | |
2899 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4) | |
2900 | /* 1Gb link speed (Full-duplex) */ | |
2901 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8) | |
2902 | /* Reserved */ | |
2903 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10) | |
2904 | /* Reserved */ | |
2905 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20) | |
2906 | /* 10Gb link speed */ | |
2907 | #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40) | |
2908 | uint8_t unused_2; | |
2909 | uint8_t unused_3; | |
2910 | uint32_t tx_lpi_timer; | |
2911 | uint32_t unused_4; | |
2912 | /* | |
2913 | * Reuested setting of TX LPI timer in microseconds. This field | |
2914 | * is valid only when EEE is enabled and TX LPI is enabled. | |
2915 | */ | |
2916 | #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff) | |
2917 | #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0 | |
2918 | } __attribute__((packed)); | |
2919 | ||
2920 | /* Output (16 bytes) */ | |
2921 | struct hwrm_port_phy_cfg_output { | |
2922 | uint16_t error_code; | |
2923 | /* | |
2924 | * Pass/Fail or error type Note: receiver to verify the in | |
2925 | * parameters, and fail the call with an error when appropriate | |
2926 | */ | |
2927 | uint16_t req_type; | |
2928 | /* This field returns the type of original request. */ | |
2929 | uint16_t seq_id; | |
2930 | /* This field provides original sequence number of the command. */ | |
2931 | uint16_t resp_len; | |
2932 | /* | |
2933 | * This field is the length of the response in bytes. The last | |
2934 | * byte of the response is a valid flag that will read as '1' | |
2935 | * when the command has been completely written to memory. | |
2936 | */ | |
2937 | uint32_t unused_0; | |
2938 | uint8_t unused_1; | |
2939 | uint8_t unused_2; | |
2940 | uint8_t unused_3; | |
2941 | uint8_t valid; | |
2942 | /* | |
2943 | * This field is used in Output records to indicate that the | |
2944 | * output is completely written to RAM. This field should be | |
2945 | * read as '1' to indicate that the output has been completely | |
2946 | * written. When writing a command completion or response to an | |
2947 | * internal processor, the order of writes has to be such that | |
2948 | * this field is written last. | |
2949 | */ | |
2950 | } __attribute__((packed)); | |
2951 | ||
2952 | /* hwrm_port_phy_qcfg */ | |
2953 | /* Description: This command queries the PHY configuration for the port. */ | |
2954 | /* Input (24 bytes) */ | |
2955 | struct hwrm_port_phy_qcfg_input { | |
2956 | uint16_t req_type; | |
2957 | /* | |
2958 | * This value indicates what type of request this is. The format | |
2959 | * for the rest of the command is determined by this field. | |
2960 | */ | |
2961 | uint16_t cmpl_ring; | |
2962 | /* | |
2963 | * This value indicates the what completion ring the request | |
2964 | * will be optionally completed on. If the value is -1, then no | |
2965 | * CR completion will be generated. Any other value must be a | |
2966 | * valid CR ring_id value for this function. | |
2967 | */ | |
2968 | uint16_t seq_id; | |
2969 | /* This value indicates the command sequence number. */ | |
2970 | uint16_t target_id; | |
2971 | /* | |
2972 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
2973 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
2974 | * - HWRM | |
2975 | */ | |
2976 | uint64_t resp_addr; | |
2977 | /* | |
2978 | * This is the host address where the response will be written | |
2979 | * when the request is complete. This area must be 16B aligned | |
2980 | * and must be cleared to zero before the request is made. | |
2981 | */ | |
2982 | uint16_t port_id; | |
2983 | /* Port ID of port that is to be queried. */ | |
2984 | uint16_t unused_0[3]; | |
2985 | } __attribute__((packed)); | |
2986 | ||
2987 | /* Output (96 bytes) */ | |
2988 | struct hwrm_port_phy_qcfg_output { | |
2989 | uint16_t error_code; | |
2990 | /* | |
2991 | * Pass/Fail or error type Note: receiver to verify the in | |
2992 | * parameters, and fail the call with an error when appropriate | |
2993 | */ | |
2994 | uint16_t req_type; | |
2995 | /* This field returns the type of original request. */ | |
2996 | uint16_t seq_id; | |
2997 | /* This field provides original sequence number of the command. */ | |
2998 | uint16_t resp_len; | |
2999 | /* | |
3000 | * This field is the length of the response in bytes. The last | |
3001 | * byte of the response is a valid flag that will read as '1' | |
3002 | * when the command has been completely written to memory. | |
3003 | */ | |
3004 | uint8_t link; | |
3005 | /* This value indicates the current link status. */ | |
3006 | /* There is no link or cable detected. */ | |
3007 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0) | |
3008 | /* There is no link, but a cable has been detected. */ | |
3009 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1) | |
3010 | /* There is a link. */ | |
3011 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2) | |
3012 | uint8_t unused_0; | |
3013 | uint16_t link_speed; | |
3014 | /* This value indicates the current link speed of the connection. */ | |
3015 | /* 100Mb link speed */ | |
3016 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1) | |
3017 | /* 1Gb link speed */ | |
3018 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa) | |
3019 | /* 2Gb link speed */ | |
3020 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14) | |
3021 | /* 2.5Gb link speed */ | |
3022 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19) | |
3023 | /* 10Gb link speed */ | |
3024 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64) | |
3025 | /* 20Mb link speed */ | |
3026 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8) | |
3027 | /* 25Gb link speed */ | |
3028 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa) | |
3029 | /* 40Gb link speed */ | |
3030 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190) | |
3031 | /* 50Gb link speed */ | |
3032 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4) | |
3033 | /* 100Gb link speed */ | |
3034 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8) | |
3035 | /* 10Mb link speed */ | |
3036 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff) | |
3037 | uint8_t duplex; | |
3038 | /* This value is indicates the duplex of the current connection. */ | |
3039 | /* Half Duplex connection. */ | |
3040 | #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF UINT32_C(0x0) | |
3041 | /* Full duplex connection. */ | |
3042 | #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL UINT32_C(0x1) | |
3043 | uint8_t pause; | |
3044 | /* | |
3045 | * This value is used to indicate the current pause | |
3046 | * configuration. When autoneg is enabled, this value represents | |
3047 | * the autoneg results of pause configuration. | |
3048 | */ | |
3049 | /* | |
3050 | * When this bit is '1', Generation of tx pause messages is | |
3051 | * supported. Disabled otherwise. | |
3052 | */ | |
3053 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1) | |
3054 | /* | |
3055 | * When this bit is '1', Reception of rx pause messages is | |
3056 | * supported. Disabled otherwise. | |
3057 | */ | |
3058 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2) | |
3059 | uint16_t support_speeds; | |
3060 | /* | |
3061 | * The supported speeds for the port. This is a bit mask. For | |
3062 | * each speed that is supported, the corrresponding bit will be | |
3063 | * set to '1'. | |
3064 | */ | |
3065 | /* 100Mb link speed (Half-duplex) */ | |
3066 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \ | |
3067 | UINT32_C(0x1) | |
3068 | /* 100Mb link speed (Full-duplex) */ | |
3069 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2) | |
3070 | /* 1Gb link speed (Half-duplex) */ | |
3071 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4) | |
3072 | /* 1Gb link speed (Full-duplex) */ | |
3073 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8) | |
3074 | /* 2Gb link speed */ | |
3075 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10) | |
3076 | /* 2.5Gb link speed */ | |
3077 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20) | |
3078 | /* 10Gb link speed */ | |
3079 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40) | |
3080 | /* 20Gb link speed */ | |
3081 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80) | |
3082 | /* 25Gb link speed */ | |
3083 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100) | |
3084 | /* 40Gb link speed */ | |
3085 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200) | |
3086 | /* 50Gb link speed */ | |
3087 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400) | |
3088 | /* 100Gb link speed */ | |
3089 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800) | |
3090 | /* 10Mb link speed (Half-duplex) */ | |
3091 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000) | |
3092 | /* 10Mb link speed (Full-duplex) */ | |
3093 | #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000) | |
3094 | uint16_t force_link_speed; | |
3095 | /* | |
3096 | * Current setting of forced link speed. When the link speed is | |
3097 | * not being forced, this value shall be set to 0. | |
3098 | */ | |
3099 | /* 100Mb link speed */ | |
3100 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \ | |
3101 | UINT32_C(0x1) | |
3102 | /* 1Gb link speed */ | |
3103 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa) | |
3104 | /* 2Gb link speed */ | |
3105 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14) | |
3106 | /* 2.5Gb link speed */ | |
3107 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \ | |
3108 | UINT32_C(0x19) | |
3109 | /* 10Gb link speed */ | |
3110 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64) | |
3111 | /* 20Mb link speed */ | |
3112 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8) | |
3113 | /* 25Gb link speed */ | |
3114 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa) | |
3115 | /* 40Gb link speed */ | |
3116 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190) | |
3117 | /* 50Gb link speed */ | |
3118 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4) | |
3119 | /* 100Gb link speed */ | |
3120 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \ | |
3121 | UINT32_C(0x3e8) | |
3122 | /* 10Mb link speed */ | |
3123 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff) | |
3124 | uint8_t auto_mode; | |
3125 | /* Current setting of auto negotiation mode. */ | |
3126 | /* | |
3127 | * Disable autoneg or autoneg disabled. No | |
3128 | * speeds are selected. | |
3129 | */ | |
3130 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0) | |
3131 | /* Select all possible speeds for autoneg mode. */ | |
3132 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1) | |
3133 | /* | |
3134 | * Select only the auto_link_speed speed for | |
3135 | * autoneg mode. This mode has been DEPRECATED. | |
3136 | * An HWRM client should not use this mode. | |
3137 | */ | |
3138 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2) | |
3139 | /* | |
3140 | * Select the auto_link_speed or any speed below | |
3141 | * that speed for autoneg. This mode has been | |
3142 | * DEPRECATED. An HWRM client should not use | |
3143 | * this mode. | |
3144 | */ | |
3145 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \ | |
3146 | UINT32_C(0x3) | |
3147 | /* | |
3148 | * Select the speeds based on the corresponding | |
3149 | * link speed mask value that is provided. | |
3150 | */ | |
3151 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4) | |
3152 | uint8_t auto_pause; | |
3153 | /* | |
3154 | * Current setting of pause autonegotiation. Move autoneg_pause | |
3155 | * flag here. | |
3156 | */ | |
3157 | /* | |
3158 | * When this bit is '1', Generation of tx pause messages has | |
3159 | * been requested. Disabled otherwise. | |
3160 | */ | |
3161 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1) | |
3162 | /* | |
3163 | * When this bit is '1', Reception of rx pause messages has been | |
3164 | * requested. Disabled otherwise. | |
3165 | */ | |
3166 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2) | |
3167 | /* | |
3168 | * When set to 1, the advertisement of pause is enabled. # When | |
3169 | * the auto_mode is not set to none and this flag is set to 1, | |
3170 | * then the auto_pause bits on this port are being advertised | |
3171 | * and autoneg pause results are being interpreted. # When the | |
3172 | * auto_mode is not set to none and this flag is set to 0, the | |
3173 | * pause is forced as indicated in force_pause, and also | |
3174 | * advertised as auto_pause bits, but the autoneg results are | |
3175 | * not interpreted since the pause configuration is being | |
3176 | * forced. # When the auto_mode is set to none and this flag is | |
3177 | * set to 1, auto_pause bits should be ignored and should be set | |
3178 | * to 0. | |
3179 | */ | |
3180 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \ | |
3181 | UINT32_C(0x4) | |
3182 | uint16_t auto_link_speed; | |
3183 | /* | |
3184 | * Current setting for auto_link_speed. This field is only valid | |
3185 | * when auto_mode is set to "one_speed" or "one_or_below". | |
3186 | */ | |
3187 | /* 100Mb link speed */ | |
3188 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1) | |
3189 | /* 1Gb link speed */ | |
3190 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa) | |
3191 | /* 2Gb link speed */ | |
3192 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14) | |
3193 | /* 2.5Gb link speed */ | |
3194 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19) | |
3195 | /* 10Gb link speed */ | |
3196 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64) | |
3197 | /* 20Mb link speed */ | |
3198 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8) | |
3199 | /* 25Gb link speed */ | |
3200 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa) | |
3201 | /* 40Gb link speed */ | |
3202 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190) | |
3203 | /* 50Gb link speed */ | |
3204 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4) | |
3205 | /* 100Gb link speed */ | |
3206 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8) | |
3207 | /* 10Mb link speed */ | |
3208 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff) | |
3209 | uint16_t auto_link_speed_mask; | |
3210 | /* | |
3211 | * Current setting for auto_link_speed_mask that is used to | |
3212 | * advertise speeds during autonegotiation. This field is only | |
3213 | * valid when auto_mode is set to "mask". The speeds specified | |
3214 | * in this field shall be a subset of supported speeds on this | |
3215 | * port. | |
3216 | */ | |
3217 | /* 100Mb link speed (Half-duplex) */ | |
3218 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \ | |
3219 | UINT32_C(0x1) | |
3220 | /* 100Mb link speed (Full-duplex) */ | |
3221 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \ | |
3222 | UINT32_C(0x2) | |
3223 | /* 1Gb link speed (Half-duplex) */ | |
3224 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \ | |
3225 | UINT32_C(0x4) | |
3226 | /* 1Gb link speed (Full-duplex) */ | |
3227 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \ | |
3228 | UINT32_C(0x8) | |
3229 | /* 2Gb link speed */ | |
3230 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \ | |
3231 | UINT32_C(0x10) | |
3232 | /* 2.5Gb link speed */ | |
3233 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \ | |
3234 | UINT32_C(0x20) | |
3235 | /* 10Gb link speed */ | |
3236 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \ | |
3237 | UINT32_C(0x40) | |
3238 | /* 20Gb link speed */ | |
3239 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \ | |
3240 | UINT32_C(0x80) | |
3241 | /* 25Gb link speed */ | |
3242 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \ | |
3243 | UINT32_C(0x100) | |
3244 | /* 40Gb link speed */ | |
3245 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \ | |
3246 | UINT32_C(0x200) | |
3247 | /* 50Gb link speed */ | |
3248 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \ | |
3249 | UINT32_C(0x400) | |
3250 | /* 100Gb link speed */ | |
3251 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \ | |
3252 | UINT32_C(0x800) | |
3253 | /* 10Mb link speed (Half-duplex) */ | |
3254 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \ | |
3255 | UINT32_C(0x1000) | |
3256 | /* 10Mb link speed (Full-duplex) */ | |
3257 | #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \ | |
3258 | UINT32_C(0x2000) | |
3259 | uint8_t wirespeed; | |
3260 | /* Current setting for wirespeed. */ | |
3261 | /* Wirespeed feature is disabled. */ | |
3262 | #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0) | |
3263 | /* Wirespeed feature is enabled. */ | |
3264 | #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1) | |
3265 | uint8_t lpbk; | |
3266 | /* Current setting for loopback. */ | |
3267 | /* No loopback is selected. Normal operation. */ | |
3268 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0) | |
3269 | /* | |
3270 | * The HW will be configured with local loopback | |
3271 | * such that host data is sent back to the host | |
3272 | * without modification. | |
3273 | */ | |
3274 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1) | |
3275 | /* | |
3276 | * The HW will be configured with remote | |
3277 | * loopback such that port logic will send | |
3278 | * packets back out the transmitter that are | |
3279 | * received. | |
3280 | */ | |
3281 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2) | |
3282 | uint8_t force_pause; | |
3283 | /* | |
3284 | * Current setting of forced pause. When the pause configuration | |
3285 | * is not being forced, then this value shall be set to 0. | |
3286 | */ | |
3287 | /* | |
3288 | * When this bit is '1', Generation of tx pause messages is | |
3289 | * supported. Disabled otherwise. | |
3290 | */ | |
3291 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1) | |
3292 | /* | |
3293 | * When this bit is '1', Reception of rx pause messages is | |
3294 | * supported. Disabled otherwise. | |
3295 | */ | |
3296 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2) | |
3297 | uint8_t module_status; | |
3298 | /* | |
3299 | * This value indicates the current status of the optics module | |
3300 | * on this port. | |
3301 | */ | |
3302 | /* Module is inserted and accepted */ | |
3303 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0) | |
3304 | /* Module is rejected and transmit side Laser is disabled. */ | |
3305 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \ | |
3306 | UINT32_C(0x1) | |
3307 | /* Module mismatch warning. */ | |
3308 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \ | |
3309 | UINT32_C(0x2) | |
3310 | /* Module is rejected and powered down. */ | |
3311 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3) | |
3312 | /* Module is not inserted. */ | |
3313 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \ | |
3314 | UINT32_C(0x4) | |
3315 | /* Module status is not applicable. */ | |
3316 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \ | |
3317 | UINT32_C(0xff) | |
3318 | uint32_t preemphasis; | |
3319 | /* Current setting for preemphasis. */ | |
3320 | uint8_t phy_maj; | |
3321 | /* This field represents the major version of the PHY. */ | |
3322 | uint8_t phy_min; | |
3323 | /* This field represents the minor version of the PHY. */ | |
3324 | uint8_t phy_bld; | |
3325 | /* This field represents the build version of the PHY. */ | |
3326 | uint8_t phy_type; | |
3327 | /* This value represents a PHY type. */ | |
3328 | /* Unknown */ | |
3329 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0) | |
3330 | /* BASE-CR */ | |
3331 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1) | |
3332 | /* BASE-KR4 (Deprecated) */ | |
3333 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2) | |
3334 | /* BASE-LR */ | |
3335 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3) | |
3336 | /* BASE-SR */ | |
3337 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4) | |
3338 | /* BASE-KR2 (Deprecated) */ | |
3339 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5) | |
3340 | /* BASE-KX */ | |
3341 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6) | |
3342 | /* BASE-KR */ | |
3343 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7) | |
3344 | /* BASE-T */ | |
3345 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8) | |
3346 | /* EEE capable BASE-T */ | |
3347 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9) | |
3348 | /* SGMII connected external PHY */ | |
3349 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa) | |
3350 | uint8_t media_type; | |
3351 | /* This value represents a media type. */ | |
3352 | /* Unknown */ | |
3353 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0) | |
3354 | /* Twisted Pair */ | |
3355 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1) | |
3356 | /* Direct Attached Copper */ | |
3357 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2) | |
3358 | /* Fiber */ | |
3359 | #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3) | |
3360 | uint8_t xcvr_pkg_type; | |
3361 | /* This value represents a transceiver type. */ | |
3362 | /* PHY and MAC are in the same package */ | |
3363 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \ | |
3364 | UINT32_C(0x1) | |
3365 | /* PHY and MAC are in different packages */ | |
3366 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \ | |
3367 | UINT32_C(0x2) | |
3368 | uint8_t eee_config_phy_addr; | |
3369 | /* | |
3370 | * This field represents flags related to EEE configuration. | |
3371 | * These EEE configuration flags are valid only when the | |
3372 | * auto_mode is not set to none (in other words autonegotiation | |
3373 | * is enabled). | |
3374 | */ | |
3375 | /* This field represents PHY address. */ | |
3376 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f) | |
3377 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0 | |
3378 | /* | |
3379 | * When set to 1, Energy Efficient Ethernet (EEE) mode is | |
3380 | * enabled. Speeds for autoneg with EEE mode enabled are based | |
3381 | * on eee_link_speed_mask. | |
3382 | */ | |
3383 | #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \ | |
3384 | UINT32_C(0x20) | |
3385 | /* | |
3386 | * This flag is valid only when eee_enabled is set to 1. # If | |
3387 | * eee_enabled is set to 0, then EEE mode is disabled and this | |
3388 | * flag shall be ignored. # If eee_enabled is set to 1 and this | |
3389 | * flag is set to 1, then Energy Efficient Ethernet (EEE) mode | |
3390 | * is enabled and in use. # If eee_enabled is set to 1 and this | |
3391 | * flag is set to 0, then Energy Efficient Ethernet (EEE) mode | |
3392 | * is enabled but is currently not in use. | |
3393 | */ | |
3394 | #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40) | |
3395 | /* | |
3396 | * This flag is valid only when eee_enabled is set to 1. # If | |
3397 | * eee_enabled is set to 0, then EEE mode is disabled and this | |
3398 | * flag shall be ignored. # If eee_enabled is set to 1 and this | |
3399 | * flag is set to 1, then Energy Efficient Ethernet (EEE) mode | |
3400 | * is enabled and TX LPI is enabled. # If eee_enabled is set to | |
3401 | * 1 and this flag is set to 0, then Energy Efficient Ethernet | |
3402 | * (EEE) mode is enabled but TX LPI is disabled. | |
3403 | */ | |
3404 | #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80) | |
3405 | /* | |
3406 | * This field represents flags related to EEE configuration. | |
3407 | * These EEE configuration flags are valid only when the | |
3408 | * auto_mode is not set to none (in other words autonegotiation | |
3409 | * is enabled). | |
3410 | */ | |
3411 | #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0) | |
3412 | #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5 | |
3413 | uint8_t parallel_detect; | |
3414 | /* Reserved field, set to 0 */ | |
3415 | /* | |
3416 | * When set to 1, the parallel detection is used to determine | |
3417 | * the speed of the link partner. Parallel detection is used | |
3418 | * when a autonegotiation capable device is connected to a link | |
3419 | * parter that is not capable of autonegotiation. | |
3420 | */ | |
3421 | #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1) | |
3422 | /* Reserved field, set to 0 */ | |
3423 | #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe) | |
3424 | #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1 | |
3425 | uint16_t link_partner_adv_speeds; | |
3426 | /* | |
3427 | * The advertised speeds for the port by the link partner. Each | |
3428 | * advertised speed will be set to '1'. | |
3429 | */ | |
3430 | /* 100Mb link speed (Half-duplex) */ | |
3431 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \ | |
3432 | UINT32_C(0x1) | |
3433 | /* 100Mb link speed (Full-duplex) */ | |
3434 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \ | |
3435 | UINT32_C(0x2) | |
3436 | /* 1Gb link speed (Half-duplex) */ | |
3437 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \ | |
3438 | UINT32_C(0x4) | |
3439 | /* 1Gb link speed (Full-duplex) */ | |
3440 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \ | |
3441 | UINT32_C(0x8) | |
3442 | /* 2Gb link speed */ | |
3443 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \ | |
3444 | UINT32_C(0x10) | |
3445 | /* 2.5Gb link speed */ | |
3446 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \ | |
3447 | UINT32_C(0x20) | |
3448 | /* 10Gb link speed */ | |
3449 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \ | |
3450 | UINT32_C(0x40) | |
3451 | /* 20Gb link speed */ | |
3452 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \ | |
3453 | UINT32_C(0x80) | |
3454 | /* 25Gb link speed */ | |
3455 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \ | |
3456 | UINT32_C(0x100) | |
3457 | /* 40Gb link speed */ | |
3458 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \ | |
3459 | UINT32_C(0x200) | |
3460 | /* 50Gb link speed */ | |
3461 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \ | |
3462 | UINT32_C(0x400) | |
3463 | /* 100Gb link speed */ | |
3464 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \ | |
3465 | UINT32_C(0x800) | |
3466 | /* 10Mb link speed (Half-duplex) */ | |
3467 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \ | |
3468 | UINT32_C(0x1000) | |
3469 | /* 10Mb link speed (Full-duplex) */ | |
3470 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \ | |
3471 | UINT32_C(0x2000) | |
3472 | uint8_t link_partner_adv_auto_mode; | |
3473 | /* | |
3474 | * The advertised autoneg for the port by the link partner. This | |
3475 | * field is deprecated and should be set to 0. | |
3476 | */ | |
3477 | /* | |
3478 | * Disable autoneg or autoneg disabled. No | |
3479 | * speeds are selected. | |
3480 | */ | |
3481 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \ | |
3482 | UINT32_C(0x0) | |
3483 | /* Select all possible speeds for autoneg mode. */ | |
3484 | #define \ | |
3485 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \ | |
3486 | UINT32_C(0x1) | |
3487 | /* | |
3488 | * Select only the auto_link_speed speed for | |
3489 | * autoneg mode. This mode has been DEPRECATED. | |
3490 | * An HWRM client should not use this mode. | |
3491 | */ | |
3492 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \ | |
3493 | UINT32_C(0x2) | |
3494 | /* | |
3495 | * Select the auto_link_speed or any speed below | |
3496 | * that speed for autoneg. This mode has been | |
3497 | * DEPRECATED. An HWRM client should not use | |
3498 | * this mode. | |
3499 | */ | |
3500 | #define \ | |
3501 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \ | |
3502 | UINT32_C(0x3) | |
3503 | /* | |
3504 | * Select the speeds based on the corresponding | |
3505 | * link speed mask value that is provided. | |
3506 | */ | |
3507 | #define \ | |
3508 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \ | |
3509 | UINT32_C(0x4) | |
3510 | uint8_t link_partner_adv_pause; | |
3511 | /* The advertised pause settings on the port by the link partner. */ | |
3512 | /* | |
3513 | * When this bit is '1', Generation of tx pause messages is | |
3514 | * supported. Disabled otherwise. | |
3515 | */ | |
3516 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \ | |
3517 | UINT32_C(0x1) | |
3518 | /* | |
3519 | * When this bit is '1', Reception of rx pause messages is | |
3520 | * supported. Disabled otherwise. | |
3521 | */ | |
3522 | #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \ | |
3523 | UINT32_C(0x2) | |
3524 | uint16_t adv_eee_link_speed_mask; | |
3525 | /* | |
3526 | * Current setting for link speed mask that is used to advertise | |
3527 | * speeds during autonegotiation when EEE is enabled. This field | |
3528 | * is valid only when eee_enabled flags is set to 1. The speeds | |
3529 | * specified in this field shall be a subset of speeds specified | |
3530 | * in auto_link_speed_mask. | |
3531 | */ | |
3532 | /* Reserved */ | |
3533 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \ | |
3534 | UINT32_C(0x1) | |
3535 | /* 100Mb link speed (Full-duplex) */ | |
3536 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \ | |
3537 | UINT32_C(0x2) | |
3538 | /* Reserved */ | |
3539 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \ | |
3540 | UINT32_C(0x4) | |
3541 | /* 1Gb link speed (Full-duplex) */ | |
3542 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \ | |
3543 | UINT32_C(0x8) | |
3544 | /* Reserved */ | |
3545 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \ | |
3546 | UINT32_C(0x10) | |
3547 | /* Reserved */ | |
3548 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \ | |
3549 | UINT32_C(0x20) | |
3550 | /* 10Gb link speed */ | |
3551 | #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \ | |
3552 | UINT32_C(0x40) | |
3553 | uint16_t link_partner_adv_eee_link_speed_mask; | |
3554 | /* | |
3555 | * Current setting for link speed mask that is advertised by the | |
3556 | * link partner when EEE is enabled. This field is valid only | |
3557 | * when eee_enabled flags is set to 1. | |
3558 | */ | |
3559 | /* Reserved */ | |
3560 | #define \ | |
3561 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \ | |
3562 | UINT32_C(0x1) | |
3563 | /* 100Mb link speed (Full-duplex) */ | |
3564 | #define \ | |
3565 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \ | |
3566 | UINT32_C(0x2) | |
3567 | /* Reserved */ | |
3568 | #define \ | |
3569 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \ | |
3570 | UINT32_C(0x4) | |
3571 | /* 1Gb link speed (Full-duplex) */ | |
3572 | #define \ | |
3573 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \ | |
3574 | UINT32_C(0x8) | |
3575 | /* Reserved */ | |
3576 | #define \ | |
3577 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \ | |
3578 | UINT32_C(0x10) | |
3579 | /* Reserved */ | |
3580 | #define \ | |
3581 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \ | |
3582 | UINT32_C(0x20) | |
3583 | /* 10Gb link speed */ | |
3584 | #define \ | |
3585 | HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \ | |
3586 | UINT32_C(0x40) | |
3587 | uint32_t xcvr_identifier_type_tx_lpi_timer; | |
3588 | /* This value represents transceiver identifier type. */ | |
3589 | /* | |
3590 | * Current setting of TX LPI timer in microseconds. This field | |
3591 | * is valid only when_eee_enabled flag is set to 1 and | |
3592 | * tx_lpi_enabled is set to 1. | |
3593 | */ | |
3594 | #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \ | |
3595 | UINT32_C(0xffffff) | |
3596 | #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0 | |
3597 | /* This value represents transceiver identifier type. */ | |
3598 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \ | |
3599 | UINT32_C(0xff000000) | |
3600 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24 | |
3601 | /* Unknown */ | |
3602 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \ | |
3603 | (UINT32_C(0x0) << 24) | |
3604 | /* SFP/SFP+/SFP28 */ | |
3605 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \ | |
3606 | (UINT32_C(0x3) << 24) | |
3607 | /* QSFP */ | |
3608 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \ | |
3609 | (UINT32_C(0xc) << 24) | |
3610 | /* QSFP+ */ | |
3611 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \ | |
3612 | (UINT32_C(0xd) << 24) | |
3613 | /* QSFP28 */ | |
3614 | #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \ | |
3615 | (UINT32_C(0x11) << 24) | |
3616 | uint16_t fec_cfg; | |
3617 | /* | |
3618 | * This value represents the current configuration of Forward | |
3619 | * Error Correction (FEC) on the port. | |
3620 | */ | |
3621 | /* | |
3622 | * When set to 1, then FEC is not supported on this port. If | |
3623 | * this flag is set to 1, then all other FEC configuration flags | |
3624 | * shall be ignored. When set to 0, then FEC is supported as | |
3625 | * indicated by other configuration flags. If no cable is | |
3626 | * attached and the HWRM does not yet know the FEC capability, | |
3627 | * then the HWRM shall set this flag to 1 when reporting FEC | |
3628 | * capability. | |
3629 | */ | |
3630 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \ | |
3631 | UINT32_C(0x1) | |
3632 | /* | |
3633 | * When set to 1, then FEC autonegotiation is supported on this | |
3634 | * port. When set to 0, then FEC autonegotiation is not | |
3635 | * supported on this port. | |
3636 | */ | |
3637 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \ | |
3638 | UINT32_C(0x2) | |
3639 | /* | |
3640 | * When set to 1, then FEC autonegotiation is enabled on this | |
3641 | * port. When set to 0, then FEC autonegotiation is disabled if | |
3642 | * supported. This flag should be ignored if FEC autonegotiation | |
3643 | * is not supported on this port. | |
3644 | */ | |
3645 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \ | |
3646 | UINT32_C(0x4) | |
3647 | /* | |
3648 | * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on | |
3649 | * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is | |
3650 | * not supported on this port. | |
3651 | */ | |
3652 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \ | |
3653 | UINT32_C(0x8) | |
3654 | /* | |
3655 | * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on | |
3656 | * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is | |
3657 | * disabled if supported. This flag should be ignored if FEC | |
3658 | * CLAUSE 74 is not supported on this port. | |
3659 | */ | |
3660 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \ | |
3661 | UINT32_C(0x10) | |
3662 | /* | |
3663 | * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported | |
3664 | * on this port. When set to 0, then FEC CLAUSE 91 (Reed | |
3665 | * Solomon) is not supported on this port. | |
3666 | */ | |
3667 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \ | |
3668 | UINT32_C(0x20) | |
3669 | /* | |
3670 | * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled | |
3671 | * on this port. When set to 0, then FEC CLAUSE 91 (Reed | |
3672 | * Solomon) is disabled if supported. This flag should be | |
3673 | * ignored if FEC CLAUSE 91 is not supported on this port. | |
3674 | */ | |
3675 | #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \ | |
3676 | UINT32_C(0x40) | |
3677 | uint8_t unused_1; | |
3678 | uint8_t unused_2; | |
3679 | char phy_vendor_name[16]; | |
3680 | /* | |
3681 | * Up to 16 bytes of null padded ASCII string representing PHY | |
3682 | * vendor. If the string is set to null, then the vendor name is | |
3683 | * not available. | |
3684 | */ | |
3685 | char phy_vendor_partnumber[16]; | |
3686 | /* | |
3687 | * Up to 16 bytes of null padded ASCII string that identifies | |
3688 | * vendor specific part number of the PHY. If the string is set | |
3689 | * to null, then the vendor specific part number is not | |
3690 | * available. | |
3691 | */ | |
3692 | uint32_t unused_3; | |
3693 | uint8_t unused_4; | |
3694 | uint8_t unused_5; | |
3695 | uint8_t unused_6; | |
3696 | uint8_t valid; | |
3697 | /* | |
3698 | * This field is used in Output records to indicate that the | |
3699 | * output is completely written to RAM. This field should be | |
3700 | * read as '1' to indicate that the output has been completely | |
3701 | * written. When writing a command completion or response to an | |
3702 | * internal processor, the order of writes has to be such that | |
3703 | * this field is written last. | |
3704 | */ | |
3705 | } __attribute__((packed)); | |
3706 | ||
3707 | /* hwrm_queue_qportcfg */ | |
3708 | /* | |
3709 | * Description: This function is called by a driver to query queue configuration | |
3710 | * of a port. # The HWRM shall at least advertise one queue with lossy service | |
3711 | * profile. # The driver shall use this command to query queue ids before | |
3712 | * configuring or using any queues. # If a service profile is not set for a | |
3713 | * queue, then the driver shall not use that queue without configuring a service | |
3714 | * profile for it. # If the driver is not allowed to configure service profiles, | |
3715 | * then the driver shall only use queues for which service profiles are pre- | |
3716 | * configured. | |
3717 | */ | |
3718 | /* Input (24 bytes) */ | |
3719 | struct hwrm_queue_qportcfg_input { | |
3720 | uint16_t req_type; | |
3721 | /* | |
3722 | * This value indicates what type of request this is. The format | |
3723 | * for the rest of the command is determined by this field. | |
3724 | */ | |
3725 | uint16_t cmpl_ring; | |
3726 | /* | |
3727 | * This value indicates the what completion ring the request | |
3728 | * will be optionally completed on. If the value is -1, then no | |
3729 | * CR completion will be generated. Any other value must be a | |
3730 | * valid CR ring_id value for this function. | |
3731 | */ | |
3732 | uint16_t seq_id; | |
3733 | /* This value indicates the command sequence number. */ | |
3734 | uint16_t target_id; | |
3735 | /* | |
3736 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
3737 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
3738 | * - HWRM | |
3739 | */ | |
3740 | uint64_t resp_addr; | |
3741 | /* | |
3742 | * This is the host address where the response will be written | |
3743 | * when the request is complete. This area must be 16B aligned | |
3744 | * and must be cleared to zero before the request is made. | |
3745 | */ | |
3746 | uint32_t flags; | |
3747 | /* | |
3748 | * Enumeration denoting the RX, TX type of the resource. This | |
3749 | * enumeration is used for resources that are similar for both | |
3750 | * TX and RX paths of the chip. | |
3751 | */ | |
3752 | #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1) | |
3753 | /* tx path */ | |
3754 | #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0) | |
3755 | /* rx path */ | |
3756 | #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1) | |
3757 | #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \ | |
3758 | QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX | |
3759 | uint16_t port_id; | |
3760 | /* | |
3761 | * Port ID of port for which the queue configuration is being | |
3762 | * queried. This field is only required when sent by IPC. | |
3763 | */ | |
3764 | uint16_t unused_0; | |
3765 | } __attribute__((packed)); | |
3766 | ||
3767 | /* Output (32 bytes) */ | |
3768 | struct hwrm_queue_qportcfg_output { | |
3769 | uint16_t error_code; | |
3770 | /* | |
3771 | * Pass/Fail or error type Note: receiver to verify the in | |
3772 | * parameters, and fail the call with an error when appropriate | |
3773 | */ | |
3774 | uint16_t req_type; | |
3775 | /* This field returns the type of original request. */ | |
3776 | uint16_t seq_id; | |
3777 | /* This field provides original sequence number of the command. */ | |
3778 | uint16_t resp_len; | |
3779 | /* | |
3780 | * This field is the length of the response in bytes. The last | |
3781 | * byte of the response is a valid flag that will read as '1' | |
3782 | * when the command has been completely written to memory. | |
3783 | */ | |
3784 | uint8_t max_configurable_queues; | |
3785 | /* | |
3786 | * The maximum number of queues that can be configured on this | |
3787 | * port. Valid values range from 1 through 8. | |
3788 | */ | |
3789 | uint8_t max_configurable_lossless_queues; | |
3790 | /* | |
3791 | * The maximum number of lossless queues that can be configured | |
3792 | * on this port. Valid values range from 0 through 8. | |
3793 | */ | |
3794 | uint8_t queue_cfg_allowed; | |
3795 | /* | |
3796 | * Bitmask indicating which queues can be configured by the | |
3797 | * hwrm_queue_cfg command. Each bit represents a specific queue | |
3798 | * where bit 0 represents queue 0 and bit 7 represents queue 7. | |
3799 | * # A value of 0 indicates that the queue is not configurable | |
3800 | * by the hwrm_queue_cfg command. # A value of 1 indicates that | |
3801 | * the queue is configurable. # A hwrm_queue_cfg command shall | |
3802 | * return error when trying to configure a queue not | |
3803 | * configurable. | |
3804 | */ | |
3805 | uint8_t queue_cfg_info; | |
3806 | /* Information about queue configuration. */ | |
3807 | /* | |
3808 | * If this flag is set to '1', then the queues are configured | |
3809 | * asymmetrically on TX and RX sides. If this flag is set to | |
3810 | * '0', then the queues are configured symmetrically on TX and | |
3811 | * RX sides. For symmetric configuration, the queue | |
3812 | * configuration including queue ids and service profiles on the | |
3813 | * TX side is the same as the corresponding queue configuration | |
3814 | * on the RX side. | |
3815 | */ | |
3816 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG \ | |
3817 | UINT32_C(0x1) | |
3818 | uint8_t queue_pfcenable_cfg_allowed; | |
3819 | /* | |
3820 | * Bitmask indicating which queues can be configured by the | |
3821 | * hwrm_queue_pfcenable_cfg command. Each bit represents a | |
3822 | * specific queue where bit 0 represents queue 0 and bit 7 | |
3823 | * represents queue 7. # A value of 0 indicates that the queue | |
3824 | * is not configurable by the hwrm_queue_pfcenable_cfg command. | |
3825 | * # A value of 1 indicates that the queue is configurable. # A | |
3826 | * hwrm_queue_pfcenable_cfg command shall return error when | |
3827 | * trying to configure a queue that is not configurable. | |
3828 | */ | |
3829 | uint8_t queue_pri2cos_cfg_allowed; | |
3830 | /* | |
3831 | * Bitmask indicating which queues can be configured by the | |
3832 | * hwrm_queue_pri2cos_cfg command. Each bit represents a | |
3833 | * specific queue where bit 0 represents queue 0 and bit 7 | |
3834 | * represents queue 7. # A value of 0 indicates that the queue | |
3835 | * is not configurable by the hwrm_queue_pri2cos_cfg command. # | |
3836 | * A value of 1 indicates that the queue is configurable. # A | |
3837 | * hwrm_queue_pri2cos_cfg command shall return error when trying | |
3838 | * to configure a queue that is not configurable. | |
3839 | */ | |
3840 | uint8_t queue_cos2bw_cfg_allowed; | |
3841 | /* | |
3842 | * Bitmask indicating which queues can be configured by the | |
3843 | * hwrm_queue_pri2cos_cfg command. Each bit represents a | |
3844 | * specific queue where bit 0 represents queue 0 and bit 7 | |
3845 | * represents queue 7. # A value of 0 indicates that the queue | |
3846 | * is not configurable by the hwrm_queue_pri2cos_cfg command. # | |
3847 | * A value of 1 indicates that the queue is configurable. # A | |
3848 | * hwrm_queue_pri2cos_cfg command shall return error when trying | |
3849 | * to configure a queue not configurable. | |
3850 | */ | |
3851 | uint8_t queue_id0; | |
3852 | /* | |
3853 | * ID of CoS Queue 0. FF - Invalid id # This ID can be used on | |
3854 | * any subsequent call to an hwrm command that takes a queue id. | |
3855 | * # IDs must always be queried by this command before any use | |
3856 | * by the driver or software. # Any driver or software should | |
3857 | * not make any assumptions about queue IDs. # A value of 0xff | |
3858 | * indicates that the queue is not available. # Available queues | |
3859 | * may not be in sequential order. | |
3860 | */ | |
3861 | uint8_t queue_id0_service_profile; | |
3862 | /* This value is applicable to CoS queues only. */ | |
3863 | /* Lossy (best-effort) */ | |
3864 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \ | |
3865 | UINT32_C(0x0) | |
3866 | /* Lossless */ | |
3867 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \ | |
3868 | UINT32_C(0x1) | |
3869 | /* | |
3870 | * Set to 0xFF... (All Fs) if there is no | |
3871 | * service profile specified | |
3872 | */ | |
3873 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \ | |
3874 | UINT32_C(0xff) | |
3875 | uint8_t queue_id1; | |
3876 | /* | |
3877 | * ID of CoS Queue 1. FF - Invalid id # This ID can be used on | |
3878 | * any subsequent call to an hwrm command that takes a queue id. | |
3879 | * # IDs must always be queried by this command before any use | |
3880 | * by the driver or software. # Any driver or software should | |
3881 | * not make any assumptions about queue IDs. # A value of 0xff | |
3882 | * indicates that the queue is not available. # Available queues | |
3883 | * may not be in sequential order. | |
3884 | */ | |
3885 | uint8_t queue_id1_service_profile; | |
3886 | /* This value is applicable to CoS queues only. */ | |
3887 | /* Lossy (best-effort) */ | |
3888 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \ | |
3889 | UINT32_C(0x0) | |
3890 | /* Lossless */ | |
3891 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \ | |
3892 | UINT32_C(0x1) | |
3893 | /* | |
3894 | * Set to 0xFF... (All Fs) if there is no | |
3895 | * service profile specified | |
3896 | */ | |
3897 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \ | |
3898 | UINT32_C(0xff) | |
3899 | uint8_t queue_id2; | |
3900 | /* | |
3901 | * ID of CoS Queue 2. FF - Invalid id # This ID can be used on | |
3902 | * any subsequent call to an hwrm command that takes a queue id. | |
3903 | * # IDs must always be queried by this command before any use | |
3904 | * by the driver or software. # Any driver or software should | |
3905 | * not make any assumptions about queue IDs. # A value of 0xff | |
3906 | * indicates that the queue is not available. # Available queues | |
3907 | * may not be in sequential order. | |
3908 | */ | |
3909 | uint8_t queue_id2_service_profile; | |
3910 | /* This value is applicable to CoS queues only. */ | |
3911 | /* Lossy (best-effort) */ | |
3912 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \ | |
3913 | UINT32_C(0x0) | |
3914 | /* Lossless */ | |
3915 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \ | |
3916 | UINT32_C(0x1) | |
3917 | /* | |
3918 | * Set to 0xFF... (All Fs) if there is no | |
3919 | * service profile specified | |
3920 | */ | |
3921 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \ | |
3922 | UINT32_C(0xff) | |
3923 | uint8_t queue_id3; | |
3924 | /* | |
3925 | * ID of CoS Queue 3. FF - Invalid id # This ID can be used on | |
3926 | * any subsequent call to an hwrm command that takes a queue id. | |
3927 | * # IDs must always be queried by this command before any use | |
3928 | * by the driver or software. # Any driver or software should | |
3929 | * not make any assumptions about queue IDs. # A value of 0xff | |
3930 | * indicates that the queue is not available. # Available queues | |
3931 | * may not be in sequential order. | |
3932 | */ | |
3933 | uint8_t queue_id3_service_profile; | |
3934 | /* This value is applicable to CoS queues only. */ | |
3935 | /* Lossy (best-effort) */ | |
3936 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \ | |
3937 | UINT32_C(0x0) | |
3938 | /* Lossless */ | |
3939 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \ | |
3940 | UINT32_C(0x1) | |
3941 | /* | |
3942 | * Set to 0xFF... (All Fs) if there is no | |
3943 | * service profile specified | |
3944 | */ | |
3945 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \ | |
3946 | UINT32_C(0xff) | |
3947 | uint8_t queue_id4; | |
3948 | /* | |
3949 | * ID of CoS Queue 4. FF - Invalid id # This ID can be used on | |
3950 | * any subsequent call to an hwrm command that takes a queue id. | |
3951 | * # IDs must always be queried by this command before any use | |
3952 | * by the driver or software. # Any driver or software should | |
3953 | * not make any assumptions about queue IDs. # A value of 0xff | |
3954 | * indicates that the queue is not available. # Available queues | |
3955 | * may not be in sequential order. | |
3956 | */ | |
3957 | uint8_t queue_id4_service_profile; | |
3958 | /* This value is applicable to CoS queues only. */ | |
3959 | /* Lossy (best-effort) */ | |
3960 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \ | |
3961 | UINT32_C(0x0) | |
3962 | /* Lossless */ | |
3963 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \ | |
3964 | UINT32_C(0x1) | |
3965 | /* | |
3966 | * Set to 0xFF... (All Fs) if there is no | |
3967 | * service profile specified | |
3968 | */ | |
3969 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \ | |
3970 | UINT32_C(0xff) | |
3971 | uint8_t queue_id5; | |
3972 | /* | |
3973 | * ID of CoS Queue 5. FF - Invalid id # This ID can be used on | |
3974 | * any subsequent call to an hwrm command that takes a queue id. | |
3975 | * # IDs must always be queried by this command before any use | |
3976 | * by the driver or software. # Any driver or software should | |
3977 | * not make any assumptions about queue IDs. # A value of 0xff | |
3978 | * indicates that the queue is not available. # Available queues | |
3979 | * may not be in sequential order. | |
3980 | */ | |
3981 | uint8_t queue_id5_service_profile; | |
3982 | /* This value is applicable to CoS queues only. */ | |
3983 | /* Lossy (best-effort) */ | |
3984 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \ | |
3985 | UINT32_C(0x0) | |
3986 | /* Lossless */ | |
3987 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \ | |
3988 | UINT32_C(0x1) | |
3989 | /* | |
3990 | * Set to 0xFF... (All Fs) if there is no | |
3991 | * service profile specified | |
3992 | */ | |
3993 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \ | |
3994 | UINT32_C(0xff) | |
3995 | uint8_t queue_id6; | |
3996 | /* | |
3997 | * ID of CoS Queue 6. FF - Invalid id # This ID can be used on | |
3998 | * any subsequent call to an hwrm command that takes a queue id. | |
3999 | * # IDs must always be queried by this command before any use | |
4000 | * by the driver or software. # Any driver or software should | |
4001 | * not make any assumptions about queue IDs. # A value of 0xff | |
4002 | * indicates that the queue is not available. # Available queues | |
4003 | * may not be in sequential order. | |
4004 | */ | |
4005 | uint8_t queue_id6_service_profile; | |
4006 | /* This value is applicable to CoS queues only. */ | |
4007 | /* Lossy (best-effort) */ | |
4008 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \ | |
4009 | UINT32_C(0x0) | |
4010 | /* Lossless */ | |
4011 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \ | |
4012 | UINT32_C(0x1) | |
4013 | /* | |
4014 | * Set to 0xFF... (All Fs) if there is no | |
4015 | * service profile specified | |
4016 | */ | |
4017 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \ | |
4018 | UINT32_C(0xff) | |
4019 | uint8_t queue_id7; | |
4020 | /* | |
4021 | * ID of CoS Queue 7. FF - Invalid id # This ID can be used on | |
4022 | * any subsequent call to an hwrm command that takes a queue id. | |
4023 | * # IDs must always be queried by this command before any use | |
4024 | * by the driver or software. # Any driver or software should | |
4025 | * not make any assumptions about queue IDs. # A value of 0xff | |
4026 | * indicates that the queue is not available. # Available queues | |
4027 | * may not be in sequential order. | |
4028 | */ | |
4029 | uint8_t queue_id7_service_profile; | |
4030 | /* This value is applicable to CoS queues only. */ | |
4031 | /* Lossy (best-effort) */ | |
4032 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \ | |
4033 | UINT32_C(0x0) | |
4034 | /* Lossless */ | |
4035 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \ | |
4036 | UINT32_C(0x1) | |
4037 | /* | |
4038 | * Set to 0xFF... (All Fs) if there is no | |
4039 | * service profile specified | |
4040 | */ | |
4041 | #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \ | |
4042 | UINT32_C(0xff) | |
4043 | uint8_t valid; | |
4044 | /* | |
4045 | * This field is used in Output records to indicate that the | |
4046 | * output is completely written to RAM. This field should be | |
4047 | * read as '1' to indicate that the output has been completely | |
4048 | * written. When writing a command completion or response to an | |
4049 | * internal processor, the order of writes has to be such that | |
4050 | * this field is written last. | |
4051 | */ | |
4052 | } __attribute__((packed)); | |
4053 | ||
4054 | /* hwrm_vnic_alloc */ | |
4055 | /* | |
4056 | * Description: This VNIC is a resource in the RX side of the chip that is used | |
4057 | * to represent a virtual host "interface". # At the time of VNIC allocation or | |
4058 | * configuration, the function can specify whether it wants the requested VNIC | |
4059 | * to be the default VNIC for the function or not. # If a function requests | |
4060 | * allocation of a VNIC for the first time and a VNIC is successfully allocated | |
4061 | * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC | |
4062 | * for that function. # The default VNIC shall be used for the default action | |
4063 | * for a partition or function. # For each VNIC allocated on a function, a | |
4064 | * mapping on the RX side to map the allocated VNIC to source virtual interface | |
4065 | * shall be performed by the HWRM. This should be hidden to the function driver | |
4066 | * requesting the VNIC allocation. This enables broadcast/multicast replication | |
4067 | * with source knockout. # If multicast replication with source knockout is | |
4068 | * enabled, then the internal VNIC to SVIF mapping data structures shall be | |
4069 | * programmed at the time of VNIC allocation. | |
4070 | */ | |
4071 | /* Input (24 bytes) */ | |
4072 | struct hwrm_vnic_alloc_input { | |
4073 | uint16_t req_type; | |
4074 | /* | |
4075 | * This value indicates what type of request this is. The format | |
4076 | * for the rest of the command is determined by this field. | |
4077 | */ | |
4078 | uint16_t cmpl_ring; | |
4079 | /* | |
4080 | * This value indicates the what completion ring the request | |
4081 | * will be optionally completed on. If the value is -1, then no | |
4082 | * CR completion will be generated. Any other value must be a | |
4083 | * valid CR ring_id value for this function. | |
4084 | */ | |
4085 | uint16_t seq_id; | |
4086 | /* This value indicates the command sequence number. */ | |
4087 | uint16_t target_id; | |
4088 | /* | |
4089 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4090 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4091 | * - HWRM | |
4092 | */ | |
4093 | uint64_t resp_addr; | |
4094 | /* | |
4095 | * This is the host address where the response will be written | |
4096 | * when the request is complete. This area must be 16B aligned | |
4097 | * and must be cleared to zero before the request is made. | |
4098 | */ | |
4099 | uint32_t flags; | |
4100 | /* | |
4101 | * When this bit is '1', this VNIC is requested to be the | |
4102 | * default VNIC for this function. | |
4103 | */ | |
4104 | #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1) | |
4105 | uint32_t unused_0; | |
4106 | } __attribute__((packed)); | |
4107 | ||
4108 | /* Output (16 bytes) */ | |
4109 | struct hwrm_vnic_alloc_output { | |
4110 | uint16_t error_code; | |
4111 | /* | |
4112 | * Pass/Fail or error type Note: receiver to verify the in | |
4113 | * parameters, and fail the call with an error when appropriate | |
4114 | */ | |
4115 | uint16_t req_type; | |
4116 | /* This field returns the type of original request. */ | |
4117 | uint16_t seq_id; | |
4118 | /* This field provides original sequence number of the command. */ | |
4119 | uint16_t resp_len; | |
4120 | /* | |
4121 | * This field is the length of the response in bytes. The last | |
4122 | * byte of the response is a valid flag that will read as '1' | |
4123 | * when the command has been completely written to memory. | |
4124 | */ | |
4125 | uint32_t vnic_id; | |
4126 | /* Logical vnic ID */ | |
4127 | uint8_t unused_0; | |
4128 | uint8_t unused_1; | |
4129 | uint8_t unused_2; | |
4130 | uint8_t valid; | |
4131 | /* | |
4132 | * This field is used in Output records to indicate that the | |
4133 | * output is completely written to RAM. This field should be | |
4134 | * read as '1' to indicate that the output has been completely | |
4135 | * written. When writing a command completion or response to an | |
4136 | * internal processor, the order of writes has to be such that | |
4137 | * this field is written last. | |
4138 | */ | |
4139 | } __attribute__((packed)); | |
4140 | ||
4141 | /* hwrm_vnic_free */ | |
4142 | /* | |
4143 | * Description: Free a VNIC resource. Idle any resources associated with the | |
4144 | * VNIC as well as the VNIC. Reset and release all resources associated with the | |
4145 | * VNIC. | |
4146 | */ | |
4147 | /* Input (24 bytes) */ | |
4148 | struct hwrm_vnic_free_input { | |
4149 | uint16_t req_type; | |
4150 | /* | |
4151 | * This value indicates what type of request this is. The format | |
4152 | * for the rest of the command is determined by this field. | |
4153 | */ | |
4154 | uint16_t cmpl_ring; | |
4155 | /* | |
4156 | * This value indicates the what completion ring the request | |
4157 | * will be optionally completed on. If the value is -1, then no | |
4158 | * CR completion will be generated. Any other value must be a | |
4159 | * valid CR ring_id value for this function. | |
4160 | */ | |
4161 | uint16_t seq_id; | |
4162 | /* This value indicates the command sequence number. */ | |
4163 | uint16_t target_id; | |
4164 | /* | |
4165 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4166 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4167 | * - HWRM | |
4168 | */ | |
4169 | uint64_t resp_addr; | |
4170 | /* | |
4171 | * This is the host address where the response will be written | |
4172 | * when the request is complete. This area must be 16B aligned | |
4173 | * and must be cleared to zero before the request is made. | |
4174 | */ | |
4175 | uint32_t vnic_id; | |
4176 | /* Logical vnic ID */ | |
4177 | uint32_t unused_0; | |
4178 | } __attribute__((packed)); | |
4179 | ||
4180 | /* Output (16 bytes) */ | |
4181 | struct hwrm_vnic_free_output { | |
4182 | uint16_t error_code; | |
4183 | /* | |
4184 | * Pass/Fail or error type Note: receiver to verify the in | |
4185 | * parameters, and fail the call with an error when appropriate | |
4186 | */ | |
4187 | uint16_t req_type; | |
4188 | /* This field returns the type of original request. */ | |
4189 | uint16_t seq_id; | |
4190 | /* This field provides original sequence number of the command. */ | |
4191 | uint16_t resp_len; | |
4192 | /* | |
4193 | * This field is the length of the response in bytes. The last | |
4194 | * byte of the response is a valid flag that will read as '1' | |
4195 | * when the command has been completely written to memory. | |
4196 | */ | |
4197 | uint32_t unused_0; | |
4198 | uint8_t unused_1; | |
4199 | uint8_t unused_2; | |
4200 | uint8_t unused_3; | |
4201 | uint8_t valid; | |
4202 | /* | |
4203 | * This field is used in Output records to indicate that the | |
4204 | * output is completely written to RAM. This field should be | |
4205 | * read as '1' to indicate that the output has been completely | |
4206 | * written. When writing a command completion or response to an | |
4207 | * internal processor, the order of writes has to be such that | |
4208 | * this field is written last. | |
4209 | */ | |
4210 | } __attribute__((packed)); | |
4211 | ||
4212 | /* hwrm_vnic_cfg */ | |
4213 | /* Description: Configure the RX VNIC structure. */ | |
4214 | /* Input (40 bytes) */ | |
4215 | struct hwrm_vnic_cfg_input { | |
4216 | uint16_t req_type; | |
4217 | /* | |
4218 | * This value indicates what type of request this is. The format | |
4219 | * for the rest of the command is determined by this field. | |
4220 | */ | |
4221 | uint16_t cmpl_ring; | |
4222 | /* | |
4223 | * This value indicates the what completion ring the request | |
4224 | * will be optionally completed on. If the value is -1, then no | |
4225 | * CR completion will be generated. Any other value must be a | |
4226 | * valid CR ring_id value for this function. | |
4227 | */ | |
4228 | uint16_t seq_id; | |
4229 | /* This value indicates the command sequence number. */ | |
4230 | uint16_t target_id; | |
4231 | /* | |
4232 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4233 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4234 | * - HWRM | |
4235 | */ | |
4236 | uint64_t resp_addr; | |
4237 | /* | |
4238 | * This is the host address where the response will be written | |
4239 | * when the request is complete. This area must be 16B aligned | |
4240 | * and must be cleared to zero before the request is made. | |
4241 | */ | |
4242 | uint32_t flags; | |
4243 | /* | |
4244 | * When this bit is '1', the VNIC is requested to be the default | |
4245 | * VNIC for the function. | |
4246 | */ | |
4247 | #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1) | |
4248 | /* | |
4249 | * When this bit is '1', the VNIC is being configured to strip | |
4250 | * VLAN in the RX path. If set to '0', then VLAN stripping is | |
4251 | * disabled on this VNIC. | |
4252 | */ | |
4253 | #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2) | |
4254 | /* | |
4255 | * When this bit is '1', the VNIC is being configured to buffer | |
4256 | * receive packets in the hardware until the host posts new | |
4257 | * receive buffers. If set to '0', then bd_stall is being | |
4258 | * configured to be disabled on this VNIC. | |
4259 | */ | |
4260 | #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4) | |
4261 | /* | |
4262 | * When this bit is '1', the VNIC is being configured to receive | |
4263 | * both RoCE and non-RoCE traffic. If set to '0', then this VNIC | |
4264 | * is not configured to be operating in dual VNIC mode. | |
4265 | */ | |
4266 | #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8) | |
4267 | /* | |
4268 | * When this flag is set to '1', the VNIC is requested to be | |
4269 | * configured to receive only RoCE traffic. If this flag is set | |
4270 | * to '0', then this flag shall be ignored by the HWRM. If | |
4271 | * roce_dual_vnic_mode flag is set to '1', then the HWRM client | |
4272 | * shall not set this flag to '1'. | |
4273 | */ | |
4274 | #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10) | |
4275 | /* | |
4276 | * When a VNIC uses one destination ring group for certain | |
4277 | * application (e.g. Receive Flow Steering) where exact match is | |
4278 | * used to direct packets to a VNIC with one destination ring | |
4279 | * group only, there is no need to configure RSS indirection | |
4280 | * table for that VNIC as only one destination ring group is | |
4281 | * used. This flag is used to enable a mode where RSS is enabled | |
4282 | * in the VNIC using a RSS context for computing RSS hash but | |
4283 | * the RSS indirection table is not configured using | |
4284 | * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver | |
4285 | * should not program RSS indirection table for the RSS context | |
4286 | * that is used for computing RSS hash only. | |
4287 | */ | |
4288 | #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20) | |
4289 | uint32_t enables; | |
4290 | /* | |
4291 | * This bit must be '1' for the dflt_ring_grp field to be | |
4292 | * configured. | |
4293 | */ | |
4294 | #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1) | |
4295 | /* This bit must be '1' for the rss_rule field to be configured. */ | |
4296 | #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2) | |
4297 | /* This bit must be '1' for the cos_rule field to be configured. */ | |
4298 | #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4) | |
4299 | /* This bit must be '1' for the lb_rule field to be configured. */ | |
4300 | #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8) | |
4301 | /* This bit must be '1' for the mru field to be configured. */ | |
4302 | #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10) | |
4303 | uint16_t vnic_id; | |
4304 | /* Logical vnic ID */ | |
4305 | uint16_t dflt_ring_grp; | |
4306 | /* | |
4307 | * Default Completion ring for the VNIC. This ring will be | |
4308 | * chosen if packet does not match any RSS rules and if there is | |
4309 | * no COS rule. | |
4310 | */ | |
4311 | uint16_t rss_rule; | |
4312 | /* | |
4313 | * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if | |
4314 | * there is no RSS rule. | |
4315 | */ | |
4316 | uint16_t cos_rule; | |
4317 | /* | |
4318 | * RSS ID for COS rule/table structure. 0xFF... (All Fs) if | |
4319 | * there is no COS rule. | |
4320 | */ | |
4321 | uint16_t lb_rule; | |
4322 | /* | |
4323 | * RSS ID for load balancing rule/table structure. 0xFF... (All | |
4324 | * Fs) if there is no LB rule. | |
4325 | */ | |
4326 | uint16_t mru; | |
4327 | /* | |
4328 | * The maximum receive unit of the vnic. Each vnic is associated | |
4329 | * with a function. The vnic mru value overwrites the mru | |
4330 | * setting of the associated function. The HWRM shall make sure | |
4331 | * that vnic mru does not exceed the mru of the port the | |
4332 | * function is associated with. | |
4333 | */ | |
4334 | uint32_t unused_0; | |
4335 | } __attribute__((packed)); | |
4336 | ||
4337 | /* Output (16 bytes) */ | |
4338 | struct hwrm_vnic_cfg_output { | |
4339 | uint16_t error_code; | |
4340 | /* | |
4341 | * Pass/Fail or error type Note: receiver to verify the in | |
4342 | * parameters, and fail the call with an error when appropriate | |
4343 | */ | |
4344 | uint16_t req_type; | |
4345 | /* This field returns the type of original request. */ | |
4346 | uint16_t seq_id; | |
4347 | /* This field provides original sequence number of the command. */ | |
4348 | uint16_t resp_len; | |
4349 | /* | |
4350 | * This field is the length of the response in bytes. The last | |
4351 | * byte of the response is a valid flag that will read as '1' | |
4352 | * when the command has been completely written to memory. | |
4353 | */ | |
4354 | uint32_t unused_0; | |
4355 | uint8_t unused_1; | |
4356 | uint8_t unused_2; | |
4357 | uint8_t unused_3; | |
4358 | uint8_t valid; | |
4359 | /* | |
4360 | * This field is used in Output records to indicate that the | |
4361 | * output is completely written to RAM. This field should be | |
4362 | * read as '1' to indicate that the output has been completely | |
4363 | * written. When writing a command completion or response to an | |
4364 | * internal processor, the order of writes has to be such that | |
4365 | * this field is written last. | |
4366 | */ | |
4367 | } __attribute__((packed)); | |
4368 | ||
4369 | /* hwrm_vnic_rss_cfg */ | |
4370 | /* Description: This function is used to enable RSS configuration. */ | |
4371 | /* Input (48 bytes) */ | |
4372 | struct hwrm_vnic_rss_cfg_input { | |
4373 | uint16_t req_type; | |
4374 | /* | |
4375 | * This value indicates what type of request this is. The format | |
4376 | * for the rest of the command is determined by this field. | |
4377 | */ | |
4378 | uint16_t cmpl_ring; | |
4379 | /* | |
4380 | * This value indicates the what completion ring the request | |
4381 | * will be optionally completed on. If the value is -1, then no | |
4382 | * CR completion will be generated. Any other value must be a | |
4383 | * valid CR ring_id value for this function. | |
4384 | */ | |
4385 | uint16_t seq_id; | |
4386 | /* This value indicates the command sequence number. */ | |
4387 | uint16_t target_id; | |
4388 | /* | |
4389 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4390 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4391 | * - HWRM | |
4392 | */ | |
4393 | uint64_t resp_addr; | |
4394 | /* | |
4395 | * This is the host address where the response will be written | |
4396 | * when the request is complete. This area must be 16B aligned | |
4397 | * and must be cleared to zero before the request is made. | |
4398 | */ | |
4399 | uint32_t hash_type; | |
4400 | /* | |
4401 | * When this bit is '1', the RSS hash shall be computed over | |
4402 | * source and destination IPv4 addresses of IPv4 packets. | |
4403 | */ | |
4404 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1) | |
4405 | /* | |
4406 | * When this bit is '1', the RSS hash shall be computed over | |
4407 | * source/destination IPv4 addresses and source/destination | |
4408 | * ports of TCP/IPv4 packets. | |
4409 | */ | |
4410 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2) | |
4411 | /* | |
4412 | * When this bit is '1', the RSS hash shall be computed over | |
4413 | * source/destination IPv4 addresses and source/destination | |
4414 | * ports of UDP/IPv4 packets. | |
4415 | */ | |
4416 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4) | |
4417 | /* | |
4418 | * When this bit is '1', the RSS hash shall be computed over | |
4419 | * source and destination IPv4 addresses of IPv6 packets. | |
4420 | */ | |
4421 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8) | |
4422 | /* | |
4423 | * When this bit is '1', the RSS hash shall be computed over | |
4424 | * source/destination IPv6 addresses and source/destination | |
4425 | * ports of TCP/IPv6 packets. | |
4426 | */ | |
4427 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10) | |
4428 | /* | |
4429 | * When this bit is '1', the RSS hash shall be computed over | |
4430 | * source/destination IPv6 addresses and source/destination | |
4431 | * ports of UDP/IPv6 packets. | |
4432 | */ | |
4433 | #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20) | |
4434 | uint32_t unused_0; | |
4435 | uint64_t ring_grp_tbl_addr; | |
4436 | /* This is the address for rss ring group table */ | |
4437 | uint64_t hash_key_tbl_addr; | |
4438 | /* This is the address for rss hash key table */ | |
4439 | uint16_t rss_ctx_idx; | |
4440 | /* Index to the rss indirection table. */ | |
4441 | uint16_t unused_1[3]; | |
4442 | } __attribute__((packed)); | |
4443 | ||
4444 | /* Output (16 bytes) */ | |
4445 | struct hwrm_vnic_rss_cfg_output { | |
4446 | uint16_t error_code; | |
4447 | /* | |
4448 | * Pass/Fail or error type Note: receiver to verify the in | |
4449 | * parameters, and fail the call with an error when appropriate | |
4450 | */ | |
4451 | uint16_t req_type; | |
4452 | /* This field returns the type of original request. */ | |
4453 | uint16_t seq_id; | |
4454 | /* This field provides original sequence number of the command. */ | |
4455 | uint16_t resp_len; | |
4456 | /* | |
4457 | * This field is the length of the response in bytes. The last | |
4458 | * byte of the response is a valid flag that will read as '1' | |
4459 | * when the command has been completely written to memory. | |
4460 | */ | |
4461 | uint32_t unused_0; | |
4462 | uint8_t unused_1; | |
4463 | uint8_t unused_2; | |
4464 | uint8_t unused_3; | |
4465 | uint8_t valid; | |
4466 | /* | |
4467 | * This field is used in Output records to indicate that the | |
4468 | * output is completely written to RAM. This field should be | |
4469 | * read as '1' to indicate that the output has been completely | |
4470 | * written. When writing a command completion or response to an | |
4471 | * internal processor, the order of writes has to be such that | |
4472 | * this field is written last. | |
4473 | */ | |
4474 | } __attribute__((packed)); | |
4475 | ||
4476 | /* hwrm_vnic_rss_cos_lb_ctx_alloc */ | |
4477 | /* Description: This function is used to allocate COS/Load Balance context. */ | |
4478 | /* Input (16 bytes) */ | |
4479 | struct hwrm_vnic_rss_cos_lb_ctx_alloc_input { | |
4480 | uint16_t req_type; | |
4481 | /* | |
4482 | * This value indicates what type of request this is. The format | |
4483 | * for the rest of the command is determined by this field. | |
4484 | */ | |
4485 | uint16_t cmpl_ring; | |
4486 | /* | |
4487 | * This value indicates the what completion ring the request | |
4488 | * will be optionally completed on. If the value is -1, then no | |
4489 | * CR completion will be generated. Any other value must be a | |
4490 | * valid CR ring_id value for this function. | |
4491 | */ | |
4492 | uint16_t seq_id; | |
4493 | /* This value indicates the command sequence number. */ | |
4494 | uint16_t target_id; | |
4495 | /* | |
4496 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4497 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4498 | * - HWRM | |
4499 | */ | |
4500 | uint64_t resp_addr; | |
4501 | /* | |
4502 | * This is the host address where the response will be written | |
4503 | * when the request is complete. This area must be 16B aligned | |
4504 | * and must be cleared to zero before the request is made. | |
4505 | */ | |
4506 | } __attribute__((packed)); | |
4507 | ||
4508 | /* Output (16 bytes) */ | |
4509 | struct hwrm_vnic_rss_cos_lb_ctx_alloc_output { | |
4510 | uint16_t error_code; | |
4511 | /* | |
4512 | * Pass/Fail or error type Note: receiver to verify the in | |
4513 | * parameters, and fail the call with an error when appropriate | |
4514 | */ | |
4515 | uint16_t req_type; | |
4516 | /* This field returns the type of original request. */ | |
4517 | uint16_t seq_id; | |
4518 | /* This field provides original sequence number of the command. */ | |
4519 | uint16_t resp_len; | |
4520 | /* | |
4521 | * This field is the length of the response in bytes. The last | |
4522 | * byte of the response is a valid flag that will read as '1' | |
4523 | * when the command has been completely written to memory. | |
4524 | */ | |
4525 | uint16_t rss_cos_lb_ctx_id; | |
4526 | /* rss_cos_lb_ctx_id is 16 b */ | |
4527 | uint8_t unused_0; | |
4528 | uint8_t unused_1; | |
4529 | uint8_t unused_2; | |
4530 | uint8_t unused_3; | |
4531 | uint8_t unused_4; | |
4532 | uint8_t valid; | |
4533 | /* | |
4534 | * This field is used in Output records to indicate that the | |
4535 | * output is completely written to RAM. This field should be | |
4536 | * read as '1' to indicate that the output has been completely | |
4537 | * written. When writing a command completion or response to an | |
4538 | * internal processor, the order of writes has to be such that | |
4539 | * this field is written last. | |
4540 | */ | |
4541 | } __attribute__((packed)); | |
4542 | ||
4543 | /* hwrm_vnic_rss_cos_lb_ctx_free */ | |
4544 | /* Description: This function can be used to free COS/Load Balance context. */ | |
4545 | /* Input (24 bytes) */ | |
4546 | struct hwrm_vnic_rss_cos_lb_ctx_free_input { | |
4547 | uint16_t req_type; | |
4548 | /* | |
4549 | * This value indicates what type of request this is. The format | |
4550 | * for the rest of the command is determined by this field. | |
4551 | */ | |
4552 | uint16_t cmpl_ring; | |
4553 | /* | |
4554 | * This value indicates the what completion ring the request | |
4555 | * will be optionally completed on. If the value is -1, then no | |
4556 | * CR completion will be generated. Any other value must be a | |
4557 | * valid CR ring_id value for this function. | |
4558 | */ | |
4559 | uint16_t seq_id; | |
4560 | /* This value indicates the command sequence number. */ | |
4561 | uint16_t target_id; | |
4562 | /* | |
4563 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4564 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4565 | * - HWRM | |
4566 | */ | |
4567 | uint64_t resp_addr; | |
4568 | /* | |
4569 | * This is the host address where the response will be written | |
4570 | * when the request is complete. This area must be 16B aligned | |
4571 | * and must be cleared to zero before the request is made. | |
4572 | */ | |
4573 | uint16_t rss_cos_lb_ctx_id; | |
4574 | /* rss_cos_lb_ctx_id is 16 b */ | |
4575 | uint16_t unused_0[3]; | |
4576 | } __attribute__((packed)); | |
4577 | ||
4578 | /* Output (16 bytes) */ | |
4579 | struct hwrm_vnic_rss_cos_lb_ctx_free_output { | |
4580 | uint16_t error_code; | |
4581 | /* | |
4582 | * Pass/Fail or error type Note: receiver to verify the in | |
4583 | * parameters, and fail the call with an error when appropriate | |
4584 | */ | |
4585 | uint16_t req_type; | |
4586 | /* This field returns the type of original request. */ | |
4587 | uint16_t seq_id; | |
4588 | /* This field provides original sequence number of the command. */ | |
4589 | uint16_t resp_len; | |
4590 | /* | |
4591 | * This field is the length of the response in bytes. The last | |
4592 | * byte of the response is a valid flag that will read as '1' | |
4593 | * when the command has been completely written to memory. | |
4594 | */ | |
4595 | uint32_t unused_0; | |
4596 | uint8_t unused_1; | |
4597 | uint8_t unused_2; | |
4598 | uint8_t unused_3; | |
4599 | uint8_t valid; | |
4600 | /* | |
4601 | * This field is used in Output records to indicate that the | |
4602 | * output is completely written to RAM. This field should be | |
4603 | * read as '1' to indicate that the output has been completely | |
4604 | * written. When writing a command completion or response to an | |
4605 | * internal processor, the order of writes has to be such that | |
4606 | * this field is written last. | |
4607 | */ | |
4608 | } __attribute__((packed)); | |
4609 | ||
4610 | /* hwrm_ring_alloc */ | |
4611 | /* | |
4612 | * Description: This command allocates and does basic preparation for a ring. | |
4613 | */ | |
4614 | /* Input (80 bytes) */ | |
4615 | struct hwrm_ring_alloc_input { | |
4616 | uint16_t req_type; | |
4617 | /* | |
4618 | * This value indicates what type of request this is. The format | |
4619 | * for the rest of the command is determined by this field. | |
4620 | */ | |
4621 | uint16_t cmpl_ring; | |
4622 | /* | |
4623 | * This value indicates the what completion ring the request | |
4624 | * will be optionally completed on. If the value is -1, then no | |
4625 | * CR completion will be generated. Any other value must be a | |
4626 | * valid CR ring_id value for this function. | |
4627 | */ | |
4628 | uint16_t seq_id; | |
4629 | /* This value indicates the command sequence number. */ | |
4630 | uint16_t target_id; | |
4631 | /* | |
4632 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4633 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4634 | * - HWRM | |
4635 | */ | |
4636 | uint64_t resp_addr; | |
4637 | /* | |
4638 | * This is the host address where the response will be written | |
4639 | * when the request is complete. This area must be 16B aligned | |
4640 | * and must be cleared to zero before the request is made. | |
4641 | */ | |
4642 | uint32_t enables; | |
4643 | /* This bit must be '1' for the Reserved1 field to be configured. */ | |
4644 | #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1) | |
4645 | /* This bit must be '1' for the ring_arb_cfg field to be configured. */ | |
4646 | #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2) | |
4647 | /* This bit must be '1' for the Reserved3 field to be configured. */ | |
4648 | #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4) | |
4649 | /* | |
4650 | * This bit must be '1' for the stat_ctx_id_valid field to be | |
4651 | * configured. | |
4652 | */ | |
4653 | #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8) | |
4654 | /* This bit must be '1' for the Reserved4 field to be configured. */ | |
4655 | #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10) | |
4656 | /* This bit must be '1' for the max_bw_valid field to be configured. */ | |
4657 | #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20) | |
4658 | uint8_t ring_type; | |
4659 | /* Ring Type. */ | |
4660 | /* Completion Ring (CR) */ | |
4661 | #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL UINT32_C(0x0) | |
4662 | /* TX Ring (TR) */ | |
4663 | #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1) | |
4664 | /* RX Ring (RR) */ | |
4665 | #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2) | |
4666 | uint8_t unused_0; | |
4667 | uint16_t unused_1; | |
4668 | uint64_t page_tbl_addr; | |
4669 | /* This value is a pointer to the page table for the Ring. */ | |
4670 | uint32_t fbo; | |
4671 | /* First Byte Offset of the first entry in the first page. */ | |
4672 | uint8_t page_size; | |
4673 | /* | |
4674 | * Actual page size in 2^page_size. The supported range is | |
4675 | * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B | |
4676 | * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB | |
4677 | * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2 | |
4678 | * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1 | |
4679 | * GB Page size is 1 GB. | |
4680 | */ | |
4681 | uint8_t page_tbl_depth; | |
4682 | /* | |
4683 | * This value indicates the depth of page table. For this | |
4684 | * version of the specification, value other than 0 or 1 shall | |
4685 | * be considered as an invalid value. When the page_tbl_depth = | |
4686 | * 0, then it is treated as a special case with the following. | |
4687 | * 1. FBO and page size fields are not valid. 2. page_tbl_addr | |
4688 | * is the physical address of the first element of the ring. | |
4689 | */ | |
4690 | uint8_t unused_2; | |
4691 | uint8_t unused_3; | |
4692 | uint32_t length; | |
4693 | /* | |
4694 | * Number of 16B units in the ring. Minimum size for a ring is | |
4695 | * 16 16B entries. | |
4696 | */ | |
4697 | uint16_t logical_id; | |
4698 | /* | |
4699 | * Logical ring number for the ring to be allocated. This value | |
4700 | * determines the position in the doorbell area where the update | |
4701 | * to the ring will be made. For completion rings, this value is | |
4702 | * also the MSI-X vector number for the function the completion | |
4703 | * ring is associated with. | |
4704 | */ | |
4705 | uint16_t cmpl_ring_id; | |
4706 | /* | |
4707 | * This field is used only when ring_type is a TX ring. This | |
4708 | * value indicates what completion ring the TX ring is | |
4709 | * associated with. | |
4710 | */ | |
4711 | uint16_t queue_id; | |
4712 | /* | |
4713 | * This field is used only when ring_type is a TX ring. This | |
4714 | * value indicates what CoS queue the TX ring is associated | |
4715 | * with. | |
4716 | */ | |
4717 | uint8_t unused_4; | |
4718 | uint8_t unused_5; | |
4719 | uint32_t reserved1; | |
4720 | /* This field is reserved for the future use. It shall be set to 0. */ | |
4721 | uint16_t ring_arb_cfg; | |
4722 | /* | |
4723 | * This field is used only when ring_type is a TX ring. This | |
4724 | * field is used to configure arbitration related parameters for | |
4725 | * a TX ring. | |
4726 | */ | |
4727 | /* Arbitration policy used for the ring. */ | |
4728 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK \ | |
4729 | UINT32_C(0xf) | |
4730 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0 | |
4731 | /* | |
4732 | * Use strict priority for the TX ring. Priority | |
4733 | * value is specified in arb_policy_param | |
4734 | */ | |
4735 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \ | |
4736 | (UINT32_C(0x1) << 0) | |
4737 | /* | |
4738 | * Use weighted fair queue arbitration for the | |
4739 | * TX ring. Weight is specified in | |
4740 | * arb_policy_param | |
4741 | */ | |
4742 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \ | |
4743 | (UINT32_C(0x2) << 0) | |
4744 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \ | |
4745 | RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ | |
4746 | /* Reserved field. */ | |
4747 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0) | |
4748 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4 | |
4749 | /* | |
4750 | * Arbitration policy specific parameter. # For strict priority | |
4751 | * arbitration policy, this field represents a priority value. | |
4752 | * If set to 0, then the priority is not specified and the HWRM | |
4753 | * is allowed to select any priority for this TX ring. # For | |
4754 | * weighted fair queue arbitration policy, this field represents | |
4755 | * a weight value. If set to 0, then the weight is not specified | |
4756 | * and the HWRM is allowed to select any weight for this TX | |
4757 | * ring. | |
4758 | */ | |
4759 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \ | |
4760 | UINT32_C(0xff00) | |
4761 | #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8 | |
4762 | uint8_t unused_6; | |
4763 | uint8_t unused_7; | |
4764 | uint32_t reserved3; | |
4765 | /* This field is reserved for the future use. It shall be set to 0. */ | |
4766 | uint32_t stat_ctx_id; | |
4767 | /* | |
4768 | * This field is used only when ring_type is a TX ring. This | |
4769 | * input indicates what statistics context this ring should be | |
4770 | * associated with. | |
4771 | */ | |
4772 | uint32_t reserved4; | |
4773 | /* This field is reserved for the future use. It shall be set to 0. */ | |
4774 | uint32_t max_bw; | |
4775 | /* | |
4776 | * This field is used only when ring_type is a TX ring to | |
4777 | * specify maximum BW allocated to the TX ring. The HWRM will | |
4778 | * translate this value into byte counter and time interval used | |
4779 | * for this ring inside the device. | |
4780 | */ | |
4781 | /* Bandwidth value */ | |
4782 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK \ | |
4783 | UINT32_C(0xfffffff) | |
4784 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0 | |
4785 | /* Reserved */ | |
4786 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_RSVD UINT32_C(0x10000000) | |
4787 | /* bw_value_unit is 3 b */ | |
4788 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \ | |
4789 | UINT32_C(0xe0000000) | |
4790 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29 | |
4791 | /* Value is in Mbps */ | |
4792 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MBPS \ | |
4793 | (UINT32_C(0x0) << 29) | |
4794 | /* Value is in 1/100th of a percentage of total bandwidth. */ | |
4795 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \ | |
4796 | (UINT32_C(0x1) << 29) | |
4797 | /* Invalid unit */ | |
4798 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \ | |
4799 | (UINT32_C(0x7) << 29) | |
4800 | #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \ | |
4801 | RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID | |
4802 | uint8_t int_mode; | |
4803 | /* | |
4804 | * This field is used only when ring_type is a Completion ring. | |
4805 | * This value indicates what interrupt mode should be used on | |
4806 | * this completion ring. Note: In the legacy interrupt mode, no | |
4807 | * more than 16 completion rings are allowed. | |
4808 | */ | |
4809 | /* Legacy INTA */ | |
4810 | #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0) | |
4811 | /* Reserved */ | |
4812 | #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1) | |
4813 | /* MSI-X */ | |
4814 | #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2) | |
4815 | /* No Interrupt - Polled mode */ | |
4816 | #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3) | |
4817 | uint8_t unused_8[3]; | |
4818 | } __attribute__((packed)); | |
4819 | ||
4820 | /* Output (16 bytes) */ | |
4821 | struct hwrm_ring_alloc_output { | |
4822 | uint16_t error_code; | |
4823 | /* | |
4824 | * Pass/Fail or error type Note: receiver to verify the in | |
4825 | * parameters, and fail the call with an error when appropriate | |
4826 | */ | |
4827 | uint16_t req_type; | |
4828 | /* This field returns the type of original request. */ | |
4829 | uint16_t seq_id; | |
4830 | /* This field provides original sequence number of the command. */ | |
4831 | uint16_t resp_len; | |
4832 | /* | |
4833 | * This field is the length of the response in bytes. The last | |
4834 | * byte of the response is a valid flag that will read as '1' | |
4835 | * when the command has been completely written to memory. | |
4836 | */ | |
4837 | uint16_t ring_id; | |
4838 | /* | |
4839 | * Physical number of ring allocated. This value shall be unique | |
4840 | * for a ring type. | |
4841 | */ | |
4842 | uint16_t logical_ring_id; | |
4843 | /* Logical number of ring allocated. */ | |
4844 | uint8_t unused_0; | |
4845 | uint8_t unused_1; | |
4846 | uint8_t unused_2; | |
4847 | uint8_t valid; | |
4848 | /* | |
4849 | * This field is used in Output records to indicate that the | |
4850 | * output is completely written to RAM. This field should be | |
4851 | * read as '1' to indicate that the output has been completely | |
4852 | * written. When writing a command completion or response to an | |
4853 | * internal processor, the order of writes has to be such that | |
4854 | * this field is written last. | |
4855 | */ | |
4856 | } __attribute__((packed)); | |
4857 | ||
4858 | /* hwrm_ring_free */ | |
4859 | /* | |
4860 | * Description: This command is used to free a ring and associated resources. | |
4861 | */ | |
4862 | /* Input (24 bytes) */ | |
4863 | struct hwrm_ring_free_input { | |
4864 | uint16_t req_type; | |
4865 | /* | |
4866 | * This value indicates what type of request this is. The format | |
4867 | * for the rest of the command is determined by this field. | |
4868 | */ | |
4869 | uint16_t cmpl_ring; | |
4870 | /* | |
4871 | * This value indicates the what completion ring the request | |
4872 | * will be optionally completed on. If the value is -1, then no | |
4873 | * CR completion will be generated. Any other value must be a | |
4874 | * valid CR ring_id value for this function. | |
4875 | */ | |
4876 | uint16_t seq_id; | |
4877 | /* This value indicates the command sequence number. */ | |
4878 | uint16_t target_id; | |
4879 | /* | |
4880 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4881 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4882 | * - HWRM | |
4883 | */ | |
4884 | uint64_t resp_addr; | |
4885 | /* | |
4886 | * This is the host address where the response will be written | |
4887 | * when the request is complete. This area must be 16B aligned | |
4888 | * and must be cleared to zero before the request is made. | |
4889 | */ | |
4890 | uint8_t ring_type; | |
4891 | /* Ring Type. */ | |
4892 | /* Completion Ring (CR) */ | |
4893 | #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL UINT32_C(0x0) | |
4894 | /* TX Ring (TR) */ | |
4895 | #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1) | |
4896 | /* RX Ring (RR) */ | |
4897 | #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2) | |
4898 | uint8_t unused_0; | |
4899 | uint16_t ring_id; | |
4900 | /* Physical number of ring allocated. */ | |
4901 | uint32_t unused_1; | |
4902 | } __attribute__((packed)); | |
4903 | ||
4904 | /* Output (16 bytes) */ | |
4905 | struct hwrm_ring_free_output { | |
4906 | uint16_t error_code; | |
4907 | /* | |
4908 | * Pass/Fail or error type Note: receiver to verify the in | |
4909 | * parameters, and fail the call with an error when appropriate | |
4910 | */ | |
4911 | uint16_t req_type; | |
4912 | /* This field returns the type of original request. */ | |
4913 | uint16_t seq_id; | |
4914 | /* This field provides original sequence number of the command. */ | |
4915 | uint16_t resp_len; | |
4916 | /* | |
4917 | * This field is the length of the response in bytes. The last | |
4918 | * byte of the response is a valid flag that will read as '1' | |
4919 | * when the command has been completely written to memory. | |
4920 | */ | |
4921 | uint32_t unused_0; | |
4922 | uint8_t unused_1; | |
4923 | uint8_t unused_2; | |
4924 | uint8_t unused_3; | |
4925 | uint8_t valid; | |
4926 | /* | |
4927 | * This field is used in Output records to indicate that the | |
4928 | * output is completely written to RAM. This field should be | |
4929 | * read as '1' to indicate that the output has been completely | |
4930 | * written. When writing a command completion or response to an | |
4931 | * internal processor, the order of writes has to be such that | |
4932 | * this field is written last. | |
4933 | */ | |
4934 | } __attribute__((packed)); | |
4935 | ||
4936 | /* hwrm_ring_grp_alloc */ | |
4937 | /* | |
4938 | * Description: This API allocates and does basic preparation for a ring group. | |
4939 | */ | |
4940 | /* Input (24 bytes) */ | |
4941 | struct hwrm_ring_grp_alloc_input { | |
4942 | uint16_t req_type; | |
4943 | /* | |
4944 | * This value indicates what type of request this is. The format | |
4945 | * for the rest of the command is determined by this field. | |
4946 | */ | |
4947 | uint16_t cmpl_ring; | |
4948 | /* | |
4949 | * This value indicates the what completion ring the request | |
4950 | * will be optionally completed on. If the value is -1, then no | |
4951 | * CR completion will be generated. Any other value must be a | |
4952 | * valid CR ring_id value for this function. | |
4953 | */ | |
4954 | uint16_t seq_id; | |
4955 | /* This value indicates the command sequence number. */ | |
4956 | uint16_t target_id; | |
4957 | /* | |
4958 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
4959 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
4960 | * - HWRM | |
4961 | */ | |
4962 | uint64_t resp_addr; | |
4963 | /* | |
4964 | * This is the host address where the response will be written | |
4965 | * when the request is complete. This area must be 16B aligned | |
4966 | * and must be cleared to zero before the request is made. | |
4967 | */ | |
4968 | uint16_t cr; | |
4969 | /* This value identifies the CR associated with the ring group. */ | |
4970 | uint16_t rr; | |
4971 | /* This value identifies the main RR associated with the ring group. */ | |
4972 | uint16_t ar; | |
4973 | /* | |
4974 | * This value identifies the aggregation RR associated with the | |
4975 | * ring group. If this value is 0xFF... (All Fs), then no | |
4976 | * Aggregation ring will be set. | |
4977 | */ | |
4978 | uint16_t sc; | |
4979 | /* | |
4980 | * This value identifies the statistics context associated with | |
4981 | * the ring group. | |
4982 | */ | |
4983 | } __attribute__((packed)); | |
4984 | ||
4985 | /* Output (16 bytes) */ | |
4986 | struct hwrm_ring_grp_alloc_output { | |
4987 | uint16_t error_code; | |
4988 | /* | |
4989 | * Pass/Fail or error type Note: receiver to verify the in | |
4990 | * parameters, and fail the call with an error when appropriate | |
4991 | */ | |
4992 | uint16_t req_type; | |
4993 | /* This field returns the type of original request. */ | |
4994 | uint16_t seq_id; | |
4995 | /* This field provides original sequence number of the command. */ | |
4996 | uint16_t resp_len; | |
4997 | /* | |
4998 | * This field is the length of the response in bytes. The last | |
4999 | * byte of the response is a valid flag that will read as '1' | |
5000 | * when the command has been completely written to memory. | |
5001 | */ | |
5002 | uint32_t ring_group_id; | |
5003 | /* | |
5004 | * This is the ring group ID value. Use this value to program | |
5005 | * the default ring group for the VNIC or as table entries in an | |
5006 | * RSS/COS context. | |
5007 | */ | |
5008 | uint8_t unused_0; | |
5009 | uint8_t unused_1; | |
5010 | uint8_t unused_2; | |
5011 | uint8_t valid; | |
5012 | /* | |
5013 | * This field is used in Output records to indicate that the | |
5014 | * output is completely written to RAM. This field should be | |
5015 | * read as '1' to indicate that the output has been completely | |
5016 | * written. When writing a command completion or response to an | |
5017 | * internal processor, the order of writes has to be such that | |
5018 | * this field is written last. | |
5019 | */ | |
5020 | } __attribute__((packed)); | |
5021 | ||
5022 | /* hwrm_ring_grp_free */ | |
5023 | /* | |
5024 | * Description: This API frees a ring group and associated resources. # If a | |
5025 | * ring in the ring group is reset or free, then the associated rings in the | |
5026 | * ring group shall also be reset/free using hwrm_ring_free. # A function driver | |
5027 | * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As | |
5028 | * a part of executing this command, the HWRM shall reset all associated ring | |
5029 | * group resources. | |
5030 | */ | |
5031 | /* Input (24 bytes) */ | |
5032 | struct hwrm_ring_grp_free_input { | |
5033 | uint16_t req_type; | |
5034 | /* | |
5035 | * This value indicates what type of request this is. The format | |
5036 | * for the rest of the command is determined by this field. | |
5037 | */ | |
5038 | uint16_t cmpl_ring; | |
5039 | /* | |
5040 | * This value indicates the what completion ring the request | |
5041 | * will be optionally completed on. If the value is -1, then no | |
5042 | * CR completion will be generated. Any other value must be a | |
5043 | * valid CR ring_id value for this function. | |
5044 | */ | |
5045 | uint16_t seq_id; | |
5046 | /* This value indicates the command sequence number. */ | |
5047 | uint16_t target_id; | |
5048 | /* | |
5049 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5050 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5051 | * - HWRM | |
5052 | */ | |
5053 | uint64_t resp_addr; | |
5054 | /* | |
5055 | * This is the host address where the response will be written | |
5056 | * when the request is complete. This area must be 16B aligned | |
5057 | * and must be cleared to zero before the request is made. | |
5058 | */ | |
5059 | uint32_t ring_group_id; | |
5060 | /* This is the ring group ID value. */ | |
5061 | uint32_t unused_0; | |
5062 | } __attribute__((packed)); | |
5063 | ||
5064 | /* Output (16 bytes) */ | |
5065 | struct hwrm_ring_grp_free_output { | |
5066 | uint16_t error_code; | |
5067 | /* | |
5068 | * Pass/Fail or error type Note: receiver to verify the in | |
5069 | * parameters, and fail the call with an error when appropriate | |
5070 | */ | |
5071 | uint16_t req_type; | |
5072 | /* This field returns the type of original request. */ | |
5073 | uint16_t seq_id; | |
5074 | /* This field provides original sequence number of the command. */ | |
5075 | uint16_t resp_len; | |
5076 | /* | |
5077 | * This field is the length of the response in bytes. The last | |
5078 | * byte of the response is a valid flag that will read as '1' | |
5079 | * when the command has been completely written to memory. | |
5080 | */ | |
5081 | uint32_t unused_0; | |
5082 | uint8_t unused_1; | |
5083 | uint8_t unused_2; | |
5084 | uint8_t unused_3; | |
5085 | uint8_t valid; | |
5086 | /* | |
5087 | * This field is used in Output records to indicate that the | |
5088 | * output is completely written to RAM. This field should be | |
5089 | * read as '1' to indicate that the output has been completely | |
5090 | * written. When writing a command completion or response to an | |
5091 | * internal processor, the order of writes has to be such that | |
5092 | * this field is written last. | |
5093 | */ | |
5094 | } __attribute__((packed)); | |
5095 | ||
5096 | /* hwrm_cfa_l2_filter_alloc */ | |
5097 | /* | |
5098 | * A filter is used to identify traffic that contains a matching set of | |
5099 | * parameters like unicast or broadcast MAC address or a VLAN tag amongst | |
5100 | * other things which then allows the ASIC to direct the incoming traffic | |
5101 | * to an appropriate VNIC or Rx ring. | |
5102 | */ | |
5103 | /* Input (96 bytes) */ | |
5104 | struct hwrm_cfa_l2_filter_alloc_input { | |
5105 | uint16_t req_type; | |
5106 | /* | |
5107 | * This value indicates what type of request this is. The format | |
5108 | * for the rest of the command is determined by this field. | |
5109 | */ | |
5110 | uint16_t cmpl_ring; | |
5111 | /* | |
5112 | * This value indicates the what completion ring the request | |
5113 | * will be optionally completed on. If the value is -1, then no | |
5114 | * CR completion will be generated. Any other value must be a | |
5115 | * valid CR ring_id value for this function. | |
5116 | */ | |
5117 | uint16_t seq_id; | |
5118 | /* This value indicates the command sequence number. */ | |
5119 | uint16_t target_id; | |
5120 | /* | |
5121 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5122 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5123 | * - HWRM | |
5124 | */ | |
5125 | uint64_t resp_addr; | |
5126 | /* | |
5127 | * This is the host address where the response will be written | |
5128 | * when the request is complete. This area must be 16B aligned | |
5129 | * and must be cleared to zero before the request is made. | |
5130 | */ | |
5131 | uint32_t flags; | |
5132 | /* | |
5133 | * Enumeration denoting the RX, TX type of the resource. This | |
5134 | * enumeration is used for resources that are similar for both | |
5135 | * TX and RX paths of the chip. | |
5136 | */ | |
5137 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1) | |
5138 | /* tx path */ | |
5139 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0) | |
5140 | /* rx path */ | |
5141 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0) | |
5142 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \ | |
5143 | CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX | |
5144 | /* | |
5145 | * Setting of this flag indicates the applicability to the | |
5146 | * loopback path. | |
5147 | */ | |
5148 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2) | |
5149 | /* | |
5150 | * Setting of this flag indicates drop action. If this flag is | |
5151 | * not set, then it should be considered accept action. | |
5152 | */ | |
5153 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4) | |
5154 | /* | |
5155 | * If this flag is set, all t_l2_* fields are invalid and they | |
5156 | * should not be specified. If this flag is set, then l2_* | |
5157 | * fields refer to fields of outermost L2 header. | |
5158 | */ | |
5159 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8) | |
5160 | uint32_t enables; | |
5161 | /* This bit must be '1' for the l2_addr field to be configured. */ | |
5162 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1) | |
5163 | /* This bit must be '1' for the l2_addr_mask field to be configured. */ | |
5164 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK UINT32_C(0x2) | |
5165 | /* This bit must be '1' for the l2_ovlan field to be configured. */ | |
5166 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4) | |
5167 | /* | |
5168 | * This bit must be '1' for the l2_ovlan_mask field to be | |
5169 | * configured. | |
5170 | */ | |
5171 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK UINT32_C(0x8) | |
5172 | /* This bit must be '1' for the l2_ivlan field to be configured. */ | |
5173 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10) | |
5174 | /* | |
5175 | * This bit must be '1' for the l2_ivlan_mask field to be | |
5176 | * configured. | |
5177 | */ | |
5178 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK UINT32_C(0x20) | |
5179 | /* This bit must be '1' for the t_l2_addr field to be configured. */ | |
5180 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40) | |
5181 | /* | |
5182 | * This bit must be '1' for the t_l2_addr_mask field to be | |
5183 | * configured. | |
5184 | */ | |
5185 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK UINT32_C(0x80) | |
5186 | /* This bit must be '1' for the t_l2_ovlan field to be configured. */ | |
5187 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN UINT32_C(0x100) | |
5188 | /* | |
5189 | * This bit must be '1' for the t_l2_ovlan_mask field to be | |
5190 | * configured. | |
5191 | */ | |
5192 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK UINT32_C(0x200) | |
5193 | /* This bit must be '1' for the t_l2_ivlan field to be configured. */ | |
5194 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN UINT32_C(0x400) | |
5195 | /* | |
5196 | * This bit must be '1' for the t_l2_ivlan_mask field to be | |
5197 | * configured. | |
5198 | */ | |
5199 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK UINT32_C(0x800) | |
5200 | /* This bit must be '1' for the src_type field to be configured. */ | |
5201 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000) | |
5202 | /* This bit must be '1' for the src_id field to be configured. */ | |
5203 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000) | |
5204 | /* This bit must be '1' for the tunnel_type field to be configured. */ | |
5205 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x4000) | |
5206 | /* This bit must be '1' for the dst_id field to be configured. */ | |
5207 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000) | |
5208 | /* | |
5209 | * This bit must be '1' for the mirror_vnic_id field to be | |
5210 | * configured. | |
5211 | */ | |
5212 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x10000) | |
5213 | uint8_t l2_addr[6]; | |
5214 | /* | |
5215 | * This value sets the match value for the L2 MAC address. | |
5216 | * Destination MAC address for RX path. Source MAC address for | |
5217 | * TX path. | |
5218 | */ | |
5219 | uint8_t unused_0; | |
5220 | uint8_t unused_1; | |
5221 | uint8_t l2_addr_mask[6]; | |
5222 | /* | |
5223 | * This value sets the mask value for the L2 address. A value of | |
5224 | * 0 will mask the corresponding bit from compare. | |
5225 | */ | |
5226 | uint16_t l2_ovlan; | |
5227 | /* This value sets VLAN ID value for outer VLAN. */ | |
5228 | uint16_t l2_ovlan_mask; | |
5229 | /* | |
5230 | * This value sets the mask value for the ovlan id. A value of 0 | |
5231 | * will mask the corresponding bit from compare. | |
5232 | */ | |
5233 | uint16_t l2_ivlan; | |
5234 | /* This value sets VLAN ID value for inner VLAN. */ | |
5235 | uint16_t l2_ivlan_mask; | |
5236 | /* | |
5237 | * This value sets the mask value for the ivlan id. A value of 0 | |
5238 | * will mask the corresponding bit from compare. | |
5239 | */ | |
5240 | uint8_t unused_2; | |
5241 | uint8_t unused_3; | |
5242 | uint8_t t_l2_addr[6]; | |
5243 | /* | |
5244 | * This value sets the match value for the tunnel L2 MAC | |
5245 | * address. Destination MAC address for RX path. Source MAC | |
5246 | * address for TX path. | |
5247 | */ | |
5248 | uint8_t unused_4; | |
5249 | uint8_t unused_5; | |
5250 | uint8_t t_l2_addr_mask[6]; | |
5251 | /* | |
5252 | * This value sets the mask value for the tunnel L2 address. A | |
5253 | * value of 0 will mask the corresponding bit from compare. | |
5254 | */ | |
5255 | uint16_t t_l2_ovlan; | |
5256 | /* This value sets VLAN ID value for tunnel outer VLAN. */ | |
5257 | uint16_t t_l2_ovlan_mask; | |
5258 | /* | |
5259 | * This value sets the mask value for the tunnel ovlan id. A | |
5260 | * value of 0 will mask the corresponding bit from compare. | |
5261 | */ | |
5262 | uint16_t t_l2_ivlan; | |
5263 | /* This value sets VLAN ID value for tunnel inner VLAN. */ | |
5264 | uint16_t t_l2_ivlan_mask; | |
5265 | /* | |
5266 | * This value sets the mask value for the tunnel ivlan id. A | |
5267 | * value of 0 will mask the corresponding bit from compare. | |
5268 | */ | |
5269 | uint8_t src_type; | |
5270 | /* This value identifies the type of source of the packet. */ | |
5271 | /* Network port */ | |
5272 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0) | |
5273 | /* Physical function */ | |
5274 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1) | |
5275 | /* Virtual function */ | |
5276 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2) | |
5277 | /* Virtual NIC of a function */ | |
5278 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3) | |
5279 | /* Embedded processor for CFA management */ | |
5280 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4) | |
5281 | /* Embedded processor for OOB management */ | |
5282 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5) | |
5283 | /* Embedded processor for RoCE */ | |
5284 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6) | |
5285 | /* Embedded processor for network proxy functions */ | |
5286 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7) | |
5287 | uint8_t unused_6; | |
5288 | uint32_t src_id; | |
5289 | /* | |
5290 | * This value is the id of the source. For a network port, it | |
5291 | * represents port_id. For a physical function, it represents | |
5292 | * fid. For a virtual function, it represents vf_id. For a vnic, | |
5293 | * it represents vnic_id. For embedded processors, this id is | |
5294 | * not valid. Notes: 1. The function ID is implied if it src_id | |
5295 | * is not provided for a src_type that is either | |
5296 | */ | |
5297 | uint8_t tunnel_type; | |
5298 | /* Tunnel Type. */ | |
5299 | /* Non-tunnel */ | |
5300 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0) | |
5301 | /* Virtual eXtensible Local Area Network (VXLAN) */ | |
5302 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1) | |
5303 | /* | |
5304 | * Network Virtualization Generic Routing | |
5305 | * Encapsulation (NVGRE) | |
5306 | */ | |
5307 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2) | |
5308 | /* | |
5309 | * Generic Routing Encapsulation (GRE) inside | |
5310 | * Ethernet payload | |
5311 | */ | |
5312 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3) | |
5313 | /* IP in IP */ | |
5314 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4) | |
5315 | /* Generic Network Virtualization Encapsulation (Geneve) */ | |
5316 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5) | |
5317 | /* Multi-Protocol Lable Switching (MPLS) */ | |
5318 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6) | |
5319 | /* Stateless Transport Tunnel (STT) */ | |
5320 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7) | |
5321 | /* | |
5322 | * Generic Routing Encapsulation (GRE) inside IP | |
5323 | * datagram payload | |
5324 | */ | |
5325 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8) | |
5326 | /* Any tunneled traffic */ | |
5327 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff) | |
5328 | uint8_t unused_7; | |
5329 | uint16_t dst_id; | |
5330 | /* | |
5331 | * If set, this value shall represent the Logical VNIC ID of the | |
5332 | * destination VNIC for the RX path and network port id of the | |
5333 | * destination port for the TX path. | |
5334 | */ | |
5335 | uint16_t mirror_vnic_id; | |
5336 | /* Logical VNIC ID of the VNIC where traffic is mirrored. */ | |
5337 | uint8_t pri_hint; | |
5338 | /* | |
5339 | * This hint is provided to help in placing the filter in the | |
5340 | * filter table. | |
5341 | */ | |
5342 | /* No preference */ | |
5343 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER UINT32_C(0x0) | |
5344 | /* Above the given filter */ | |
5345 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER UINT32_C(0x1) | |
5346 | /* Below the given filter */ | |
5347 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER UINT32_C(0x2) | |
5348 | /* As high as possible */ | |
5349 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3) | |
5350 | /* As low as possible */ | |
5351 | #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4) | |
5352 | uint8_t unused_8; | |
5353 | uint32_t unused_9; | |
5354 | uint64_t l2_filter_id_hint; | |
5355 | /* | |
5356 | * This is the ID of the filter that goes along with the | |
5357 | * pri_hint. This field is valid only for the following values. | |
5358 | * 1 - Above the given filter 2 - Below the given filter | |
5359 | */ | |
5360 | } __attribute__((packed)); | |
5361 | ||
5362 | /* Output (24 bytes) */ | |
5363 | struct hwrm_cfa_l2_filter_alloc_output { | |
5364 | uint16_t error_code; | |
5365 | /* | |
5366 | * Pass/Fail or error type Note: receiver to verify the in | |
5367 | * parameters, and fail the call with an error when appropriate | |
5368 | */ | |
5369 | uint16_t req_type; | |
5370 | /* This field returns the type of original request. */ | |
5371 | uint16_t seq_id; | |
5372 | /* This field provides original sequence number of the command. */ | |
5373 | uint16_t resp_len; | |
5374 | /* | |
5375 | * This field is the length of the response in bytes. The last | |
5376 | * byte of the response is a valid flag that will read as '1' | |
5377 | * when the command has been completely written to memory. | |
5378 | */ | |
5379 | uint64_t l2_filter_id; | |
5380 | /* | |
5381 | * This value identifies a set of CFA data structures used for | |
5382 | * an L2 context. | |
5383 | */ | |
5384 | uint32_t flow_id; | |
5385 | /* | |
5386 | * This is the ID of the flow associated with this filter. This | |
5387 | * value shall be used to match and associate the flow | |
5388 | * identifier returned in completion records. A value of | |
5389 | * 0xFFFFFFFF shall indicate no flow id. | |
5390 | */ | |
5391 | uint8_t unused_0; | |
5392 | uint8_t unused_1; | |
5393 | uint8_t unused_2; | |
5394 | uint8_t valid; | |
5395 | /* | |
5396 | * This field is used in Output records to indicate that the | |
5397 | * output is completely written to RAM. This field should be | |
5398 | * read as '1' to indicate that the output has been completely | |
5399 | * written. When writing a command completion or response to an | |
5400 | * internal processor, the order of writes has to be such that | |
5401 | * this field is written last. | |
5402 | */ | |
5403 | } __attribute__((packed)); | |
5404 | ||
5405 | /* hwrm_cfa_l2_filter_free */ | |
5406 | /* | |
5407 | * Description: Free a L2 filter. The HWRM shall free all associated filter | |
5408 | * resources with the L2 filter. | |
5409 | */ | |
5410 | /* Input (24 bytes) */ | |
5411 | struct hwrm_cfa_l2_filter_free_input { | |
5412 | uint16_t req_type; | |
5413 | /* | |
5414 | * This value indicates what type of request this is. The format | |
5415 | * for the rest of the command is determined by this field. | |
5416 | */ | |
5417 | uint16_t cmpl_ring; | |
5418 | /* | |
5419 | * This value indicates the what completion ring the request | |
5420 | * will be optionally completed on. If the value is -1, then no | |
5421 | * CR completion will be generated. Any other value must be a | |
5422 | * valid CR ring_id value for this function. | |
5423 | */ | |
5424 | uint16_t seq_id; | |
5425 | /* This value indicates the command sequence number. */ | |
5426 | uint16_t target_id; | |
5427 | /* | |
5428 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5429 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5430 | * - HWRM | |
5431 | */ | |
5432 | uint64_t resp_addr; | |
5433 | /* | |
5434 | * This is the host address where the response will be written | |
5435 | * when the request is complete. This area must be 16B aligned | |
5436 | * and must be cleared to zero before the request is made. | |
5437 | */ | |
5438 | uint64_t l2_filter_id; | |
5439 | /* | |
5440 | * This value identifies a set of CFA data structures used for | |
5441 | * an L2 context. | |
5442 | */ | |
5443 | } __attribute__((packed)); | |
5444 | ||
5445 | /* Output (16 bytes) */ | |
5446 | struct hwrm_cfa_l2_filter_free_output { | |
5447 | uint16_t error_code; | |
5448 | /* | |
5449 | * Pass/Fail or error type Note: receiver to verify the in | |
5450 | * parameters, and fail the call with an error when appropriate | |
5451 | */ | |
5452 | uint16_t req_type; | |
5453 | /* This field returns the type of original request. */ | |
5454 | uint16_t seq_id; | |
5455 | /* This field provides original sequence number of the command. */ | |
5456 | uint16_t resp_len; | |
5457 | /* | |
5458 | * This field is the length of the response in bytes. The last | |
5459 | * byte of the response is a valid flag that will read as '1' | |
5460 | * when the command has been completely written to memory. | |
5461 | */ | |
5462 | uint32_t unused_0; | |
5463 | uint8_t unused_1; | |
5464 | uint8_t unused_2; | |
5465 | uint8_t unused_3; | |
5466 | uint8_t valid; | |
5467 | /* | |
5468 | * This field is used in Output records to indicate that the | |
5469 | * output is completely written to RAM. This field should be | |
5470 | * read as '1' to indicate that the output has been completely | |
5471 | * written. When writing a command completion or response to an | |
5472 | * internal processor, the order of writes has to be such that | |
5473 | * this field is written last. | |
5474 | */ | |
5475 | } __attribute__((packed)); | |
5476 | ||
5477 | /* hwrm_cfa_l2_filter_cfg */ | |
5478 | /* Description: Change the configuration of an existing L2 filter */ | |
5479 | /* Input (40 bytes) */ | |
5480 | struct hwrm_cfa_l2_filter_cfg_input { | |
5481 | uint16_t req_type; | |
5482 | /* | |
5483 | * This value indicates what type of request this is. The format | |
5484 | * for the rest of the command is determined by this field. | |
5485 | */ | |
5486 | uint16_t cmpl_ring; | |
5487 | /* | |
5488 | * This value indicates the what completion ring the request | |
5489 | * will be optionally completed on. If the value is -1, then no | |
5490 | * CR completion will be generated. Any other value must be a | |
5491 | * valid CR ring_id value for this function. | |
5492 | */ | |
5493 | uint16_t seq_id; | |
5494 | /* This value indicates the command sequence number. */ | |
5495 | uint16_t target_id; | |
5496 | /* | |
5497 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5498 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5499 | * - HWRM | |
5500 | */ | |
5501 | uint64_t resp_addr; | |
5502 | /* | |
5503 | * This is the host address where the response will be written | |
5504 | * when the request is complete. This area must be 16B aligned | |
5505 | * and must be cleared to zero before the request is made. | |
5506 | */ | |
5507 | uint32_t flags; | |
5508 | /* | |
5509 | * Enumeration denoting the RX, TX type of the resource. This | |
5510 | * enumeration is used for resources that are similar for both | |
5511 | * TX and RX paths of the chip. | |
5512 | */ | |
5513 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1) | |
5514 | /* tx path */ | |
5515 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0) | |
5516 | /* rx path */ | |
5517 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0) | |
5518 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \ | |
5519 | CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX | |
5520 | /* | |
5521 | * Setting of this flag indicates drop action. If this flag is | |
5522 | * not set, then it should be considered accept action. | |
5523 | */ | |
5524 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2) | |
5525 | uint32_t enables; | |
5526 | /* This bit must be '1' for the dst_id field to be configured. */ | |
5527 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1) | |
5528 | /* | |
5529 | * This bit must be '1' for the new_mirror_vnic_id field to be | |
5530 | * configured. | |
5531 | */ | |
5532 | #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID UINT32_C(0x2) | |
5533 | uint64_t l2_filter_id; | |
5534 | /* | |
5535 | * This value identifies a set of CFA data structures used for | |
5536 | * an L2 context. | |
5537 | */ | |
5538 | uint32_t dst_id; | |
5539 | /* | |
5540 | * If set, this value shall represent the Logical VNIC ID of the | |
5541 | * destination VNIC for the RX path and network port id of the | |
5542 | * destination port for the TX path. | |
5543 | */ | |
5544 | uint32_t new_mirror_vnic_id; | |
5545 | /* New Logical VNIC ID of the VNIC where traffic is mirrored. */ | |
5546 | } __attribute__((packed)); | |
5547 | ||
5548 | /* Output (16 bytes) */ | |
5549 | struct hwrm_cfa_l2_filter_cfg_output { | |
5550 | uint16_t error_code; | |
5551 | /* | |
5552 | * Pass/Fail or error type Note: receiver to verify the in | |
5553 | * parameters, and fail the call with an error when appropriate | |
5554 | */ | |
5555 | uint16_t req_type; | |
5556 | /* This field returns the type of original request. */ | |
5557 | uint16_t seq_id; | |
5558 | /* This field provides original sequence number of the command. */ | |
5559 | uint16_t resp_len; | |
5560 | /* | |
5561 | * This field is the length of the response in bytes. The last | |
5562 | * byte of the response is a valid flag that will read as '1' | |
5563 | * when the command has been completely written to memory. | |
5564 | */ | |
5565 | uint32_t unused_0; | |
5566 | uint8_t unused_1; | |
5567 | uint8_t unused_2; | |
5568 | uint8_t unused_3; | |
5569 | uint8_t valid; | |
5570 | /* | |
5571 | * This field is used in Output records to indicate that the | |
5572 | * output is completely written to RAM. This field should be | |
5573 | * read as '1' to indicate that the output has been completely | |
5574 | * written. When writing a command completion or response to an | |
5575 | * internal processor, the order of writes has to be such that | |
5576 | * this field is written last. | |
5577 | */ | |
5578 | } __attribute__((packed)); | |
5579 | ||
5580 | /* hwrm_cfa_l2_set_rx_mask */ | |
5581 | /* Description: This command will set rx mask of the function. */ | |
5582 | /* Input (56 bytes) */ | |
5583 | struct hwrm_cfa_l2_set_rx_mask_input { | |
5584 | uint16_t req_type; | |
5585 | /* | |
5586 | * This value indicates what type of request this is. The format | |
5587 | * for the rest of the command is determined by this field. | |
5588 | */ | |
5589 | uint16_t cmpl_ring; | |
5590 | /* | |
5591 | * This value indicates the what completion ring the request | |
5592 | * will be optionally completed on. If the value is -1, then no | |
5593 | * CR completion will be generated. Any other value must be a | |
5594 | * valid CR ring_id value for this function. | |
5595 | */ | |
5596 | uint16_t seq_id; | |
5597 | /* This value indicates the command sequence number. */ | |
5598 | uint16_t target_id; | |
5599 | /* | |
5600 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5601 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5602 | * - HWRM | |
5603 | */ | |
5604 | uint64_t resp_addr; | |
5605 | /* | |
5606 | * This is the host address where the response will be written | |
5607 | * when the request is complete. This area must be 16B aligned | |
5608 | * and must be cleared to zero before the request is made. | |
5609 | */ | |
5610 | uint32_t vnic_id; | |
5611 | /* VNIC ID */ | |
5612 | uint32_t mask; | |
5613 | /* Reserved for future use. */ | |
5614 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1) | |
5615 | /* | |
5616 | * When this bit is '1', the function is requested to accept | |
5617 | * multi-cast packets specified by the multicast addr table. | |
5618 | */ | |
5619 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2) | |
5620 | /* | |
5621 | * When this bit is '1', the function is requested to accept all | |
5622 | * multi-cast packets. | |
5623 | */ | |
5624 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4) | |
5625 | /* | |
5626 | * When this bit is '1', the function is requested to accept | |
5627 | * broadcast packets. | |
5628 | */ | |
5629 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8) | |
5630 | /* | |
5631 | * When this bit is '1', the function is requested to be put in | |
5632 | * the promiscuous mode. The HWRM should accept any function to | |
5633 | * set up promiscuous mode. The HWRM shall follow the semantics | |
5634 | * below for the promiscuous mode support. # When partitioning | |
5635 | * is not enabled on a port (i.e. single PF on the port), then | |
5636 | * the PF shall be allowed to be in the promiscuous mode. When | |
5637 | * the PF is in the promiscuous mode, then it shall receive all | |
5638 | * host bound traffic on that port. # When partitioning is | |
5639 | * enabled on a port (i.e. multiple PFs per port) and a PF on | |
5640 | * that port is in the promiscuous mode, then the PF receives | |
5641 | * all traffic within that partition as identified by a unique | |
5642 | * identifier for the PF (e.g. S-Tag). If a unique outer VLAN | |
5643 | * for the PF is specified, then the setting of promiscuous mode | |
5644 | * on that PF shall result in the PF receiving all host bound | |
5645 | * traffic with matching outer VLAN. # A VF shall can be set in | |
5646 | * the promiscuous mode. In the promiscuous mode, the VF does | |
5647 | * not receive any traffic unless a unique outer VLAN for the VF | |
5648 | * is specified. If a unique outer VLAN for the VF is specified, | |
5649 | * then the setting of promiscuous mode on that VF shall result | |
5650 | * in the VF receiving all host bound traffic with the matching | |
5651 | * outer VLAN. # The HWRM shall allow the setting of promiscuous | |
5652 | * mode on a function independently from the promiscuous mode | |
5653 | * settings on other functions. | |
5654 | */ | |
5655 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10) | |
5656 | /* | |
5657 | * If this flag is set, the corresponding RX filters shall be | |
5658 | * set up to cover multicast/broadcast filters for the outermost | |
5659 | * Layer 2 destination MAC address field. | |
5660 | */ | |
5661 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20) | |
5662 | /* | |
5663 | * If this flag is set, the corresponding RX filters shall be | |
5664 | * set up to cover multicast/broadcast filters for the VLAN- | |
5665 | * tagged packets that match the TPID and VID fields of VLAN | |
5666 | * tags in the VLAN tag table specified in this command. | |
5667 | */ | |
5668 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40) | |
5669 | /* | |
5670 | * If this flag is set, the corresponding RX filters shall be | |
5671 | * set up to cover multicast/broadcast filters for non-VLAN | |
5672 | * tagged packets and VLAN-tagged packets that match the TPID | |
5673 | * and VID fields of VLAN tags in the VLAN tag table specified | |
5674 | * in this command. | |
5675 | */ | |
5676 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80) | |
5677 | /* | |
5678 | * If this flag is set, the corresponding RX filters shall be | |
5679 | * set up to cover multicast/broadcast filters for non-VLAN | |
5680 | * tagged packets and VLAN-tagged packets matching any VLAN tag. | |
5681 | * If this flag is set, then the HWRM shall ignore VLAN tags | |
5682 | * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan, | |
5683 | * and anyvlan_nonvlan flags is set, then the HWRM shall ignore | |
5684 | * VLAN tags specified in vlan_tag_tbl. The HWRM client shall | |
5685 | * set at most one flag out of vlanonly, vlan_nonvlan, and | |
5686 | * anyvlan_nonvlan. | |
5687 | */ | |
5688 | #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN UINT32_C(0x100) | |
5689 | uint64_t mc_tbl_addr; | |
5690 | /* This is the address for mcast address tbl. */ | |
5691 | uint32_t num_mc_entries; | |
5692 | /* | |
5693 | * This value indicates how many entries in mc_tbl are valid. | |
5694 | * Each entry is 6 bytes. | |
5695 | */ | |
5696 | uint32_t unused_0; | |
5697 | uint64_t vlan_tag_tbl_addr; | |
5698 | /* | |
5699 | * This is the address for VLAN tag table. Each VLAN entry in | |
5700 | * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI, | |
5701 | * and VID fields in network byte order. | |
5702 | */ | |
5703 | uint32_t num_vlan_tags; | |
5704 | /* | |
5705 | * This value indicates how many entries in vlan_tag_tbl are | |
5706 | * valid. Each entry is 4 bytes. | |
5707 | */ | |
5708 | uint32_t unused_1; | |
5709 | } __attribute__((packed)); | |
5710 | ||
5711 | /* Output (16 bytes) */ | |
5712 | struct hwrm_cfa_l2_set_rx_mask_output { | |
5713 | uint16_t error_code; | |
5714 | /* | |
5715 | * Pass/Fail or error type Note: receiver to verify the in | |
5716 | * parameters, and fail the call with an error when appropriate | |
5717 | */ | |
5718 | uint16_t req_type; | |
5719 | /* This field returns the type of original request. */ | |
5720 | uint16_t seq_id; | |
5721 | /* This field provides original sequence number of the command. */ | |
5722 | uint16_t resp_len; | |
5723 | /* | |
5724 | * This field is the length of the response in bytes. The last | |
5725 | * byte of the response is a valid flag that will read as '1' | |
5726 | * when the command has been completely written to memory. | |
5727 | */ | |
5728 | uint32_t unused_0; | |
5729 | uint8_t unused_1; | |
5730 | uint8_t unused_2; | |
5731 | uint8_t unused_3; | |
5732 | uint8_t valid; | |
5733 | /* | |
5734 | * This field is used in Output records to indicate that the | |
5735 | * output is completely written to RAM. This field should be | |
5736 | * read as '1' to indicate that the output has been completely | |
5737 | * written. When writing a command completion or response to an | |
5738 | * internal processor, the order of writes has to be such that | |
5739 | * this field is written last. | |
5740 | */ | |
5741 | } __attribute__((packed)); | |
5742 | ||
5743 | /* hwrm_stat_ctx_alloc */ | |
5744 | /* | |
5745 | * Description: This command allocates and does basic preparation for a stat | |
5746 | * context. | |
5747 | */ | |
5748 | /* Input (32 bytes) */ | |
5749 | struct hwrm_stat_ctx_alloc_input { | |
5750 | uint16_t req_type; | |
5751 | /* | |
5752 | * This value indicates what type of request this is. The format | |
5753 | * for the rest of the command is determined by this field. | |
5754 | */ | |
5755 | uint16_t cmpl_ring; | |
5756 | /* | |
5757 | * This value indicates the what completion ring the request | |
5758 | * will be optionally completed on. If the value is -1, then no | |
5759 | * CR completion will be generated. Any other value must be a | |
5760 | * valid CR ring_id value for this function. | |
5761 | */ | |
5762 | uint16_t seq_id; | |
5763 | /* This value indicates the command sequence number. */ | |
5764 | uint16_t target_id; | |
5765 | /* | |
5766 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5767 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5768 | * - HWRM | |
5769 | */ | |
5770 | uint64_t resp_addr; | |
5771 | /* | |
5772 | * This is the host address where the response will be written | |
5773 | * when the request is complete. This area must be 16B aligned | |
5774 | * and must be cleared to zero before the request is made. | |
5775 | */ | |
5776 | uint64_t stats_dma_addr; | |
5777 | /* This is the address for statistic block. */ | |
5778 | uint32_t update_period_ms; | |
5779 | /* | |
5780 | * The statistic block update period in ms. e.g. 250ms, 500ms, | |
5781 | * 750ms, 1000ms. If update_period_ms is 0, then the stats | |
5782 | * update shall be never done and the DMA address shall not be | |
5783 | * used. In this case, the stat block can only be read by | |
5784 | * hwrm_stat_ctx_query command. | |
5785 | */ | |
5786 | uint32_t unused_0; | |
5787 | } __attribute__((packed)); | |
5788 | ||
5789 | /* Output (16 bytes) */ | |
5790 | struct hwrm_stat_ctx_alloc_output { | |
5791 | uint16_t error_code; | |
5792 | /* | |
5793 | * Pass/Fail or error type Note: receiver to verify the in | |
5794 | * parameters, and fail the call with an error when appropriate | |
5795 | */ | |
5796 | uint16_t req_type; | |
5797 | /* This field returns the type of original request. */ | |
5798 | uint16_t seq_id; | |
5799 | /* This field provides original sequence number of the command. */ | |
5800 | uint16_t resp_len; | |
5801 | /* | |
5802 | * This field is the length of the response in bytes. The last | |
5803 | * byte of the response is a valid flag that will read as '1' | |
5804 | * when the command has been completely written to memory. | |
5805 | */ | |
5806 | uint32_t stat_ctx_id; | |
5807 | /* This is the statistics context ID value. */ | |
5808 | uint8_t unused_0; | |
5809 | uint8_t unused_1; | |
5810 | uint8_t unused_2; | |
5811 | uint8_t valid; | |
5812 | /* | |
5813 | * This field is used in Output records to indicate that the | |
5814 | * output is completely written to RAM. This field should be | |
5815 | * read as '1' to indicate that the output has been completely | |
5816 | * written. When writing a command completion or response to an | |
5817 | * internal processor, the order of writes has to be such that | |
5818 | * this field is written last. | |
5819 | */ | |
5820 | } __attribute__((packed)); | |
5821 | ||
5822 | /* hwrm_stat_ctx_free */ | |
5823 | /* Description: This command is used to free a stat context. */ | |
5824 | /* Input (24 bytes) */ | |
5825 | struct hwrm_stat_ctx_free_input { | |
5826 | uint16_t req_type; | |
5827 | /* | |
5828 | * This value indicates what type of request this is. The format | |
5829 | * for the rest of the command is determined by this field. | |
5830 | */ | |
5831 | uint16_t cmpl_ring; | |
5832 | /* | |
5833 | * This value indicates the what completion ring the request | |
5834 | * will be optionally completed on. If the value is -1, then no | |
5835 | * CR completion will be generated. Any other value must be a | |
5836 | * valid CR ring_id value for this function. | |
5837 | */ | |
5838 | uint16_t seq_id; | |
5839 | /* This value indicates the command sequence number. */ | |
5840 | uint16_t target_id; | |
5841 | /* | |
5842 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5843 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5844 | * - HWRM | |
5845 | */ | |
5846 | uint64_t resp_addr; | |
5847 | /* | |
5848 | * This is the host address where the response will be written | |
5849 | * when the request is complete. This area must be 16B aligned | |
5850 | * and must be cleared to zero before the request is made. | |
5851 | */ | |
5852 | uint32_t stat_ctx_id; | |
5853 | /* ID of the statistics context that is being queried. */ | |
5854 | uint32_t unused_0; | |
5855 | } __attribute__((packed)); | |
5856 | ||
5857 | /* Output (16 bytes) */ | |
5858 | struct hwrm_stat_ctx_free_output { | |
5859 | uint16_t error_code; | |
5860 | /* | |
5861 | * Pass/Fail or error type Note: receiver to verify the in | |
5862 | * parameters, and fail the call with an error when appropriate | |
5863 | */ | |
5864 | uint16_t req_type; | |
5865 | /* This field returns the type of original request. */ | |
5866 | uint16_t seq_id; | |
5867 | /* This field provides original sequence number of the command. */ | |
5868 | uint16_t resp_len; | |
5869 | /* | |
5870 | * This field is the length of the response in bytes. The last | |
5871 | * byte of the response is a valid flag that will read as '1' | |
5872 | * when the command has been completely written to memory. | |
5873 | */ | |
5874 | uint32_t stat_ctx_id; | |
5875 | /* This is the statistics context ID value. */ | |
5876 | uint8_t unused_0; | |
5877 | uint8_t unused_1; | |
5878 | uint8_t unused_2; | |
5879 | uint8_t valid; | |
5880 | /* | |
5881 | * This field is used in Output records to indicate that the | |
5882 | * output is completely written to RAM. This field should be | |
5883 | * read as '1' to indicate that the output has been completely | |
5884 | * written. When writing a command completion or response to an | |
5885 | * internal processor, the order of writes has to be such that | |
5886 | * this field is written last. | |
5887 | */ | |
5888 | } __attribute__((packed)); | |
5889 | ||
5890 | /* hwrm_stat_ctx_clr_stats */ | |
5891 | /* Description: This command clears statistics of a context. */ | |
5892 | /* Input (24 bytes) */ | |
5893 | struct hwrm_stat_ctx_clr_stats_input { | |
5894 | uint16_t req_type; | |
5895 | /* | |
5896 | * This value indicates what type of request this is. The format | |
5897 | * for the rest of the command is determined by this field. | |
5898 | */ | |
5899 | uint16_t cmpl_ring; | |
5900 | /* | |
5901 | * This value indicates the what completion ring the request | |
5902 | * will be optionally completed on. If the value is -1, then no | |
5903 | * CR completion will be generated. Any other value must be a | |
5904 | * valid CR ring_id value for this function. | |
5905 | */ | |
5906 | uint16_t seq_id; | |
5907 | /* This value indicates the command sequence number. */ | |
5908 | uint16_t target_id; | |
5909 | /* | |
5910 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5911 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5912 | * - HWRM | |
5913 | */ | |
5914 | uint64_t resp_addr; | |
5915 | /* | |
5916 | * This is the host address where the response will be written | |
5917 | * when the request is complete. This area must be 16B aligned | |
5918 | * and must be cleared to zero before the request is made. | |
5919 | */ | |
5920 | uint32_t stat_ctx_id; | |
5921 | /* ID of the statistics context that is being queried. */ | |
5922 | uint32_t unused_0; | |
5923 | } __attribute__((packed)); | |
5924 | ||
5925 | /* Output (16 bytes) */ | |
5926 | struct hwrm_stat_ctx_clr_stats_output { | |
5927 | uint16_t error_code; | |
5928 | /* | |
5929 | * Pass/Fail or error type Note: receiver to verify the in | |
5930 | * parameters, and fail the call with an error when appropriate | |
5931 | */ | |
5932 | uint16_t req_type; | |
5933 | /* This field returns the type of original request. */ | |
5934 | uint16_t seq_id; | |
5935 | /* This field provides original sequence number of the command. */ | |
5936 | uint16_t resp_len; | |
5937 | /* | |
5938 | * This field is the length of the response in bytes. The last | |
5939 | * byte of the response is a valid flag that will read as '1' | |
5940 | * when the command has been completely written to memory. | |
5941 | */ | |
5942 | uint32_t unused_0; | |
5943 | uint8_t unused_1; | |
5944 | uint8_t unused_2; | |
5945 | uint8_t unused_3; | |
5946 | uint8_t valid; | |
5947 | /* | |
5948 | * This field is used in Output records to indicate that the | |
5949 | * output is completely written to RAM. This field should be | |
5950 | * read as '1' to indicate that the output has been completely | |
5951 | * written. When writing a command completion or response to an | |
5952 | * internal processor, the order of writes has to be such that | |
5953 | * this field is written last. | |
5954 | */ | |
5955 | } __attribute__((packed)); | |
5956 | ||
5957 | /* hwrm_exec_fwd_resp */ | |
5958 | /* | |
5959 | * Description: This command is used to send an encapsulated request to the | |
5960 | * HWRM. This command instructs the HWRM to execute the request and forward the | |
5961 | * response of the encapsulated request to the location specified in the | |
5962 | * original request that is encapsulated. The target id of this command shall be | |
5963 | * set to 0xFFFF (HWRM). The response location in this command shall be used to | |
5964 | * acknowledge the receipt of the encapsulated request and forwarding of the | |
5965 | * response. | |
5966 | */ | |
5967 | /* Input (128 bytes) */ | |
5968 | struct hwrm_exec_fwd_resp_input { | |
5969 | uint16_t req_type; | |
5970 | /* | |
5971 | * This value indicates what type of request this is. The format | |
5972 | * for the rest of the command is determined by this field. | |
5973 | */ | |
5974 | uint16_t cmpl_ring; | |
5975 | /* | |
5976 | * This value indicates the what completion ring the request | |
5977 | * will be optionally completed on. If the value is -1, then no | |
5978 | * CR completion will be generated. Any other value must be a | |
5979 | * valid CR ring_id value for this function. | |
5980 | */ | |
5981 | uint16_t seq_id; | |
5982 | /* This value indicates the command sequence number. */ | |
5983 | uint16_t target_id; | |
5984 | /* | |
5985 | * Target ID of this command. 0x0 - 0xFFF8 - Used for function | |
5986 | * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF | |
5987 | * - HWRM | |
5988 | */ | |
5989 | uint64_t resp_addr; | |
5990 | /* | |
5991 | * This is the host address where the response will be written | |
5992 | * when the request is complete. This area must be 16B aligned | |
5993 | * and must be cleared to zero before the request is made. | |
5994 | */ | |
5995 | uint32_t encap_request[26]; | |
5996 | /* | |
5997 | * This is an encapsulated request. This request should be | |
5998 | * executed by the HWRM and the response should be provided in | |
5999 | * the response buffer inside the encapsulated request. | |
6000 | */ | |
6001 | uint16_t encap_resp_target_id; | |
6002 | /* | |
6003 | * This value indicates the target id of the response to the | |
6004 | * encapsulated request. 0x0 - 0xFFF8 - Used for function ids | |
6005 | * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - | |
6006 | * HWRM | |
6007 | */ | |
6008 | uint16_t unused_0[3]; | |
6009 | } __attribute__((packed)); | |
6010 | ||
6011 | /* Output (16 bytes) */ | |
6012 | struct hwrm_exec_fwd_resp_output { | |
6013 | uint16_t error_code; | |
6014 | /* | |
6015 | * Pass/Fail or error type Note: receiver to verify the in | |
6016 | * parameters, and fail the call with an error when appropriate | |
6017 | */ | |
6018 | uint16_t req_type; | |
6019 | /* This field returns the type of original request. */ | |
6020 | uint16_t seq_id; | |
6021 | /* This field provides original sequence number of the command. */ | |
6022 | uint16_t resp_len; | |
6023 | /* | |
6024 | * This field is the length of the response in bytes. The last | |
6025 | * byte of the response is a valid flag that will read as '1' | |
6026 | * when the command has been completely written to memory. | |
6027 | */ | |
6028 | uint32_t unused_0; | |
6029 | uint8_t unused_1; | |
6030 | uint8_t unused_2; | |
6031 | uint8_t unused_3; | |
6032 | uint8_t valid; | |
6033 | /* | |
6034 | * This field is used in Output records to indicate that the | |
6035 | * output is completely written to RAM. This field should be | |
6036 | * read as '1' to indicate that the output has been completely | |
6037 | * written. When writing a command completion or response to an | |
6038 | * internal processor, the order of writes has to be such that | |
6039 | * this field is written last. | |
6040 | */ | |
6041 | } __attribute__((packed)); | |
6042 | ||
6043 | #endif |