projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| 7c673cae FG |
1 | /******************************************************************************* |
| 2 | ||
| 3 | Copyright (c) 2001-2015, Intel Corporation | |
| 4 | All rights reserved. | |
| 5 | ||
| 6 | Redistribution and use in source and binary forms, with or without | |
| 7 | modification, are permitted provided that the following conditions are met: | |
| 8 | ||
| 9 | 1. Redistributions of source code must retain the above copyright notice, | |
| 10 | this list of conditions and the following disclaimer. | |
| 11 | ||
| 12 | 2. Redistributions in binary form must reproduce the above copyright | |
| 13 | notice, this list of conditions and the following disclaimer in the | |
| 14 | documentation and/or other materials provided with the distribution. | |
| 15 | ||
| 16 | 3. Neither the name of the Intel Corporation nor the names of its | |
| 17 | contributors may be used to endorse or promote products derived from | |
| 18 | this software without specific prior written permission. | |
| 19 | ||
| 20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 23 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
| 24 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 25 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 26 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
| 27 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
| 28 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| 29 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 30 | POSSIBILITY OF SUCH DAMAGE. | |
| 31 | ||
| 32 | ***************************************************************************/ | |
| 33 | ||
| 34 | #ifndef _E1000_I210_H_ | |
| 35 | #define _E1000_I210_H_ | |
| 36 | ||
| 37 | bool e1000_get_flash_presence_i210(struct e1000_hw *hw); | |
| 38 | s32 e1000_update_flash_i210(struct e1000_hw *hw); | |
| 39 | s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw); | |
| 40 | s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw); | |
| 41 | s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, | |
| 42 | u16 words, u16 *data); | |
| 43 | s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, | |
| 44 | u16 words, u16 *data); | |
| 45 | s32 e1000_read_invm_version(struct e1000_hw *hw, | |
| 46 | struct e1000_fw_version *invm_ver); | |
| 47 | s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask); | |
| 48 | void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask); | |
| 49 | s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, | |
| 50 | u16 *data); | |
| 51 | s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, | |
| 52 | u16 data); | |
| 53 | s32 e1000_init_hw_i210(struct e1000_hw *hw); | |
| 54 | ||
| 55 | #define E1000_STM_OPCODE 0xDB00 | |
| 56 | #define E1000_EEPROM_FLASH_SIZE_WORD 0x11 | |
| 57 | ||
| 58 | #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \ | |
| 59 | (u8)((invm_dword) & 0x7) | |
| 60 | #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \ | |
| 61 | (u8)(((invm_dword) & 0x0000FE00) >> 9) | |
| 62 | #define INVM_DWORD_TO_WORD_DATA(invm_dword) \ | |
| 63 | (u16)(((invm_dword) & 0xFFFF0000) >> 16) | |
| 64 | ||
| 65 | enum E1000_INVM_STRUCTURE_TYPE { | |
| 66 | E1000_INVM_UNINITIALIZED_STRUCTURE = 0x00, | |
| 67 | E1000_INVM_WORD_AUTOLOAD_STRUCTURE = 0x01, | |
| 68 | E1000_INVM_CSR_AUTOLOAD_STRUCTURE = 0x02, | |
| 69 | E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE = 0x03, | |
| 70 | E1000_INVM_RSA_KEY_SHA256_STRUCTURE = 0x04, | |
| 71 | E1000_INVM_INVALIDATED_STRUCTURE = 0x0F, | |
| 72 | }; | |
| 73 | ||
| 74 | #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS 8 | |
| 75 | #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS 1 | |
| 76 | #define E1000_INVM_ULT_BYTES_SIZE 8 | |
| 77 | #define E1000_INVM_RECORD_SIZE_IN_BYTES 4 | |
| 78 | #define E1000_INVM_VER_FIELD_ONE 0x1FF8 | |
| 79 | #define E1000_INVM_VER_FIELD_TWO 0x7FE000 | |
| 80 | #define E1000_INVM_IMGTYPE_FIELD 0x1F800000 | |
| 81 | ||
| 82 | #define E1000_INVM_MAJOR_MASK 0x3F0 | |
| 83 | #define E1000_INVM_MINOR_MASK 0xF | |
| 84 | #define E1000_INVM_MAJOR_SHIFT 4 | |
| 85 | ||
| 86 | #define ID_LED_DEFAULT_I210 ((ID_LED_OFF1_ON2 << 8) | \ | |
| 87 | (ID_LED_DEF1_DEF2 << 4) | \ | |
| 88 | (ID_LED_OFF1_OFF2)) | |
| 89 | #define ID_LED_DEFAULT_I210_SERDES ((ID_LED_DEF1_DEF2 << 8) | \ | |
| 90 | (ID_LED_DEF1_DEF2 << 4) | \ | |
| 91 | (ID_LED_OFF1_ON2)) | |
| 92 | ||
| 93 | /* NVM offset defaults for I211 devices */ | |
| 94 | #define NVM_INIT_CTRL_2_DEFAULT_I211 0X7243 | |
| 95 | #define NVM_INIT_CTRL_4_DEFAULT_I211 0x00C1 | |
| 96 | #define NVM_LED_1_CFG_DEFAULT_I211 0x0184 | |
| 97 | #define NVM_LED_0_2_CFG_DEFAULT_I211 0x200C | |
| 98 | ||
| 99 | /* PLL Defines */ | |
| 100 | #define E1000_PCI_PMCSR 0x44 | |
| 101 | #define E1000_PCI_PMCSR_D3 0x03 | |
| 102 | #define E1000_MAX_PLL_TRIES 5 | |
| 103 | #define E1000_PHY_PLL_UNCONF 0xFF | |
| 104 | #define E1000_PHY_PLL_FREQ_PAGE 0xFC0000 | |
| 105 | #define E1000_PHY_PLL_FREQ_REG 0x000E | |
| 106 | #define E1000_INVM_DEFAULT_AL 0x202F | |
| 107 | #define E1000_INVM_AUTOLOAD 0x0A | |
| 108 | #define E1000_INVM_PLL_WO_VAL 0x0010 | |
| 109 | ||
| 110 | #endif |