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1 | /******************************************************************************* |
2 | ||
3 | Copyright (c) 2001-2015, Intel Corporation | |
4 | All rights reserved. | |
5 | ||
6 | Redistribution and use in source and binary forms, with or without | |
7 | modification, are permitted provided that the following conditions are met: | |
8 | ||
9 | 1. Redistributions of source code must retain the above copyright notice, | |
10 | this list of conditions and the following disclaimer. | |
11 | ||
12 | 2. Redistributions in binary form must reproduce the above copyright | |
13 | notice, this list of conditions and the following disclaimer in the | |
14 | documentation and/or other materials provided with the distribution. | |
15 | ||
16 | 3. Neither the name of the Intel Corporation nor the names of its | |
17 | contributors may be used to endorse or promote products derived from | |
18 | this software without specific prior written permission. | |
19 | ||
20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
23 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
24 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
25 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
26 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
27 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
28 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
29 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
30 | POSSIBILITY OF SUCH DAMAGE. | |
31 | ||
32 | ***************************************************************************/ | |
33 | ||
34 | #ifndef _E1000_MBX_H_ | |
35 | #define _E1000_MBX_H_ | |
36 | ||
37 | #include "e1000_api.h" | |
38 | ||
39 | /* Define mailbox register bits */ | |
40 | #define E1000_V2PMAILBOX_REQ 0x00000001 /* Request for PF Ready bit */ | |
41 | #define E1000_V2PMAILBOX_ACK 0x00000002 /* Ack PF message received */ | |
42 | #define E1000_V2PMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ | |
43 | #define E1000_V2PMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ | |
44 | #define E1000_V2PMAILBOX_PFSTS 0x00000010 /* PF wrote a message in the MB */ | |
45 | #define E1000_V2PMAILBOX_PFACK 0x00000020 /* PF ack the previous VF msg */ | |
46 | #define E1000_V2PMAILBOX_RSTI 0x00000040 /* PF has reset indication */ | |
47 | #define E1000_V2PMAILBOX_RSTD 0x00000080 /* PF has indicated reset done */ | |
48 | #define E1000_V2PMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */ | |
49 | ||
50 | #define E1000_P2VMAILBOX_STS 0x00000001 /* Initiate message send to VF */ | |
51 | #define E1000_P2VMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ | |
52 | #define E1000_P2VMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ | |
53 | #define E1000_P2VMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ | |
54 | #define E1000_P2VMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */ | |
55 | ||
56 | #define E1000_MBVFICR_VFREQ_MASK 0x000000FF /* bits for VF messages */ | |
57 | #define E1000_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */ | |
58 | #define E1000_MBVFICR_VFACK_MASK 0x00FF0000 /* bits for VF acks */ | |
59 | #define E1000_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */ | |
60 | ||
61 | #define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ | |
62 | ||
63 | /* If it's a E1000_VF_* msg then it originates in the VF and is sent to the | |
64 | * PF. The reverse is true if it is E1000_PF_*. | |
65 | * Message ACK's are the value or'd with 0xF0000000 | |
66 | */ | |
67 | /* Msgs below or'd with this are the ACK */ | |
68 | #define E1000_VT_MSGTYPE_ACK 0x80000000 | |
69 | /* Msgs below or'd with this are the NACK */ | |
70 | #define E1000_VT_MSGTYPE_NACK 0x40000000 | |
71 | /* Indicates that VF is still clear to send requests */ | |
72 | #define E1000_VT_MSGTYPE_CTS 0x20000000 | |
73 | #define E1000_VT_MSGINFO_SHIFT 16 | |
74 | /* bits 23:16 are used for extra info for certain messages */ | |
75 | #define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT) | |
76 | ||
77 | #define E1000_VF_RESET 0x01 /* VF requests reset */ | |
78 | #define E1000_VF_SET_MAC_ADDR 0x02 /* VF requests to set MAC addr */ | |
79 | #define E1000_VF_SET_MULTICAST 0x03 /* VF requests to set MC addr */ | |
80 | #define E1000_VF_SET_MULTICAST_COUNT_MASK (0x1F << E1000_VT_MSGINFO_SHIFT) | |
81 | #define E1000_VF_SET_MULTICAST_OVERFLOW (0x80 << E1000_VT_MSGINFO_SHIFT) | |
82 | #define E1000_VF_SET_VLAN 0x04 /* VF requests to set VLAN */ | |
83 | #define E1000_VF_SET_VLAN_ADD (0x01 << E1000_VT_MSGINFO_SHIFT) | |
84 | #define E1000_VF_SET_LPE 0x05 /* reqs to set VMOLR.LPE */ | |
85 | #define E1000_VF_SET_PROMISC 0x06 /* reqs to clear VMOLR.ROPE/MPME*/ | |
86 | #define E1000_VF_SET_PROMISC_UNICAST (0x01 << E1000_VT_MSGINFO_SHIFT) | |
87 | #define E1000_VF_SET_PROMISC_MULTICAST (0x02 << E1000_VT_MSGINFO_SHIFT) | |
88 | ||
89 | #define E1000_PF_CONTROL_MSG 0x0100 /* PF control message */ | |
90 | ||
91 | #define E1000_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */ | |
92 | #define E1000_VF_MBX_INIT_DELAY 500 /* microseconds between retries */ | |
93 | ||
94 | s32 e1000_read_mbx(struct e1000_hw *, u32 *, u16, u16); | |
95 | s32 e1000_write_mbx(struct e1000_hw *, u32 *, u16, u16); | |
96 | s32 e1000_read_posted_mbx(struct e1000_hw *, u32 *, u16, u16); | |
97 | s32 e1000_write_posted_mbx(struct e1000_hw *, u32 *, u16, u16); | |
98 | s32 e1000_check_for_msg(struct e1000_hw *, u16); | |
99 | s32 e1000_check_for_ack(struct e1000_hw *, u16); | |
100 | s32 e1000_check_for_rst(struct e1000_hw *, u16); | |
101 | void e1000_init_mbx_ops_generic(struct e1000_hw *hw); | |
102 | s32 e1000_init_mbx_params_vf(struct e1000_hw *); | |
103 | s32 e1000_init_mbx_params_pf(struct e1000_hw *); | |
104 | ||
105 | #endif /* _E1000_MBX_H_ */ |