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bump version to 12.2.12-pve1
[ceph.git] / ceph / src / dpdk / drivers / net / qede / base / ecore_dcbx.c
CommitLineData
7c673cae
FG		 1/*
2 * Copyright (c) 2016 QLogic Corporation.
3 * All rights reserved.
4 * www.qlogic.com
5 *
6 * See LICENSE.qede_pmd for copyright and licensing details.
7 */
8
9#include "bcm_osal.h"
10#include "ecore.h"
11#include "ecore_sp_commands.h"
12#include "ecore_dcbx.h"
13#include "ecore_cxt.h"
14#include "ecore_gtt_reg_addr.h"
15#include "ecore_iro.h"
16
17#define ECORE_DCBX_MAX_MIB_READ_TRY (100)
18#define ECORE_ETH_TYPE_DEFAULT (0)
19
20#define ECORE_DCBX_INVALID_PRIORITY 0xFF
21
22/* Get Traffic Class from priority traffic class table, 4 bits represent
23 * the traffic class corresponding to the priority.
24 */
25#define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
26 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
27
28static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
29{
30 return (ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
31 DCBX_APP_SF_ETHTYPE) ? true : false;
32}
33
34static bool ecore_dcbx_app_port(u32 app_info_bitmap)
35{
36 return (ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
37 DCBX_APP_SF_PORT) ? true : false;
38}
39
40static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
41{
42 u8 mfw_val = ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
43
44 /* Old MFW */
45 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
46 return ecore_dcbx_app_port(app_info_bitmap);
47
48 return (mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT) ?
49 true : false;
50}
51
52static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id)
53{
54 return (ecore_dcbx_app_ethtype(app_info_bitmap) &&
55 proto_id == ECORE_ETH_TYPE_DEFAULT) ? true : false;
56}
57
58static bool ecore_dcbx_enabled(u32 dcbx_cfg_bitmap)
59{
60 return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
61 DCBX_CONFIG_VERSION_DISABLED) ? false : true;
62}
63
64static bool ecore_dcbx_cee(u32 dcbx_cfg_bitmap)
65{
66 return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
67 DCBX_CONFIG_VERSION_CEE) ? true : false;
68}
69
70static bool ecore_dcbx_ieee(u32 dcbx_cfg_bitmap)
71{
72 return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
73 DCBX_CONFIG_VERSION_IEEE) ? true : false;
74}
75
76static bool ecore_dcbx_local(u32 dcbx_cfg_bitmap)
77{
78 return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
79 DCBX_CONFIG_VERSION_STATIC) ? true : false;
80}
81
82/* @@@TBD A0 Eagle workaround */
83void ecore_dcbx_eagle_workaround(struct ecore_hwfn *p_hwfn,
84 struct ecore_ptt *p_ptt, bool set_to_pfc)
85{
86 if (!ENABLE_EAGLE_ENG1_WORKAROUND(p_hwfn))
87 return;
88
89 ecore_wr(p_hwfn, p_ptt,
90 YSEM_REG_FAST_MEMORY + 0x20000 /* RAM in FASTMEM */ +
91 YSTORM_FLOW_CONTROL_MODE_OFFSET,
92 set_to_pfc ? flow_ctrl_pfc : flow_ctrl_pause);
93 ecore_wr(p_hwfn, p_ptt, NIG_REG_FLOWCTRL_MODE,
94 EAGLE_ENG1_WORKAROUND_NIG_FLOWCTRL_MODE);
95}
96
97static void
98ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
99 struct ecore_dcbx_results *p_data)
100{
101 struct ecore_hw_info *p_info = &p_hwfn->hw_info;
102 enum dcbx_protocol_type id;
103 u8 prio, tc, size, update;
104 bool enable;
105 const char *name; /* @DPDK */
106 int i;
107
108 size = OSAL_ARRAY_SIZE(ecore_dcbx_app_update);
109
110 DP_INFO(p_hwfn, "DCBX negotiated: %d\n", p_data->dcbx_enabled);
111
112 for (i = 0; i < size; i++) {
113 id = ecore_dcbx_app_update[i].id;
114 name = ecore_dcbx_app_update[i].name;
115
116 enable = p_data->arr[id].enable;
117 update = p_data->arr[id].update;
118 tc = p_data->arr[id].tc;
119 prio = p_data->arr[id].priority;
120
121 DP_INFO(p_hwfn,
122 "%s info: update %d, enable %d, prio %d, tc %d,"
123 " num_active_tc %d dscp_enable = %d dscp_val = %d\n",
124 name, update, enable, prio, tc, p_info->num_active_tc,
125 p_data->arr[id].dscp_enable, p_data->arr[id].dscp_val);
126 }
127}
128
129static void
130ecore_dcbx_set_pf_tcs(struct ecore_hw_info *p_info,
131 u8 tc, enum ecore_pci_personality personality)
132{
133 /* QM reconf data */
134 if (p_info->personality == personality)
135 p_info->offload_tc = tc;
136}
137
138void
139ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
140 struct ecore_hwfn *p_hwfn,
141 bool enable, bool update, u8 prio, u8 tc,
142 enum dcbx_protocol_type type,
143 enum ecore_pci_personality personality)
144{
145 struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
146
147 /* PF update ramrod data */
148 p_data->arr[type].enable = enable;
149 p_data->arr[type].priority = prio;
150 p_data->arr[type].tc = tc;
151 p_data->arr[type].dscp_enable = dscp->enabled;
152 if (p_data->arr[type].dscp_enable) {
153 u8 i;
154
155 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
156 if (prio == dscp->dscp_pri_map[i]) {
157 p_data->arr[type].dscp_val = i;
158 break;
159 }
160 }
161
162 if (enable && p_data->arr[type].dscp_enable)
163 p_data->arr[type].update = UPDATE_DCB_DSCP;
164 else if (enable)
165 p_data->arr[type].update = UPDATE_DCB;
166 else
167 p_data->arr[type].update = DONT_UPDATE_DCB_DHCP;
168
169 ecore_dcbx_set_pf_tcs(&p_hwfn->hw_info, tc, personality);
170}
171
172/* Update app protocol data and hw_info fields with the TLV info */
173static void
174ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
175 struct ecore_hwfn *p_hwfn,
176 bool enable, bool update, u8 prio, u8 tc,
177 enum dcbx_protocol_type type)
178{
179 enum ecore_pci_personality personality;
180 enum dcbx_protocol_type id;
181 const char *name; /* @DPDK */
182 u8 size;
183 int i;
184
185 size = OSAL_ARRAY_SIZE(ecore_dcbx_app_update);
186
187 for (i = 0; i < size; i++) {
188 id = ecore_dcbx_app_update[i].id;
189
190 if (type != id)
191 continue;
192
193 personality = ecore_dcbx_app_update[i].personality;
194 name = ecore_dcbx_app_update[i].name;
195
196 ecore_dcbx_set_params(p_data, p_hwfn, enable, update,
197 prio, tc, type, personality);
198 }
199}
200
201static enum _ecore_status_t
202ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
203{
204 u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
205 u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
206 enum _ecore_status_t rc = ECORE_SUCCESS;
207
208 /* Bitmap 1 corresponds to priority 0, return priority 0 */
209 if (pri_bitmap == 1) {
210 *priority = 0;
211 return rc;
212 }
213
214 /* Choose the highest priority */
215 while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) {
216 pri_mask = 1 << index;
217 if (pri_bitmap & pri_mask)
218 pri = index;
219 index--;
220 }
221
222 if (pri < ECORE_MAX_PFC_PRIORITIES)
223 *priority = (u8)pri;
224 else
225 rc = ECORE_INVAL;
226
227 return rc;
228}
229
230static bool
231ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
232 u32 app_prio_bitmap, u16 id,
233 enum dcbx_protocol_type *type, bool ieee)
234{
235 bool status = false;
236
237 if (ecore_dcbx_default_tlv(app_prio_bitmap, id)) {
238 *type = DCBX_PROTOCOL_ETH;
239 status = true;
240 } else {
241 *type = DCBX_MAX_PROTOCOL_TYPE;
242 DP_ERR(p_hwfn,
243 "No action required, App TLV id = 0x%x"
244 " app_prio_bitmap = 0x%x\n",
245 id, app_prio_bitmap);
246 }
247
248 return status;
249}
250
251/* Parse app TLV's to update TC information in hw_info structure for
252 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
253 */
254static enum _ecore_status_t
255ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
256 struct ecore_dcbx_results *p_data,
257 struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
258 int count, u8 dcbx_version)
259{
260 enum _ecore_status_t rc = ECORE_SUCCESS;
261 u8 tc, priority, priority_map;
262 enum dcbx_protocol_type type;
263 bool enable, ieee;
264 u16 protocol_id;
265 int i;
266
267 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Num APP entries = %d\n", count);
268
269 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
270 /* Parse APP TLV */
271 for (i = 0; i < count; i++) {
272 protocol_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
273 DCBX_APP_PROTOCOL_ID);
274 priority_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
275 DCBX_APP_PRI_MAP);
276 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
277 if (rc == ECORE_INVAL) {
278 DP_ERR(p_hwfn, "Invalid priority\n");
279 return rc;
280 }
281
282 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
283 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
284 protocol_id, &type,
285 ieee)) {
286 /* ETH always have the enable bit reset, as it gets
287 * vlan information per packet. For other protocols,
288 * should be set according to the dcbx_enabled
289 * indication, but we only got here if there was an
290 * app tlv for the protocol, so dcbx must be enabled.
291 */
292 enable = (type == DCBX_PROTOCOL_ETH ? false : true);
293
294 ecore_dcbx_update_app_info(p_data, p_hwfn, enable, true,
295 priority, tc, type);
296 }
297 }
298 /* Update ramrod protocol data and hw_info fields
299 * with default info when corresponding APP TLV's are not detected.
300 * The enabled field has a different logic for ethernet as only for
301 * ethernet dcb should disabled by default, as the information arrives
302 * from the OS (unless an explicit app tlv was present).
303 */
304 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
305 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
306 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
307 if (p_data->arr[type].update)
308 continue;
309
310 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
311 ecore_dcbx_update_app_info(p_data, p_hwfn, enable, true,
312 priority, tc, type);
313 }
314
315 return ECORE_SUCCESS;
316}
317
318/* Parse app TLV's to update TC information in hw_info structure for
319 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
320 */
321static enum _ecore_status_t
322ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
323{
324 struct dcbx_app_priority_feature *p_app;
325 enum _ecore_status_t rc = ECORE_SUCCESS;
326 struct ecore_dcbx_results data = { 0 };
327 struct dcbx_app_priority_entry *p_tbl;
328 struct dcbx_ets_feature *p_ets;
329 struct ecore_hw_info *p_info;
330 u32 pri_tc_tbl, flags;
331 u8 dcbx_version;
332 int num_entries;
333
334 flags = p_hwfn->p_dcbx_info->operational.flags;
335 dcbx_version = ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
336
337 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
338 p_tbl = p_app->app_pri_tbl;
339
340 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
341 pri_tc_tbl = p_ets->pri_tc_tbl[0];
342
343 p_info = &p_hwfn->hw_info;
344 num_entries = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
345
346 rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
347 num_entries, dcbx_version);
348 if (rc != ECORE_SUCCESS)
349 return rc;
350
351 p_info->num_active_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
352 DCBX_ETS_MAX_TCS);
353 data.pf_id = p_hwfn->rel_pf_id;
354 data.dcbx_enabled = !!dcbx_version;
355
356 ecore_dcbx_dp_protocol(p_hwfn, &data);
357
358 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
359 sizeof(struct ecore_dcbx_results));
360
361 return ECORE_SUCCESS;
362}
363
364static enum _ecore_status_t
365ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
366 struct ecore_ptt *p_ptt,
367 struct ecore_dcbx_mib_meta_data *p_data,
368 enum ecore_mib_read_type type)
369{
370 enum _ecore_status_t rc = ECORE_SUCCESS;
371 u32 prefix_seq_num, suffix_seq_num;
372 int read_count = 0;
373
374 do {
375 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
376 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
377 p_data->addr, p_data->size);
378 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
379 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
380 } else {
381 ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
382 p_data->addr, p_data->size);
383 prefix_seq_num = p_data->mib->prefix_seq_num;
384 suffix_seq_num = p_data->mib->suffix_seq_num;
385 }
386 read_count++;
387
388 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
389 "mib type = %d, try count = %d prefix seq num ="
390 " %d suffix seq num = %d\n",
391 type, read_count, prefix_seq_num, suffix_seq_num);
392 } while ((prefix_seq_num != suffix_seq_num) &&
393 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
394
395 if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
396 DP_ERR(p_hwfn,
397 "MIB read err, mib type = %d, try count ="
398 " %d prefix seq num = %d suffix seq num = %d\n",
399 type, read_count, prefix_seq_num, suffix_seq_num);
400 rc = ECORE_IO;
401 }
402
403 return rc;
404}
405
406static enum _ecore_status_t
407ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
408 struct ecore_dcbx_app_prio *p_prio,
409 struct ecore_dcbx_results *p_results)
410{
411 enum _ecore_status_t rc = ECORE_SUCCESS;
412
413 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
414 p_results->arr[DCBX_PROTOCOL_ETH].enable) {
415 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
416 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
417 "Priority: eth %d\n", p_prio->eth);
418 }
419
420 return rc;
421}
422
423static void
424ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
425 struct dcbx_app_priority_feature *p_app,
426 struct dcbx_app_priority_entry *p_tbl,
427 struct ecore_dcbx_params *p_params, bool ieee)
428{
429 struct ecore_app_entry *entry;
430 u8 pri_map;
431 int i;
432
433 p_params->app_willing = ECORE_MFW_GET_FIELD(p_app->flags,
434 DCBX_APP_WILLING);
435 p_params->app_valid = ECORE_MFW_GET_FIELD(p_app->flags,
436 DCBX_APP_ENABLED);
437 p_params->app_error = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
438 p_params->num_app_entries = ECORE_MFW_GET_FIELD(p_app->flags,
439 DCBX_APP_NUM_ENTRIES);
440 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
441 entry = &p_params->app_entry[i];
442 if (ieee) {
443 u8 sf_ieee;
444 u32 val;
445
446 sf_ieee = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
447 DCBX_APP_SF_IEEE);
448 switch (sf_ieee) {
449 case DCBX_APP_SF_IEEE_RESERVED:
450 /* Old MFW */
451 val = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
452 DCBX_APP_SF);
453 entry->sf_ieee = val ?
454 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
455 ECORE_DCBX_SF_IEEE_ETHTYPE;
456 break;
457 case DCBX_APP_SF_IEEE_ETHTYPE:
458 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
459 break;
460 case DCBX_APP_SF_IEEE_TCP_PORT:
461 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
462 break;
463 case DCBX_APP_SF_IEEE_UDP_PORT:
464 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
465 break;
466 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
467 entry->sf_ieee =
468 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
469 break;
470 }
471 } else {
472 entry->ethtype = !(ECORE_MFW_GET_FIELD(p_tbl[i].entry,
473 DCBX_APP_SF));
474 }
475
476 pri_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
477 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
478 entry->proto_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
479 DCBX_APP_PROTOCOL_ID);
480 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
481 entry->proto_id,
482 &entry->proto_type, ieee);
483 }
484
485 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
486 "APP params: willing %d, valid %d error = %d\n",
487 p_params->app_willing, p_params->app_valid,
488 p_params->app_error);
489}
490
491static void
492ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
493 u32 pfc, struct ecore_dcbx_params *p_params)
494{
495 u8 pfc_map;
496
497 p_params->pfc.willing = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
498 p_params->pfc.max_tc = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
499 p_params->pfc.enabled = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
500 pfc_map = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
501 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
502 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
503 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
504 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
505 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
506 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
507 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
508 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
509
510 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
511 "PFC params: willing %d, pfc_bitmap %d\n",
512 p_params->pfc.willing, pfc_map);
513}
514
515static void
516ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
517 struct dcbx_ets_feature *p_ets,
518 struct ecore_dcbx_params *p_params)
519{
520 u32 bw_map[2], tsa_map[2], pri_map;
521 int i;
522
523 p_params->ets_willing = ECORE_MFW_GET_FIELD(p_ets->flags,
524 DCBX_ETS_WILLING);
525 p_params->ets_enabled = ECORE_MFW_GET_FIELD(p_ets->flags,
526 DCBX_ETS_ENABLED);
527 p_params->ets_cbs = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
528 p_params->max_ets_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
529 DCBX_ETS_MAX_TCS);
530 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
531 "ETS params: willing %d, ets_cbs %d pri_tc_tbl_0 %x"
532 " max_ets_tc %d\n",
533 p_params->ets_willing, p_params->ets_cbs,
534 p_ets->pri_tc_tbl[0], p_params->max_ets_tc);
535
536 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
537 * encoded in a type u32 array of size 2.
538 */
539 bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
540 bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
541 tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
542 tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
543 pri_map = OSAL_BE32_TO_CPU(p_ets->pri_tc_tbl[0]);
544 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
545 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
546 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
547 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
548 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
549 "elem %d bw_tbl %x tsa_tbl %x\n",
550 i, p_params->ets_tc_bw_tbl[i],
551 p_params->ets_tc_tsa_tbl[i]);
552 }
553}
554
555static enum _ecore_status_t
556ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
557 struct dcbx_app_priority_feature *p_app,
558 struct dcbx_app_priority_entry *p_tbl,
559 struct dcbx_ets_feature *p_ets,
560 u32 pfc, struct ecore_dcbx_params *p_params,
561 bool ieee)
562{
563 ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
564 ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
565 ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
566
567 return ECORE_SUCCESS;
568}
569
570static enum _ecore_status_t
571ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
572 struct ecore_ptt *p_ptt,
573 struct ecore_dcbx_get *params)
574{
575 struct ecore_dcbx_admin_params *p_local;
576 struct dcbx_app_priority_feature *p_app;
577 struct dcbx_app_priority_entry *p_tbl;
578 struct ecore_dcbx_params *p_data;
579 struct dcbx_ets_feature *p_ets;
580 u32 pfc;
581
582 p_local = &params->local;
583 p_data = &p_local->params;
584 p_app = &p_hwfn->p_dcbx_info->local_admin.features.app;
585 p_tbl = p_app->app_pri_tbl;
586 p_ets = &p_hwfn->p_dcbx_info->local_admin.features.ets;
587 pfc = p_hwfn->p_dcbx_info->local_admin.features.pfc;
588
589 ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data,
590 false);
591 p_local->valid = true;
592
593 return ECORE_SUCCESS;
594}
595
596static enum _ecore_status_t
597ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
598 struct ecore_ptt *p_ptt,
599 struct ecore_dcbx_get *params)
600{
601 struct ecore_dcbx_remote_params *p_remote;
602 struct dcbx_app_priority_feature *p_app;
603 struct dcbx_app_priority_entry *p_tbl;
604 struct ecore_dcbx_params *p_data;
605 struct dcbx_ets_feature *p_ets;
606 u32 pfc;
607
608 p_remote = &params->remote;
609 p_data = &p_remote->params;
610 p_app = &p_hwfn->p_dcbx_info->remote.features.app;
611 p_tbl = p_app->app_pri_tbl;
612 p_ets = &p_hwfn->p_dcbx_info->remote.features.ets;
613 pfc = p_hwfn->p_dcbx_info->remote.features.pfc;
614
615 ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data,
616 false);
617 p_remote->valid = true;
618
619 return ECORE_SUCCESS;
620}
621
622static enum _ecore_status_t
623ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
624 struct ecore_ptt *p_ptt,
625 struct ecore_dcbx_get *params)
626{
627 struct ecore_dcbx_operational_params *p_operational;
628 enum _ecore_status_t rc = ECORE_SUCCESS;
629 struct dcbx_app_priority_feature *p_app;
630 struct dcbx_app_priority_entry *p_tbl;
631 struct ecore_dcbx_results *p_results;
632 struct ecore_dcbx_params *p_data;
633 struct dcbx_ets_feature *p_ets;
634 bool enabled, err;
635 u32 pfc, flags;
636
637 flags = p_hwfn->p_dcbx_info->operational.flags;
638
639 /* If DCBx version is non zero, then negotiation
640 * was successfuly performed
641 */
642 p_operational = &params->operational;
643 enabled = ecore_dcbx_enabled(flags);
644 if (!enabled) {
645 p_operational->enabled = enabled;
646 p_operational->valid = false;
647 return ECORE_INVAL;
648 }
649
650 p_data = &p_operational->params;
651 p_results = &p_hwfn->p_dcbx_info->results;
652 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
653 p_tbl = p_app->app_pri_tbl;
654 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
655 pfc = p_hwfn->p_dcbx_info->operational.features.pfc;
656
657 p_operational->ieee = ecore_dcbx_ieee(flags);
658 p_operational->cee = ecore_dcbx_cee(flags);
659 p_operational->local = ecore_dcbx_local(flags);
660
661 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
662 "Version support: ieee %d, cee %d, static %d\n",
663 p_operational->ieee, p_operational->cee,
664 p_operational->local);
665
666 ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data,
667 p_operational->ieee);
668 ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
669 p_results);
670 err = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
671 p_operational->err = err;
672 p_operational->enabled = enabled;
673 p_operational->valid = true;
674
675 return rc;
676}
677
678static enum _ecore_status_t
679ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
680 struct ecore_ptt *p_ptt,
681 struct ecore_dcbx_get *params)
682{
683 struct ecore_dcbx_dscp_params *p_dscp;
684 struct dcb_dscp_map *p_dscp_map;
685 int i, j, entry;
686 u32 pri_map;
687
688 p_dscp = &params->dscp;
689 p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
690 p_dscp->enabled = ECORE_MFW_GET_FIELD(p_dscp_map->flags,
691 DCB_DSCP_ENABLE);
692 /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
693 * where each entry holds the 4bit priority map for 8 dscp entries.
694 */
695 for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
696 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
697 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
698 entry, pri_map);
699 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
700 p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
701 (j * 4)) & 0xf;
702 }
703
704 return ECORE_SUCCESS;
705}
706
707static enum _ecore_status_t
708ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
709 struct ecore_ptt *p_ptt,
710 struct ecore_dcbx_get *params)
711{
712 struct ecore_dcbx_lldp_local *p_local;
713 osal_size_t size;
714 u32 *dest;
715
716 p_local = &params->lldp_local;
717
718 size = OSAL_ARRAY_SIZE(p_local->local_chassis_id);
719 dest = p_hwfn->p_dcbx_info->get.lldp_local.local_chassis_id;
720 OSAL_MEMCPY(dest, p_local->local_chassis_id, size);
721
722 size = OSAL_ARRAY_SIZE(p_local->local_port_id);
723 dest = p_hwfn->p_dcbx_info->get.lldp_local.local_port_id;
724 OSAL_MEMCPY(dest, p_local->local_port_id, size);
725
726 return ECORE_SUCCESS;
727}
728
729static enum _ecore_status_t
730ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
731 struct ecore_ptt *p_ptt,
732 struct ecore_dcbx_get *params)
733{
734 struct ecore_dcbx_lldp_remote *p_remote;
735 osal_size_t size;
736 u32 *dest;
737
738 p_remote = &params->lldp_remote;
739
740 size = OSAL_ARRAY_SIZE(p_remote->peer_chassis_id);
741 dest = p_hwfn->p_dcbx_info->get.lldp_remote.peer_chassis_id;
742 OSAL_MEMCPY(dest, p_remote->peer_chassis_id, size);
743
744 size = OSAL_ARRAY_SIZE(p_remote->peer_port_id);
745 dest = p_hwfn->p_dcbx_info->get.lldp_remote.peer_port_id;
746 OSAL_MEMCPY(dest, p_remote->peer_port_id, size);
747
748 return ECORE_SUCCESS;
749}
750
751static enum _ecore_status_t
752ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
753 struct ecore_ptt *p_ptt, enum ecore_mib_read_type type)
754{
755 enum _ecore_status_t rc = ECORE_SUCCESS;
756 struct ecore_dcbx_get *p_params;
757
758 p_params = &p_hwfn->p_dcbx_info->get;
759
760 switch (type) {
761 case ECORE_DCBX_REMOTE_MIB:
762 ecore_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
763 break;
764 case ECORE_DCBX_LOCAL_MIB:
765 ecore_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
766 break;
767 case ECORE_DCBX_OPERATIONAL_MIB:
768 ecore_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
769 break;
770 case ECORE_DCBX_REMOTE_LLDP_MIB:
771 rc = ecore_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
772 break;
773 case ECORE_DCBX_LOCAL_LLDP_MIB:
774 rc = ecore_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
775 break;
776 default:
777 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
778 return ECORE_INVAL;
779 }
780
781 return rc;
782}
783
784static enum _ecore_status_t
785ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
786 struct ecore_ptt *p_ptt)
787{
788 enum _ecore_status_t rc = ECORE_SUCCESS;
789 struct ecore_dcbx_mib_meta_data data;
790
791 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
792 lldp_config_params);
793 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
794 data.size = sizeof(struct lldp_config_params_s);
795 ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
796
797 return rc;
798}
799
800static enum _ecore_status_t
801ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
802 struct ecore_ptt *p_ptt,
803 enum ecore_mib_read_type type)
804{
805 enum _ecore_status_t rc = ECORE_SUCCESS;
806 struct ecore_dcbx_mib_meta_data data;
807
808 OSAL_MEM_ZERO(&data, sizeof(data));
809 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
810 lldp_status_params);
811 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
812 data.size = sizeof(struct lldp_status_params_s);
813 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
814
815 return rc;
816}
817
818static enum _ecore_status_t
819ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
820 struct ecore_ptt *p_ptt,
821 enum ecore_mib_read_type type)
822{
823 struct ecore_dcbx_mib_meta_data data;
824 enum _ecore_status_t rc = ECORE_SUCCESS;
825
826 OSAL_MEM_ZERO(&data, sizeof(data));
827 data.addr = p_hwfn->mcp_info->port_addr +
828 offsetof(struct public_port, operational_dcbx_mib);
829 data.mib = &p_hwfn->p_dcbx_info->operational;
830 data.size = sizeof(struct dcbx_mib);
831 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
832
833 return rc;
834}
835
836static enum _ecore_status_t
837ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
838 struct ecore_ptt *p_ptt,
839 enum ecore_mib_read_type type)
840{
841 struct ecore_dcbx_mib_meta_data data;
842 enum _ecore_status_t rc = ECORE_SUCCESS;
843
844 OSAL_MEM_ZERO(&data, sizeof(data));
845 data.addr = p_hwfn->mcp_info->port_addr +
846 offsetof(struct public_port, remote_dcbx_mib);
847 data.mib = &p_hwfn->p_dcbx_info->remote;
848 data.size = sizeof(struct dcbx_mib);
849 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
850
851 return rc;
852}
853
854static enum _ecore_status_t
855ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
856{
857 struct ecore_dcbx_mib_meta_data data;
858 enum _ecore_status_t rc = ECORE_SUCCESS;
859
860 data.addr = p_hwfn->mcp_info->port_addr +
861 offsetof(struct public_port, local_admin_dcbx_mib);
862 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
863 data.size = sizeof(struct dcbx_local_params);
864 ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
865 data.addr, data.size);
866
867 return rc;
868}
869
870static void
871ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
872{
873 struct ecore_dcbx_mib_meta_data data;
874
875 data.addr = p_hwfn->mcp_info->port_addr +
876 offsetof(struct public_port, dcb_dscp_map);
877 data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
878 data.size = sizeof(struct dcb_dscp_map);
879 ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
880}
881
882static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
883 struct ecore_ptt *p_ptt,
884 enum ecore_mib_read_type type)
885{
886 enum _ecore_status_t rc = ECORE_SUCCESS;
887
888 switch (type) {
889 case ECORE_DCBX_OPERATIONAL_MIB:
890 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
891 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
892 break;
893 case ECORE_DCBX_REMOTE_MIB:
894 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
895 break;
896 case ECORE_DCBX_LOCAL_MIB:
897 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
898 break;
899 case ECORE_DCBX_REMOTE_LLDP_MIB:
900 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
901 break;
902 case ECORE_DCBX_LOCAL_LLDP_MIB:
903 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
904 break;
905 default:
906 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
907 return ECORE_INVAL;
908 }
909
910 return rc;
911}
912
913/*
914 * Read updated MIB.
915 * Reconfigure QM and invoke PF update ramrod command if operational MIB
916 * change is detected.
917 */
918enum _ecore_status_t
919ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
920 enum ecore_mib_read_type type)
921{
922 enum _ecore_status_t rc = ECORE_SUCCESS;
923
924 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
925 if (rc)
926 return rc;
927
928 if (type == ECORE_DCBX_OPERATIONAL_MIB) {
929 ecore_dcbx_get_dscp_params(p_hwfn, p_ptt,
930 &p_hwfn->p_dcbx_info->get);
931
932 rc = ecore_dcbx_process_mib_info(p_hwfn);
933 if (!rc) {
934 bool enabled;
935
936 /* reconfigure tcs of QM queues according
937 * to negotiation results
938 */
939 ecore_qm_reconf(p_hwfn, p_ptt);
940
941 /* update storm FW with negotiation results */
942 ecore_sp_pf_update(p_hwfn);
943
944 /* set eagle enigne 1 flow control workaround
945 * according to negotiation results
946 */
947 enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
948 ecore_dcbx_eagle_workaround(p_hwfn, p_ptt, enabled);
949 }
950 }
951 ecore_dcbx_get_params(p_hwfn, p_ptt, type);
952
953 /* Update the DSCP to TC mapping bit if required */
954 if ((type == ECORE_DCBX_OPERATIONAL_MIB) &&
955 p_hwfn->p_dcbx_info->dscp_nig_update) {
956 ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE, 0x1);
957 p_hwfn->p_dcbx_info->dscp_nig_update = false;
958 }
959
960 OSAL_DCBX_AEN(p_hwfn, type);
961
962 return rc;
963}
964
965enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
966{
967 enum _ecore_status_t rc = ECORE_SUCCESS;
968
969 p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
970 sizeof(struct ecore_dcbx_info));
971 if (!p_hwfn->p_dcbx_info) {
972 DP_NOTICE(p_hwfn, true,
973 "Failed to allocate `struct ecore_dcbx_info'");
974 rc = ECORE_NOMEM;
975 }
976
977 return rc;
978}
979
980void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn,
981 struct ecore_dcbx_info *p_dcbx_info)
982{
983 OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
984}
985
986static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
987 struct ecore_dcbx_results *p_src,
988 enum dcbx_protocol_type type)
989{
990 p_data->dcb_enable_flag = p_src->arr[type].enable;
991 p_data->dcb_priority = p_src->arr[type].priority;
992 p_data->dcb_tc = p_src->arr[type].tc;
993 p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
994 p_data->dscp_val = p_src->arr[type].dscp_val;
995}
996
997/* Set pf update ramrod command params */
998void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
999 struct pf_update_ramrod_data *p_dest)
1000{
1001 struct protocol_dcb_data *p_dcb_data;
1002 bool update_flag = false;
1003
1004 p_dest->pf_id = p_src->pf_id;
1005
1006 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
1007 p_dest->update_eth_dcb_data_flag = update_flag;
1008
1009 p_dcb_data = &p_dest->eth_dcb_data;
1010 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1011}
1012
1013static
1014enum _ecore_status_t ecore_dcbx_query(struct ecore_hwfn *p_hwfn,
1015 enum ecore_mib_read_type type)
1016{
1017 struct ecore_ptt *p_ptt;
1018 enum _ecore_status_t rc;
1019
1020 p_ptt = ecore_ptt_acquire(p_hwfn);
1021 if (!p_ptt) {
1022 rc = ECORE_TIMEOUT;
1023 DP_ERR(p_hwfn, "rc = %d\n", rc);
1024 return rc;
1025 }
1026
1027 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1028 if (rc != ECORE_SUCCESS)
1029 goto out;
1030
1031 rc = ecore_dcbx_get_params(p_hwfn, p_ptt, type);
1032
1033out:
1034 ecore_ptt_release(p_hwfn, p_ptt);
1035 return rc;
1036}
1037
1038enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
1039 struct ecore_dcbx_get *p_get,
1040 enum ecore_mib_read_type type)
1041{
1042 enum _ecore_status_t rc;
1043
1044 rc = ecore_dcbx_query(p_hwfn, type);
1045 if (rc)
1046 return rc;
1047
1048 if (p_get != OSAL_NULL)
1049 OSAL_MEMCPY(p_get, &p_hwfn->p_dcbx_info->get,
1050 sizeof(struct ecore_dcbx_get));
1051
1052 return rc;
1053}
1054
1055static void
1056ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
1057 u32 *pfc, struct ecore_dcbx_params *p_params)
1058{
1059 u8 pfc_map = 0;
1060 int i;
1061
1062 if (p_params->pfc.willing)
1063 *pfc |= DCBX_PFC_WILLING_MASK;
1064 else
1065 *pfc &= ~DCBX_PFC_WILLING_MASK;
1066
1067 if (p_params->pfc.enabled)
1068 *pfc |= DCBX_PFC_ENABLED_MASK;
1069 else
1070 *pfc &= ~DCBX_PFC_ENABLED_MASK;
1071
1072 *pfc &= ~DCBX_PFC_CAPS_MASK;
1073 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
1074
1075 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
1076 if (p_params->pfc.prio[i])
1077 pfc_map |= (0x1 << i);
1078
1079 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
1080
1081 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1082}
1083
1084static void
1085ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1086 struct dcbx_ets_feature *p_ets,
1087 struct ecore_dcbx_params *p_params)
1088{
1089 u8 *bw_map, *tsa_map;
1090 int i;
1091
1092 if (p_params->ets_willing)
1093 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1094 else
1095 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1096
1097 if (p_params->ets_cbs)
1098 p_ets->flags |= DCBX_ETS_CBS_MASK;
1099 else
1100 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1101
1102 if (p_params->ets_enabled)
1103 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1104 else
1105 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1106
1107 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1108 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1109
1110 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1111 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1112 p_ets->pri_tc_tbl[0] = 0;
1113 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1114 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1115 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1116 p_ets->pri_tc_tbl[0] |= (((u32)p_params->ets_pri_tc_tbl[i]) <<
1117 ((7 - i) * 4));
1118 }
1119 p_ets->pri_tc_tbl[0] = OSAL_CPU_TO_BE32(p_ets->pri_tc_tbl[0]);
1120 for (i = 0; i < 2; i++) {
1121 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1122 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1123 }
1124}
1125
1126static void
1127ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1128 struct dcbx_app_priority_feature *p_app,
1129 struct ecore_dcbx_params *p_params, bool ieee)
1130{
1131 u32 *entry;
1132 int i;
1133
1134 if (p_params->app_willing)
1135 p_app->flags |= DCBX_APP_WILLING_MASK;
1136 else
1137 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1138
1139 if (p_params->app_valid)
1140 p_app->flags |= DCBX_APP_ENABLED_MASK;
1141 else
1142 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1143
1144 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1145 p_app->flags |= (u32)p_params->num_app_entries <<
1146 DCBX_APP_NUM_ENTRIES_SHIFT;
1147
1148 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1149 entry = &p_app->app_pri_tbl[i].entry;
1150 if (ieee) {
1151 *entry &= ~DCBX_APP_SF_IEEE_MASK;
1152 switch (p_params->app_entry[i].sf_ieee) {
1153 case ECORE_DCBX_SF_IEEE_ETHTYPE:
1154 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1155 DCBX_APP_SF_IEEE_SHIFT);
1156 break;
1157 case ECORE_DCBX_SF_IEEE_TCP_PORT:
1158 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1159 DCBX_APP_SF_IEEE_SHIFT);
1160 break;
1161 case ECORE_DCBX_SF_IEEE_UDP_PORT:
1162 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1163 DCBX_APP_SF_IEEE_SHIFT);
1164 break;
1165 case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1166 *entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1167 DCBX_APP_SF_IEEE_SHIFT;
1168 break;
1169 }
1170 } else {
1171 *entry &= ~DCBX_APP_SF_MASK;
1172 if (p_params->app_entry[i].ethtype)
1173 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1174 DCBX_APP_SF_SHIFT);
1175 else
1176 *entry |= ((u32)DCBX_APP_SF_PORT <<
1177 DCBX_APP_SF_SHIFT);
1178 }
1179 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1180 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1181 DCBX_APP_PROTOCOL_ID_SHIFT);
1182 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1183 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1184 DCBX_APP_PRI_MAP_SHIFT);
1185 }
1186}
1187
1188static enum _ecore_status_t
1189ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1190 struct dcbx_local_params *local_admin,
1191 struct ecore_dcbx_set *params)
1192{
1193 bool ieee = false;
1194
1195 local_admin->flags = 0;
1196 OSAL_MEMCPY(&local_admin->features,
1197 &p_hwfn->p_dcbx_info->operational.features,
1198 sizeof(struct dcbx_features));
1199
1200 if (params->enabled) {
1201 local_admin->config = params->ver_num;
1202 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1203 } else {
1204 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1205 }
1206
1207 if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1208 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1209 &params->config.params);
1210
1211 if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1212 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1213 &params->config.params);
1214
1215 if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1216 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1217 &params->config.params, ieee);
1218
1219 return ECORE_SUCCESS;
1220}
1221
1222static enum _ecore_status_t
1223ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1224 struct dcb_dscp_map *p_dscp_map,
1225 struct ecore_dcbx_set *p_params)
1226{
1227 int entry, i, j;
1228 u32 val;
1229
1230 OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1231 sizeof(*p_dscp_map));
1232
1233 if (p_params->dscp.enabled)
1234 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1235 else
1236 p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1237
1238 for (i = 0, entry = 0; i < 8; i++) {
1239 val = 0;
1240 for (j = 0; j < 8; j++, entry++)
1241 val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1242 (j * 4));
1243
1244 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1245 }
1246
1247 p_hwfn->p_dcbx_info->dscp_nig_update = true;
1248
1249 return ECORE_SUCCESS;
1250}
1251
1252enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1253 struct ecore_ptt *p_ptt,
1254 struct ecore_dcbx_set *params,
1255 bool hw_commit)
1256{
1257 enum _ecore_status_t rc = ECORE_SUCCESS;
1258 struct ecore_dcbx_mib_meta_data data;
1259 struct dcbx_local_params local_admin;
1260 struct dcb_dscp_map dscp_map;
1261 u32 resp = 0, param = 0;
1262
1263 if (!hw_commit) {
1264 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1265 sizeof(struct ecore_dcbx_set));
1266 return ECORE_SUCCESS;
1267 }
1268
1269 /* clear set-parmas cache */
1270 OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1271 sizeof(struct ecore_dcbx_set));
1272
1273 OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1274 ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1275
1276 data.addr = p_hwfn->mcp_info->port_addr +
1277 offsetof(struct public_port, local_admin_dcbx_mib);
1278 data.local_admin = &local_admin;
1279 data.size = sizeof(struct dcbx_local_params);
1280 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1281
1282 if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1283 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1284 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1285
1286 data.addr = p_hwfn->mcp_info->port_addr +
1287 offsetof(struct public_port, dcb_dscp_map);
1288 data.dscp_map = &dscp_map;
1289 data.size = sizeof(struct dcb_dscp_map);
1290 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1291 data.size);
1292 }
1293
1294 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1295 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
1296 if (rc != ECORE_SUCCESS) {
1297 DP_NOTICE(p_hwfn, false,
1298 "Failed to send DCBX update request\n");
1299 return rc;
1300 }
1301
1302 return rc;
1303}
1304
1305enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1306 struct ecore_dcbx_set *params)
1307{
1308 struct ecore_dcbx_get *dcbx_info;
1309 int rc;
1310
1311 if (p_hwfn->p_dcbx_info->set.config.valid) {
1312 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1313 sizeof(struct ecore_dcbx_set));
1314 return ECORE_SUCCESS;
1315 }
1316
1317 dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1318 sizeof(struct ecore_dcbx_get));
1319 if (!dcbx_info) {
1320 DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
1321 return ECORE_NOMEM;
1322 }
1323
1324 rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1325 ECORE_DCBX_OPERATIONAL_MIB);
1326 if (rc) {
1327 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1328 return rc;
1329 }
1330 p_hwfn->p_dcbx_info->set.override_flags = 0;
1331
1332 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1333 if (dcbx_info->operational.cee)
1334 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1335 if (dcbx_info->operational.ieee)
1336 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1337 if (dcbx_info->operational.local)
1338 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1339
1340 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1341 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1342 &dcbx_info->operational.params,
1343 sizeof(struct ecore_dcbx_admin_params));
1344 p_hwfn->p_dcbx_info->set.config.valid = true;
1345
1346 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1347 sizeof(struct ecore_dcbx_set));
1348
1349 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1350
1351 return ECORE_SUCCESS;
1352}
Ceph