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1 | /* |
2 | * Copyright (c) 2016 QLogic Corporation. | |
3 | * All rights reserved. | |
4 | * www.qlogic.com | |
5 | * | |
6 | * See LICENSE.qede_pmd for copyright and licensing details. | |
7 | */ | |
8 | ||
9 | #ifndef __ECORE_INT_H__ | |
10 | #define __ECORE_INT_H__ | |
11 | ||
12 | #include "ecore.h" | |
13 | #include "ecore_int_api.h" | |
14 | ||
15 | #define ECORE_CAU_DEF_RX_TIMER_RES 0 | |
16 | #define ECORE_CAU_DEF_TX_TIMER_RES 0 | |
17 | ||
18 | #define ECORE_SB_ATT_IDX 0x0001 | |
19 | #define ECORE_SB_EVENT_MASK 0x0003 | |
20 | ||
21 | #define SB_ALIGNED_SIZE(p_hwfn) \ | |
22 | ALIGNED_TYPE_SIZE(struct status_block, p_hwfn) | |
23 | ||
24 | struct ecore_igu_block { | |
25 | u8 status; | |
26 | #define ECORE_IGU_STATUS_FREE 0x01 | |
27 | #define ECORE_IGU_STATUS_VALID 0x02 | |
28 | #define ECORE_IGU_STATUS_PF 0x04 | |
29 | ||
30 | u8 vector_number; | |
31 | u8 function_id; | |
32 | u8 is_pf; | |
33 | }; | |
34 | ||
35 | struct ecore_igu_map { | |
36 | struct ecore_igu_block igu_blocks[MAX_TOT_SB_PER_PATH]; | |
37 | }; | |
38 | ||
39 | struct ecore_igu_info { | |
40 | struct ecore_igu_map igu_map; | |
41 | u16 igu_dsb_id; | |
42 | u16 igu_base_sb; | |
43 | u16 igu_base_sb_iov; | |
44 | u16 igu_sb_cnt; | |
45 | u16 igu_sb_cnt_iov; | |
46 | u16 free_blks; | |
47 | }; | |
48 | ||
49 | /* TODO Names of function may change... */ | |
50 | void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn, | |
51 | struct ecore_ptt *p_ptt, | |
52 | bool b_set, bool b_slowpath); | |
53 | ||
54 | void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn); | |
55 | ||
56 | /** | |
57 | * @brief ecore_int_igu_read_cam - Reads the IGU CAM. | |
58 | * This function needs to be called during hardware | |
59 | * prepare. It reads the info from igu cam to know which | |
60 | * status block is the default / base status block etc. | |
61 | * | |
62 | * @param p_hwfn | |
63 | * @param p_ptt | |
64 | * | |
65 | * @return enum _ecore_status_t | |
66 | */ | |
67 | enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn, | |
68 | struct ecore_ptt *p_ptt); | |
69 | ||
70 | typedef enum _ecore_status_t (*ecore_int_comp_cb_t) (struct ecore_hwfn *p_hwfn, | |
71 | void *cookie); | |
72 | /** | |
73 | * @brief ecore_int_register_cb - Register callback func for | |
74 | * slowhwfn statusblock. | |
75 | * | |
76 | * Every protocol that uses the slowhwfn status block | |
77 | * should register a callback function that will be called | |
78 | * once there is an update of the sp status block. | |
79 | * | |
80 | * @param p_hwfn | |
81 | * @param comp_cb - function to be called when there is an | |
82 | * interrupt on the sp sb | |
83 | * | |
84 | * @param cookie - passed to the callback function | |
85 | * @param sb_idx - OUT parameter which gives the chosen index | |
86 | * for this protocol. | |
87 | * @param p_fw_cons - pointer to the actual address of the | |
88 | * consumer for this protocol. | |
89 | * | |
90 | * @return enum _ecore_status_t | |
91 | */ | |
92 | enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn, | |
93 | ecore_int_comp_cb_t comp_cb, | |
94 | void *cookie, | |
95 | u8 *sb_idx, __le16 **p_fw_cons); | |
96 | /** | |
97 | * @brief ecore_int_unregister_cb - Unregisters callback | |
98 | * function from sp sb. | |
99 | * Partner of ecore_int_register_cb -> should be called | |
100 | * when no longer required. | |
101 | * | |
102 | * @param p_hwfn | |
103 | * @param pi | |
104 | * | |
105 | * @return enum _ecore_status_t | |
106 | */ | |
107 | enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, u8 pi); | |
108 | ||
109 | /** | |
110 | * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id. | |
111 | * | |
112 | * @param p_hwfn | |
113 | * | |
114 | * @return u16 | |
115 | */ | |
116 | u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn); | |
117 | ||
118 | /** | |
119 | * @brief Status block cleanup. Should be called for each status | |
120 | * block that will be used -> both PF / VF | |
121 | * | |
122 | * @param p_hwfn | |
123 | * @param p_ptt | |
124 | * @param sb_id - igu status block id | |
125 | * @param opaque - opaque fid of the sb owner. | |
126 | * @param cleanup_set - set(1) / clear(0) | |
127 | */ | |
128 | void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn, | |
129 | struct ecore_ptt *p_ptt, | |
130 | u32 sb_id, u16 opaque, bool b_set); | |
131 | ||
132 | /** | |
133 | * @brief ecore_int_cau_conf - configure cau for a given status | |
134 | * block | |
135 | * | |
136 | * @param p_hwfn | |
137 | * @param ptt | |
138 | * @param sb_phys | |
139 | * @param igu_sb_id | |
140 | * @param vf_number | |
141 | * @param vf_valid | |
142 | */ | |
143 | void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn, | |
144 | struct ecore_ptt *p_ptt, | |
145 | dma_addr_t sb_phys, | |
146 | u16 igu_sb_id, u16 vf_number, u8 vf_valid); | |
147 | ||
148 | /** | |
149 | * @brief ecore_int_alloc | |
150 | * | |
151 | * @param p_hwfn | |
152 | * @param p_ptt | |
153 | * | |
154 | * @return enum _ecore_status_t | |
155 | */ | |
156 | enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn, | |
157 | struct ecore_ptt *p_ptt); | |
158 | ||
159 | /** | |
160 | * @brief ecore_int_free | |
161 | * | |
162 | * @param p_hwfn | |
163 | */ | |
164 | void ecore_int_free(struct ecore_hwfn *p_hwfn); | |
165 | ||
166 | /** | |
167 | * @brief ecore_int_setup | |
168 | * | |
169 | * @param p_hwfn | |
170 | * @param p_ptt | |
171 | */ | |
172 | void ecore_int_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt); | |
173 | ||
174 | /** | |
175 | * @brief - Returns an Rx queue index appropriate for usage with given SB. | |
176 | * | |
177 | * @param p_hwfn | |
178 | * @param sb_id - absolute index of SB | |
179 | * | |
180 | * @return index of Rx queue | |
181 | */ | |
182 | u16 ecore_int_queue_id_from_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id); | |
183 | ||
184 | /** | |
185 | * @brief - Enable Interrupt & Attention for hw function | |
186 | * | |
187 | * @param p_hwfn | |
188 | * @param p_ptt | |
189 | * @param int_mode | |
190 | * | |
191 | * @return enum _ecore_status_t | |
192 | */ | |
193 | enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn, | |
194 | struct ecore_ptt *p_ptt, | |
195 | enum ecore_int_mode int_mode); | |
196 | ||
197 | /** | |
198 | * @brief - Initialize CAU status block entry | |
199 | * | |
200 | * @param p_hwfn | |
201 | * @param p_sb_entry | |
202 | * @param pf_id | |
203 | * @param vf_number | |
204 | * @param vf_valid | |
205 | */ | |
206 | void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn, | |
207 | struct cau_sb_entry *p_sb_entry, u8 pf_id, | |
208 | u16 vf_number, u8 vf_valid); | |
209 | ||
210 | enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn, | |
211 | struct ecore_ptt *p_ptt, | |
212 | u8 timer_res, u16 sb_id, bool tx); | |
213 | #ifndef ASIC_ONLY | |
214 | #define ECORE_MAPPING_MEMORY_SIZE(dev) \ | |
215 | ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \ | |
216 | 136 : NUM_OF_SBS(dev)) | |
217 | #else | |
218 | #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev) | |
219 | #endif | |
220 | ||
221 | #endif /* __ECORE_INT_H__ */ |