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bump version to 12.2.12-pve1
[ceph.git] / ceph / src / dpdk / drivers / net / qede / base / ecore_proto_if.h
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1/*
2 * Copyright (c) 2016 QLogic Corporation.
3 * All rights reserved.
4 * www.qlogic.com
5 *
6 * See LICENSE.qede_pmd for copyright and licensing details.
7 */
8
9#ifndef __ECORE_PROTO_IF_H__
10#define __ECORE_PROTO_IF_H__
11
12/*
13 * PF parameters (according to personality/protocol)
14 */
15
16#define ECORE_ROCE_PROTOCOL_INDEX (3)
17
18struct ecore_eth_pf_params {
19 /* The following parameters are used during HW-init
20 * and these parameters need to be passed as arguments
21 * to update_pf_params routine invoked before slowpath start
22 */
23 u16 num_cons;
24};
25
26/* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
27struct ecore_iscsi_pf_params {
28 u64 glbl_q_params_addr;
29 u64 bdq_pbl_base_addr[2];
30 u16 cq_num_entries;
31 u16 cmdq_num_entries;
32 u32 two_msl_timer;
33 u16 tx_sws_timer;
34 /* The following parameters are used during HW-init
35 * and these parameters need to be passed as arguments
36 * to update_pf_params routine invoked before slowpath start
37 */
38 u16 num_cons;
39 u16 num_tasks;
40
41 /* The following parameters are used during protocol-init */
42 u16 half_way_close_timeout;
43 u16 bdq_xoff_threshold[2];
44 u16 bdq_xon_threshold[2];
45 u16 cmdq_xoff_threshold;
46 u16 cmdq_xon_threshold;
47 u16 rq_buffer_size;
48
49 u8 num_sq_pages_in_ring;
50 u8 num_r2tq_pages_in_ring;
51 u8 num_uhq_pages_in_ring;
52 u8 num_queues;
53 u8 log_page_size;
54 u8 rqe_log_size;
55 u8 max_fin_rt;
56 u8 gl_rq_pi;
57 u8 gl_cmd_pi;
58 u8 debug_mode;
59 u8 ll2_ooo_queue_id;
60 u8 ooo_enable;
61
62 u8 is_target;
63 u8 bdq_pbl_num_entries[2];
64};
65
66struct ecore_rdma_pf_params {
67 /* Supplied to ECORE during resource allocation (may affect the ILT and
68 * the doorbell BAR).
69 */
70 u32 min_dpis; /* number of requested DPIs */
71 u32 num_mrs; /* number of requested memory regions*/
72 u32 num_qps; /* number of requested Queue Pairs */
73 u32 num_srqs; /* number of requested SRQ */
74 u8 roce_edpm_mode; /* see QED_ROCE_EDPM_MODE_ENABLE */
75 u8 gl_pi; /* protocol index */
76
77 /* Will allocate rate limiters to be used with QPs */
78 u8 enable_dcqcn;
79};
80
81struct ecore_pf_params {
82 struct ecore_eth_pf_params eth_pf_params;
83 struct ecore_iscsi_pf_params iscsi_pf_params;
84 struct ecore_rdma_pf_params rdma_pf_params;
85};
86
87#endif