[ceph.git] / ceph / src / dpdk / examples / qos_sched / args.c

/*-
 *   BSD LICENSE
 *
 *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
 *   All rights reserved.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
 *     * Neither the name of Intel Corporation nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdint.h>
#include <locale.h>
#include <unistd.h>
#include <limits.h>
#include <getopt.h>

#include <rte_log.h>
#include <rte_eal.h>
#include <rte_lcore.h>
#include <rte_string_fns.h>

#include "main.h"

#define APP_NAME "qos_sched"
#define MAX_OPT_VALUES 8
#define SYS_CPU_DIR "/sys/devices/system/cpu/cpu%u/topology/"

static uint32_t app_master_core = 1;
static uint32_t app_numa_mask;
static uint64_t app_used_core_mask = 0;
static uint64_t app_used_port_mask = 0;
static uint64_t app_used_rx_port_mask = 0;
static uint64_t app_used_tx_port_mask = 0;


static const char usage[] =
	"                                                                               \n"
	"    %s <APP PARAMS>                                                            \n"
	"                                                                               \n"
	"Application mandatory parameters:                                              \n"
	"    --pfc \"RX PORT, TX PORT, RX LCORE, WT LCORE\" : Packet flow configuration \n"
	"           multiple pfc can be configured in command line                      \n"
	"                                                                               \n"
	"Application optional parameters:                                               \n"
        "    --i     : run in interactive mode (default value is %u)                    \n"
	"    --mst I : master core index (default value is %u)                          \n"
	"    --rsz \"A, B, C\" :   Ring sizes                                           \n"
	"           A = Size (in number of buffer descriptors) of each of the NIC RX    \n"
	"               rings read by the I/O RX lcores (default value is %u)           \n"
	"           B = Size (in number of elements) of each of the SW rings used by the\n"
	"               I/O RX lcores to send packets to worker lcores (default value is\n"
	"               %u)                                                             \n"
	"           C = Size (in number of buffer descriptors) of each of the NIC TX    \n"
	"               rings written by worker lcores (default value is %u)            \n"
	"    --bsz \"A, B, C, D\": Burst sizes                                          \n"
	"           A = I/O RX lcore read burst size from NIC RX (default value is %u)  \n"
	"           B = I/O RX lcore write burst size to output SW rings,               \n"
	"               Worker lcore read burst size from input SW rings,               \n"
	"               QoS enqueue size (default value is %u)                          \n"
	"           C = QoS dequeue size (default value is %u)                          \n"
	"           D = Worker lcore write burst size to NIC TX (default value is %u)   \n"
	"    --msz M : Mempool size (in number of mbufs) for each pfc (default %u)      \n"
	"    --rth \"A, B, C\" :   RX queue threshold parameters                        \n"
	"           A = RX prefetch threshold (default value is %u)                     \n"
	"           B = RX host threshold (default value is %u)                         \n"
	"           C = RX write-back threshold (default value is %u)                   \n"
	"    --tth \"A, B, C\" :   TX queue threshold parameters                        \n"
	"           A = TX prefetch threshold (default value is %u)                     \n"
	"           B = TX host threshold (default value is %u)                         \n"
	"           C = TX write-back threshold (default value is %u)                   \n"
	"    --cfg FILE : profile configuration to load                                 \n"
;

/* display usage */
static void
app_usage(const char *prgname)
{
	printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_master_core,
		APP_RX_DESC_DEFAULT, APP_RING_SIZE, APP_TX_DESC_DEFAULT,
		MAX_PKT_RX_BURST, PKT_ENQUEUE, PKT_DEQUEUE,
		MAX_PKT_TX_BURST, NB_MBUF,
		RX_PTHRESH, RX_HTHRESH, RX_WTHRESH,
		TX_PTHRESH, TX_HTHRESH, TX_WTHRESH
		);
}

static inline int str_is(const char *str, const char *is)
{
	return strcmp(str, is) == 0;
}

/* returns core mask used by DPDK */
static uint64_t
app_eal_core_mask(void)
{
	uint32_t i;
	uint64_t cm = 0;
	struct rte_config *cfg = rte_eal_get_configuration();

	for (i = 0; i < APP_MAX_LCORE; i++) {
		if (cfg->lcore_role[i] == ROLE_RTE)
			cm |= (1ULL << i);
	}

	cm |= (1ULL << cfg->master_lcore);

	return cm;
}


/* returns total number of cores presented in a system */
static uint32_t
app_cpu_core_count(void)
{
	int i, len;
	char path[PATH_MAX];
	uint32_t ncores = 0;

	for (i = 0; i < APP_MAX_LCORE; i++) {
		len = snprintf(path, sizeof(path), SYS_CPU_DIR, i);
		if (len <= 0 || (unsigned)len >= sizeof(path))
			continue;

		if (access(path, F_OK) == 0)
			ncores++;
	}

	return ncores;
}

/* returns:
	 number of values parsed
	-1 in case of error
*/
static int
app_parse_opt_vals(const char *conf_str, char separator, uint32_t n_vals, uint32_t *opt_vals)
{
	char *string;
	int i, n_tokens;
	char *tokens[MAX_OPT_VALUES];

	if (conf_str == NULL || opt_vals == NULL || n_vals == 0 || n_vals > MAX_OPT_VALUES)
		return -1;

	/* duplicate configuration string before splitting it to tokens */
	string = strdup(conf_str);
	if (string == NULL)
		return -1;

	n_tokens = rte_strsplit(string, strnlen(string, 32), tokens, n_vals, separator);

	if (n_tokens > MAX_OPT_VALUES)
		return -1;

	for (i = 0; i < n_tokens; i++)
		opt_vals[i] = (uint32_t)atol(tokens[i]);

	free(string);

	return n_tokens;
}

static int
app_parse_ring_conf(const char *conf_str)
{
	int ret;
	uint32_t vals[3];

	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
	if (ret != 3)
		return ret;

	ring_conf.rx_size = vals[0];
	ring_conf.ring_size = vals[1];
	ring_conf.tx_size = vals[2];

	return 0;
}

static int
app_parse_rth_conf(const char *conf_str)
{
	int ret;
	uint32_t vals[3];

	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
	if (ret != 3)
		return ret;

	rx_thresh.pthresh = (uint8_t)vals[0];
	rx_thresh.hthresh = (uint8_t)vals[1];
	rx_thresh.wthresh = (uint8_t)vals[2];

	return 0;
}

static int
app_parse_tth_conf(const char *conf_str)
{
	int ret;
	uint32_t vals[3];

	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
	if (ret != 3)
		return ret;

	tx_thresh.pthresh = (uint8_t)vals[0];
	tx_thresh.hthresh = (uint8_t)vals[1];
	tx_thresh.wthresh = (uint8_t)vals[2];

	return 0;
}

static int
app_parse_flow_conf(const char *conf_str)
{
	int ret;
	uint32_t vals[5];
	struct flow_conf *pconf;
	uint64_t mask;

	ret = app_parse_opt_vals(conf_str, ',', 6, vals);
	if (ret < 4 || ret > 5)
		return ret;

	pconf = &qos_conf[nb_pfc];

	pconf->rx_port = (uint8_t)vals[0];
	pconf->tx_port = (uint8_t)vals[1];
	pconf->rx_core = (uint8_t)vals[2];
	pconf->wt_core = (uint8_t)vals[3];
	if (ret == 5)
		pconf->tx_core = (uint8_t)vals[4];
	else
		pconf->tx_core = pconf->wt_core;

	if (pconf->rx_core == pconf->wt_core) {
		RTE_LOG(ERR, APP, "pfc %u: rx thread and worker thread cannot share same core\n", nb_pfc);
		return -1;
	}

	if (pconf->rx_port >= RTE_MAX_ETHPORTS) {
		RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu8" index\n",
				nb_pfc, pconf->rx_port);
		return -1;
	}
	if (pconf->tx_port >= RTE_MAX_ETHPORTS) {
		RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu8" index\n",
				nb_pfc, pconf->tx_port);
		return -1;
	}

	mask = 1lu << pconf->rx_port;
	if (app_used_rx_port_mask & mask) {
		RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu8" is used already\n",
				nb_pfc, pconf->rx_port);
		return -1;
	}
	app_used_rx_port_mask |= mask;
	app_used_port_mask |= mask;

	mask = 1lu << pconf->tx_port;
	if (app_used_tx_port_mask & mask) {
		RTE_LOG(ERR, APP, "pfc %u: port %"PRIu8" is used already\n",
				nb_pfc, pconf->tx_port);
		return -1;
	}
	app_used_tx_port_mask |= mask;
	app_used_port_mask |= mask;

	mask = 1lu << pconf->rx_core;
	app_used_core_mask |= mask;

	mask = 1lu << pconf->wt_core;
	app_used_core_mask |= mask;

	mask = 1lu << pconf->tx_core;
	app_used_core_mask |= mask;

	nb_pfc++;

	return 0;
}

static int
app_parse_burst_conf(const char *conf_str)
{
	int ret;
	uint32_t vals[4];

	ret = app_parse_opt_vals(conf_str, ',', 4, vals);
	if (ret != 4)
		return ret;

	burst_conf.rx_burst    = (uint16_t)vals[0];
	burst_conf.ring_burst  = (uint16_t)vals[1];
	burst_conf.qos_dequeue = (uint16_t)vals[2];
	burst_conf.tx_burst    = (uint16_t)vals[3];

	return 0;
}

/*
 * Parses the argument given in the command line of the application,
 * calculates mask for used cores and initializes EAL with calculated core mask
 */
int
app_parse_args(int argc, char **argv)
{
	int opt, ret;
	int option_index;
	const char *optname;
	char *prgname = argv[0];
	uint32_t i, nb_lcores;

	static struct option lgopts[] = {
		{ "pfc", 1, 0, 0 },
		{ "mst", 1, 0, 0 },
		{ "rsz", 1, 0, 0 },
		{ "bsz", 1, 0, 0 },
		{ "msz", 1, 0, 0 },
		{ "rth", 1, 0, 0 },
		{ "tth", 1, 0, 0 },
		{ "cfg", 1, 0, 0 },
		{ NULL,  0, 0, 0 }
	};

	/* initialize EAL first */
	ret = rte_eal_init(argc, argv);
	if (ret < 0)
		return -1;

	argc -= ret;
	argv += ret;

	/* set en_US locale to print big numbers with ',' */
	setlocale(LC_NUMERIC, "en_US.utf-8");

	while ((opt = getopt_long(argc, argv, "i",
		lgopts, &option_index)) != EOF) {

			switch (opt) {
			case 'i':
				printf("Interactive-mode selected\n");
				interactive = 1;
				break;
			/* long options */
			case 0:
				optname = lgopts[option_index].name;
				if (str_is(optname, "pfc")) {
					ret = app_parse_flow_conf(optarg);
					if (ret) {
						RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "mst")) {
					app_master_core = (uint32_t)atoi(optarg);
					break;
				}
				if (str_is(optname, "rsz")) {
					ret = app_parse_ring_conf(optarg);
					if (ret) {
						RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "bsz")) {
					ret = app_parse_burst_conf(optarg);
					if (ret) {
						RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "msz")) {
					mp_size = atoi(optarg);
					if (mp_size <= 0) {
						RTE_LOG(ERR, APP, "Invalid mempool size %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "rth")) {
					ret = app_parse_rth_conf(optarg);
					if (ret) {
						RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "tth")) {
					ret = app_parse_tth_conf(optarg);
					if (ret) {
						RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", optarg);
						return -1;
					}
					break;
				}
				if (str_is(optname, "cfg")) {
					cfg_profile = optarg;
					break;
				}
				break;

			default:
				app_usage(prgname);
				return -1;
			}
	}

	/* check master core index validity */
	for(i = 0; i <= app_master_core; i++) {
		if (app_used_core_mask & (1u << app_master_core)) {
			RTE_LOG(ERR, APP, "Master core index is not configured properly\n");
			app_usage(prgname);
			return -1;
		}
	}
	app_used_core_mask |= 1u << app_master_core;

	if ((app_used_core_mask != app_eal_core_mask()) ||
			(app_master_core != rte_get_master_lcore())) {
		RTE_LOG(ERR, APP, "EAL core mask not configured properly, must be %" PRIx64
				" instead of %" PRIx64 "\n" , app_used_core_mask, app_eal_core_mask());
		return -1;
	}

	if (nb_pfc == 0) {
		RTE_LOG(ERR, APP, "Packet flow not configured!\n");
		app_usage(prgname);
		return -1;
	}

	/* sanity check for cores assignment */
	nb_lcores = app_cpu_core_count();

	for(i = 0; i < nb_pfc; i++) {
		if (qos_conf[i].rx_core >= nb_lcores) {
			RTE_LOG(ERR, APP, "pfc %u: invalid RX lcore index %u\n", i + 1,
					qos_conf[i].rx_core);
			return -1;
		}
		if (qos_conf[i].wt_core >= nb_lcores) {
			RTE_LOG(ERR, APP, "pfc %u: invalid WT lcore index %u\n", i + 1,
					qos_conf[i].wt_core);
			return -1;
		}
		uint32_t rx_sock = rte_lcore_to_socket_id(qos_conf[i].rx_core);
		uint32_t wt_sock = rte_lcore_to_socket_id(qos_conf[i].wt_core);
		if (rx_sock != wt_sock) {
			RTE_LOG(ERR, APP, "pfc %u: RX and WT must be on the same socket\n", i + 1);
			return -1;
		}
		app_numa_mask |= 1 << rte_lcore_to_socket_id(qos_conf[i].rx_core);
	}

	return 0;
}
Commit	Line	Data
7c673cae FG	1	/*-
	2	* BSD LICENSE
	3	*
	4	* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
	5	* All rights reserved.
	6	*
	7	* Redistribution and use in source and binary forms, with or without
	8	* modification, are permitted provided that the following conditions
	9	* are met:
	10	*
	11	* * Redistributions of source code must retain the above copyright
	12	* notice, this list of conditions and the following disclaimer.
	13	* * Redistributions in binary form must reproduce the above copyright
	14	* notice, this list of conditions and the following disclaimer in
	15	* the documentation and/or other materials provided with the
	16	* distribution.
	17	* * Neither the name of Intel Corporation nor the names of its
	18	* contributors may be used to endorse or promote products derived
	19	* from this software without specific prior written permission.
	20	*
	21	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	22	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	23	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	24	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	25	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	26	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	27	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	28	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	29	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*/
	33
	34	#include <stdio.h>
	35	#include <string.h>
	36	#include <stdlib.h>
	37	#include <stdint.h>
	38	#include <locale.h>
	39	#include <unistd.h>
	40	#include <limits.h>
	41	#include <getopt.h>
	42
	43	#include <rte_log.h>
	44	#include <rte_eal.h>
	45	#include <rte_lcore.h>
	46	#include <rte_string_fns.h>
	47
	48	#include "main.h"
	49
	50	#define APP_NAME "qos_sched"
	51	#define MAX_OPT_VALUES 8
	52	#define SYS_CPU_DIR "/sys/devices/system/cpu/cpu%u/topology/"
	53
	54	static uint32_t app_master_core = 1;
	55	static uint32_t app_numa_mask;
	56	static uint64_t app_used_core_mask = 0;
	57	static uint64_t app_used_port_mask = 0;
	58	static uint64_t app_used_rx_port_mask = 0;
	59	static uint64_t app_used_tx_port_mask = 0;
	60
	61
	62	static const char usage[] =
	63	" \n"
	64	" %s <APP PARAMS> \n"
65	" \n"
66	"Application mandatory parameters: \n"
67	" --pfc \"RX PORT, TX PORT, RX LCORE, WT LCORE\" : Packet flow configuration \n"
68	" multiple pfc can be configured in command line \n"
69	" \n"
70	"Application optional parameters: \n"
71	" --i : run in interactive mode (default value is %u) \n"
72	" --mst I : master core index (default value is %u) \n"
73	" --rsz \"A, B, C\" : Ring sizes \n"
74	" A = Size (in number of buffer descriptors) of each of the NIC RX \n"
75	" rings read by the I/O RX lcores (default value is %u) \n"
76	" B = Size (in number of elements) of each of the SW rings used by the\n"
77	" I/O RX lcores to send packets to worker lcores (default value is\n"
78	" %u) \n"
79	" C = Size (in number of buffer descriptors) of each of the NIC TX \n"
80	" rings written by worker lcores (default value is %u) \n"
81	" --bsz \"A, B, C, D\": Burst sizes \n"
82	" A = I/O RX lcore read burst size from NIC RX (default value is %u) \n"
83	" B = I/O RX lcore write burst size to output SW rings, \n"
84	" Worker lcore read burst size from input SW rings, \n"
85	" QoS enqueue size (default value is %u) \n"
86	" C = QoS dequeue size (default value is %u) \n"
87	" D = Worker lcore write burst size to NIC TX (default value is %u) \n"
88	" --msz M : Mempool size (in number of mbufs) for each pfc (default %u) \n"
89	" --rth \"A, B, C\" : RX queue threshold parameters \n"
90	" A = RX prefetch threshold (default value is %u) \n"
91	" B = RX host threshold (default value is %u) \n"
92	" C = RX write-back threshold (default value is %u) \n"
93	" --tth \"A, B, C\" : TX queue threshold parameters \n"
94	" A = TX prefetch threshold (default value is %u) \n"
95	" B = TX host threshold (default value is %u) \n"
96	" C = TX write-back threshold (default value is %u) \n"
97	" --cfg FILE : profile configuration to load \n"
98	;
99
100	/* display usage */
101	static void
102	app_usage(const char *prgname)
103	{
104	printf(usage, prgname, APP_INTERACTIVE_DEFAULT, app_master_core,
105	APP_RX_DESC_DEFAULT, APP_RING_SIZE, APP_TX_DESC_DEFAULT,
106	MAX_PKT_RX_BURST, PKT_ENQUEUE, PKT_DEQUEUE,
107	MAX_PKT_TX_BURST, NB_MBUF,
108	RX_PTHRESH, RX_HTHRESH, RX_WTHRESH,
109	TX_PTHRESH, TX_HTHRESH, TX_WTHRESH
110	);
111	}
112
113	static inline int str_is(const char str, const char is)
114	{
115	return strcmp(str, is) == 0;
116	}
117
118	/* returns core mask used by DPDK */
119	static uint64_t
120	app_eal_core_mask(void)
121	{
122	uint32_t i;
123	uint64_t cm = 0;
124	struct rte_config *cfg = rte_eal_get_configuration();
125
126	for (i = 0; i < APP_MAX_LCORE; i++) {
127	if (cfg->lcore_role[i] == ROLE_RTE)
128	cm \|= (1ULL << i);
129	}
130
131	cm \|= (1ULL << cfg->master_lcore);
132
133	return cm;
134	}
135
136
137	/* returns total number of cores presented in a system */
138	static uint32_t
139	app_cpu_core_count(void)
140	{
141	int i, len;
142	char path[PATH_MAX];
143	uint32_t ncores = 0;
144
145	for (i = 0; i < APP_MAX_LCORE; i++) {
146	len = snprintf(path, sizeof(path), SYS_CPU_DIR, i);
147	if (len <= 0 \|\| (unsigned)len >= sizeof(path))
148	continue;
149
150	if (access(path, F_OK) == 0)
151	ncores++;
152	}
153
154	return ncores;
155	}
156
157	/* returns:
158	number of values parsed
159	-1 in case of error
160	*/
161	static int
162	app_parse_opt_vals(const char conf_str, char separator, uint32_t n_vals, uint32_t opt_vals)
163	{
164	char *string;
165	int i, n_tokens;
166	char *tokens[MAX_OPT_VALUES];
167
168	if (conf_str == NULL \|\| opt_vals == NULL \|\| n_vals == 0 \|\| n_vals > MAX_OPT_VALUES)
169	return -1;
170
171	/* duplicate configuration string before splitting it to tokens */
172	string = strdup(conf_str);
173	if (string == NULL)
174	return -1;
175
176	n_tokens = rte_strsplit(string, strnlen(string, 32), tokens, n_vals, separator);
177
178	if (n_tokens > MAX_OPT_VALUES)
179	return -1;
180
181	for (i = 0; i < n_tokens; i++)
182	opt_vals[i] = (uint32_t)atol(tokens[i]);
183
184	free(string);
185
186	return n_tokens;
187	}
188
189	static int
190	app_parse_ring_conf(const char *conf_str)
191	{
192	int ret;
193	uint32_t vals[3];
194
195	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
196	if (ret != 3)
197	return ret;
198
199	ring_conf.rx_size = vals[0];
200	ring_conf.ring_size = vals[1];
201	ring_conf.tx_size = vals[2];
202
203	return 0;
204	}
205
206	static int
207	app_parse_rth_conf(const char *conf_str)
208	{
209	int ret;
210	uint32_t vals[3];
211
212	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
213	if (ret != 3)
214	return ret;
215
216	rx_thresh.pthresh = (uint8_t)vals[0];
217	rx_thresh.hthresh = (uint8_t)vals[1];
218	rx_thresh.wthresh = (uint8_t)vals[2];
219
220	return 0;
221	}
222
223	static int
224	app_parse_tth_conf(const char *conf_str)
225	{
226	int ret;
227	uint32_t vals[3];
228
229	ret = app_parse_opt_vals(conf_str, ',', 3, vals);
230	if (ret != 3)
231	return ret;
232
233	tx_thresh.pthresh = (uint8_t)vals[0];
234	tx_thresh.hthresh = (uint8_t)vals[1];
235	tx_thresh.wthresh = (uint8_t)vals[2];
236
237	return 0;
238	}
239
240	static int
241	app_parse_flow_conf(const char *conf_str)
242	{
243	int ret;
244	uint32_t vals[5];
245	struct flow_conf *pconf;
246	uint64_t mask;
247
248	ret = app_parse_opt_vals(conf_str, ',', 6, vals);
249	if (ret < 4 \|\| ret > 5)
250	return ret;
251
252	pconf = &qos_conf[nb_pfc];
253
254	pconf->rx_port = (uint8_t)vals[0];
255	pconf->tx_port = (uint8_t)vals[1];
256	pconf->rx_core = (uint8_t)vals[2];
257	pconf->wt_core = (uint8_t)vals[3];
258	if (ret == 5)
259	pconf->tx_core = (uint8_t)vals[4];
260	else
261	pconf->tx_core = pconf->wt_core;
262
263	if (pconf->rx_core == pconf->wt_core) {
264	RTE_LOG(ERR, APP, "pfc %u: rx thread and worker thread cannot share same core\n", nb_pfc);
265	return -1;
266	}
267
268	if (pconf->rx_port >= RTE_MAX_ETHPORTS) {
269	RTE_LOG(ERR, APP, "pfc %u: invalid rx port %"PRIu8" index\n",
270	nb_pfc, pconf->rx_port);
271	return -1;
272	}
273	if (pconf->tx_port >= RTE_MAX_ETHPORTS) {
274	RTE_LOG(ERR, APP, "pfc %u: invalid tx port %"PRIu8" index\n",
275	nb_pfc, pconf->tx_port);
276	return -1;
277	}
278
279	mask = 1lu << pconf->rx_port;
280	if (app_used_rx_port_mask & mask) {
281	RTE_LOG(ERR, APP, "pfc %u: rx port %"PRIu8" is used already\n",
282	nb_pfc, pconf->rx_port);
283	return -1;
284	}
285	app_used_rx_port_mask \|= mask;
286	app_used_port_mask \|= mask;
287
288	mask = 1lu << pconf->tx_port;
289	if (app_used_tx_port_mask & mask) {
290	RTE_LOG(ERR, APP, "pfc %u: port %"PRIu8" is used already\n",
291	nb_pfc, pconf->tx_port);
292	return -1;
293	}
294	app_used_tx_port_mask \|= mask;
295	app_used_port_mask \|= mask;
296
297	mask = 1lu << pconf->rx_core;
298	app_used_core_mask \|= mask;
299
300	mask = 1lu << pconf->wt_core;
301	app_used_core_mask \|= mask;
302
303	mask = 1lu << pconf->tx_core;
304	app_used_core_mask \|= mask;
305
306	nb_pfc++;
307
308	return 0;
309	}
310
311	static int
312	app_parse_burst_conf(const char *conf_str)
313	{
314	int ret;
315	uint32_t vals[4];
316
317	ret = app_parse_opt_vals(conf_str, ',', 4, vals);
318	if (ret != 4)
319	return ret;
320
321	burst_conf.rx_burst = (uint16_t)vals[0];
322	burst_conf.ring_burst = (uint16_t)vals[1];
323	burst_conf.qos_dequeue = (uint16_t)vals[2];
324	burst_conf.tx_burst = (uint16_t)vals[3];
325
326	return 0;
327	}
328
329	/*
330	* Parses the argument given in the command line of the application,
331	* calculates mask for used cores and initializes EAL with calculated core mask
332	*/
333	int
334	app_parse_args(int argc, char **argv)
335	{
336	int opt, ret;
337	int option_index;
338	const char *optname;
339	char *prgname = argv[0];
340	uint32_t i, nb_lcores;
341
342	static struct option lgopts[] = {
343	{ "pfc", 1, 0, 0 },
344	{ "mst", 1, 0, 0 },
345	{ "rsz", 1, 0, 0 },
346	{ "bsz", 1, 0, 0 },
347	{ "msz", 1, 0, 0 },
348	{ "rth", 1, 0, 0 },
349	{ "tth", 1, 0, 0 },
350	{ "cfg", 1, 0, 0 },
351	{ NULL, 0, 0, 0 }
352	};
353
354	/* initialize EAL first */
355	ret = rte_eal_init(argc, argv);
356	if (ret < 0)
357	return -1;
358
359	argc -= ret;
360	argv += ret;
361
362	/* set en_US locale to print big numbers with ',' */
363	setlocale(LC_NUMERIC, "en_US.utf-8");
364
365	while ((opt = getopt_long(argc, argv, "i",
366	lgopts, &option_index)) != EOF) {
367
368	switch (opt) {
369	case 'i':
370	printf("Interactive-mode selected\n");
371	interactive = 1;
372	break;
373	/* long options */
374	case 0:
375	optname = lgopts[option_index].name;
376	if (str_is(optname, "pfc")) {
377	ret = app_parse_flow_conf(optarg);
378	if (ret) {
379	RTE_LOG(ERR, APP, "Invalid pipe configuration %s\n", optarg);
380	return -1;
381	}
382	break;
383	}
384	if (str_is(optname, "mst")) {
385	app_master_core = (uint32_t)atoi(optarg);
386	break;
387	}
388	if (str_is(optname, "rsz")) {
389	ret = app_parse_ring_conf(optarg);
390	if (ret) {
391	RTE_LOG(ERR, APP, "Invalid ring configuration %s\n", optarg);
392	return -1;
393	}
394	break;
395	}
396	if (str_is(optname, "bsz")) {
397	ret = app_parse_burst_conf(optarg);
398	if (ret) {
399	RTE_LOG(ERR, APP, "Invalid burst configuration %s\n", optarg);
400	return -1;
401	}
402	break;
403	}
404	if (str_is(optname, "msz")) {
405	mp_size = atoi(optarg);
406	if (mp_size <= 0) {
407	RTE_LOG(ERR, APP, "Invalid mempool size %s\n", optarg);
408	return -1;
409	}
410	break;
411	}
412	if (str_is(optname, "rth")) {
413	ret = app_parse_rth_conf(optarg);
414	if (ret) {
415	RTE_LOG(ERR, APP, "Invalid RX threshold configuration %s\n", optarg);
416	return -1;
417	}
418	break;
419	}
420	if (str_is(optname, "tth")) {
421	ret = app_parse_tth_conf(optarg);
422	if (ret) {
423	RTE_LOG(ERR, APP, "Invalid TX threshold configuration %s\n", optarg);
424	return -1;
425	}
426	break;
427	}
428	if (str_is(optname, "cfg")) {
429	cfg_profile = optarg;
430	break;
431	}
432	break;
433
434	default:
435	app_usage(prgname);
436	return -1;
437	}
438	}
439
440	/* check master core index validity */
441	for(i = 0; i <= app_master_core; i++) {
442	if (app_used_core_mask & (1u << app_master_core)) {
443	RTE_LOG(ERR, APP, "Master core index is not configured properly\n");
444	app_usage(prgname);
445	return -1;
446	}
447	}
448	app_used_core_mask \|= 1u << app_master_core;
449
450	if ((app_used_core_mask != app_eal_core_mask()) \|\|
451	(app_master_core != rte_get_master_lcore())) {
452	RTE_LOG(ERR, APP, "EAL core mask not configured properly, must be %" PRIx64
453	" instead of %" PRIx64 "\n" , app_used_core_mask, app_eal_core_mask());
454	return -1;
455	}
456
457	if (nb_pfc == 0) {
458	RTE_LOG(ERR, APP, "Packet flow not configured!\n");
459	app_usage(prgname);
460	return -1;
461	}
462
463	/* sanity check for cores assignment */
464	nb_lcores = app_cpu_core_count();
465
466	for(i = 0; i < nb_pfc; i++) {
467	if (qos_conf[i].rx_core >= nb_lcores) {
468	RTE_LOG(ERR, APP, "pfc %u: invalid RX lcore index %u\n", i + 1,
469	qos_conf[i].rx_core);
470	return -1;
471	}
472	if (qos_conf[i].wt_core >= nb_lcores) {
473	RTE_LOG(ERR, APP, "pfc %u: invalid WT lcore index %u\n", i + 1,
474	qos_conf[i].wt_core);
475	return -1;
476	}
477	uint32_t rx_sock = rte_lcore_to_socket_id(qos_conf[i].rx_core);
478	uint32_t wt_sock = rte_lcore_to_socket_id(qos_conf[i].wt_core);
479	if (rx_sock != wt_sock) {
480	RTE_LOG(ERR, APP, "pfc %u: RX and WT must be on the same socket\n", i + 1);
481	return -1;
482	}
483	app_numa_mask \|= 1 << rte_lcore_to_socket_id(qos_conf[i].rx_core);
484	}
485
486	return 0;
487	}