projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| 7c673cae FG |
1 | /* |
| 2 | * BSD LICENSE | |
| 3 | * | |
| 4 | * Copyright(c) 2015 RehiveTech. All rights reserved. | |
| 5 | * | |
| 6 | * Redistribution and use in source and binary forms, with or without | |
| 7 | * modification, are permitted provided that the following conditions | |
| 8 | * are met: | |
| 9 | * | |
| 10 | * * Redistributions of source code must retain the above copyright | |
| 11 | * notice, this list of conditions and the following disclaimer. | |
| 12 | * * Redistributions in binary form must reproduce the above copyright | |
| 13 | * notice, this list of conditions and the following disclaimer in | |
| 14 | * the documentation and/or other materials provided with the | |
| 15 | * distribution. | |
| 16 | * * Neither the name of RehiveTech nor the names of its | |
| 17 | * contributors may be used to endorse or promote products derived | |
| 18 | * from this software without specific prior written permission. | |
| 19 | * | |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| 21 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| 22 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
| 23 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
| 24 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| 25 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
| 26 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
| 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
| 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 31 | */ | |
| 32 | ||
| 33 | #ifndef _RTE_BYTEORDER_ARM_H_ | |
| 34 | #define _RTE_BYTEORDER_ARM_H_ | |
| 35 | ||
| 36 | #ifndef RTE_FORCE_INTRINSICS | |
| 37 | # error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS | |
| 38 | #endif | |
| 39 | ||
| 40 | #ifdef __cplusplus | |
| 41 | extern "C" { | |
| 42 | #endif | |
| 43 | ||
| 44 | #include <stdint.h> | |
| 45 | #include <rte_common.h> | |
| 46 | #include "generic/rte_byteorder.h" | |
| 47 | ||
| 48 | /* fix missing __builtin_bswap16 for gcc older then 4.8 */ | |
| 49 | #if !(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)) | |
| 50 | ||
| 51 | static inline uint16_t rte_arch_bswap16(uint16_t _x) | |
| 52 | { | |
| 53 | register uint16_t x = _x; | |
| 54 | ||
| 55 | asm volatile ("rev16 %0,%1" | |
| 56 | : "=r" (x) | |
| 57 | : "r" (x) | |
| 58 | ); | |
| 59 | return x; | |
| 60 | } | |
| 61 | ||
| 62 | #define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \ | |
| 63 | rte_constant_bswap16(x) : \ | |
| 64 | rte_arch_bswap16(x))) | |
| 65 | #endif | |
| 66 | ||
| 67 | /* ARM architecture is bi-endian (both big and little). */ | |
| 68 | #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN | |
| 69 | ||
| 70 | #define rte_cpu_to_le_16(x) (x) | |
| 71 | #define rte_cpu_to_le_32(x) (x) | |
| 72 | #define rte_cpu_to_le_64(x) (x) | |
| 73 | ||
| 74 | #define rte_cpu_to_be_16(x) rte_bswap16(x) | |
| 75 | #define rte_cpu_to_be_32(x) rte_bswap32(x) | |
| 76 | #define rte_cpu_to_be_64(x) rte_bswap64(x) | |
| 77 | ||
| 78 | #define rte_le_to_cpu_16(x) (x) | |
| 79 | #define rte_le_to_cpu_32(x) (x) | |
| 80 | #define rte_le_to_cpu_64(x) (x) | |
| 81 | ||
| 82 | #define rte_be_to_cpu_16(x) rte_bswap16(x) | |
| 83 | #define rte_be_to_cpu_32(x) rte_bswap32(x) | |
| 84 | #define rte_be_to_cpu_64(x) rte_bswap64(x) | |
| 85 | ||
| 86 | #else /* RTE_BIG_ENDIAN */ | |
| 87 | ||
| 88 | #define rte_cpu_to_le_16(x) rte_bswap16(x) | |
| 89 | #define rte_cpu_to_le_32(x) rte_bswap32(x) | |
| 90 | #define rte_cpu_to_le_64(x) rte_bswap64(x) | |
| 91 | ||
| 92 | #define rte_cpu_to_be_16(x) (x) | |
| 93 | #define rte_cpu_to_be_32(x) (x) | |
| 94 | #define rte_cpu_to_be_64(x) (x) | |
| 95 | ||
| 96 | #define rte_le_to_cpu_16(x) rte_bswap16(x) | |
| 97 | #define rte_le_to_cpu_32(x) rte_bswap32(x) | |
| 98 | #define rte_le_to_cpu_64(x) rte_bswap64(x) | |
| 99 | ||
| 100 | #define rte_be_to_cpu_16(x) (x) | |
| 101 | #define rte_be_to_cpu_32(x) (x) | |
| 102 | #define rte_be_to_cpu_64(x) (x) | |
| 103 | #endif | |
| 104 | ||
| 105 | #ifdef __cplusplus | |
| 106 | } | |
| 107 | #endif | |
| 108 | ||
| 109 | #endif /* _RTE_BYTEORDER_ARM_H_ */ |