[ceph.git] / ceph / src / dpdk / lib / librte_eal / common / include / arch / x86 / rte_byteorder.h

/*-
 *   BSD LICENSE
 *
 *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
 *   All rights reserved.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
 *     * Neither the name of Intel Corporation nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _RTE_BYTEORDER_X86_H_
#define _RTE_BYTEORDER_X86_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>
#include <rte_common.h>
#include "generic/rte_byteorder.h"

#ifndef RTE_BYTE_ORDER
#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN
#endif

/*
 * An architecture-optimized byte swap for a 16-bit value.
 *
 * Do not use this function directly. The preferred function is rte_bswap16().
 */
static inline uint16_t rte_arch_bswap16(uint16_t _x)
{
	register uint16_t x = _x;
	asm volatile ("xchgb %b[x1],%h[x2]"
		      : [x1] "=Q" (x)
		      : [x2] "0" (x)
		      );
	return x;
}

/*
 * An architecture-optimized byte swap for a 32-bit value.
 *
 * Do not use this function directly. The preferred function is rte_bswap32().
 */
static inline uint32_t rte_arch_bswap32(uint32_t _x)
{
	register uint32_t x = _x;
	asm volatile ("bswap %[x]"
		      : [x] "+r" (x)
		      );
	return x;
}

#ifndef RTE_FORCE_INTRINSICS
#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ?		\
				   rte_constant_bswap16(x) :		\
				   rte_arch_bswap16(x)))

#define rte_bswap32(x) ((uint32_t)(__builtin_constant_p(x) ?		\
				   rte_constant_bswap32(x) :		\
				   rte_arch_bswap32(x)))

#define rte_bswap64(x) ((uint64_t)(__builtin_constant_p(x) ?		\
				   rte_constant_bswap64(x) :		\
				   rte_arch_bswap64(x)))
#else
/*
 * __builtin_bswap16 is only available gcc 4.8 and upwards
 */
#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ?		\
				   rte_constant_bswap16(x) :		\
				   rte_arch_bswap16(x)))
#endif
#endif

#define rte_cpu_to_le_16(x) (x)
#define rte_cpu_to_le_32(x) (x)
#define rte_cpu_to_le_64(x) (x)

#define rte_cpu_to_be_16(x) rte_bswap16(x)
#define rte_cpu_to_be_32(x) rte_bswap32(x)
#define rte_cpu_to_be_64(x) rte_bswap64(x)

#define rte_le_to_cpu_16(x) (x)
#define rte_le_to_cpu_32(x) (x)
#define rte_le_to_cpu_64(x) (x)

#define rte_be_to_cpu_16(x) rte_bswap16(x)
#define rte_be_to_cpu_32(x) rte_bswap32(x)
#define rte_be_to_cpu_64(x) rte_bswap64(x)

#ifdef RTE_ARCH_I686
#include "rte_byteorder_32.h"
#else
#include "rte_byteorder_64.h"
#endif

#ifdef __cplusplus
}
#endif

#endif /* _RTE_BYTEORDER_X86_H_ */
Commit	Line	Data
7c673cae FG	1	/*-
	2	* BSD LICENSE
	3	*
	4	* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
	5	* All rights reserved.
	6	*
	7	* Redistribution and use in source and binary forms, with or without
	8	* modification, are permitted provided that the following conditions
	9	* are met:
	10	*
	11	* * Redistributions of source code must retain the above copyright
	12	* notice, this list of conditions and the following disclaimer.
	13	* * Redistributions in binary form must reproduce the above copyright
	14	* notice, this list of conditions and the following disclaimer in
	15	* the documentation and/or other materials provided with the
	16	* distribution.
	17	* * Neither the name of Intel Corporation nor the names of its
	18	* contributors may be used to endorse or promote products derived
	19	* from this software without specific prior written permission.
	20	*
	21	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	22	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	23	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	24	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	25	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	26	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	27	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	28	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	29	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*/
	33
	34	#ifndef _RTE_BYTEORDER_X86_H_
	35	#define _RTE_BYTEORDER_X86_H_
	36
	37	#ifdef __cplusplus
	38	extern "C" {
	39	#endif
	40
	41	#include <stdint.h>
	42	#include <rte_common.h>
	43	#include "generic/rte_byteorder.h"
	44
	45	#ifndef RTE_BYTE_ORDER
	46	#define RTE_BYTE_ORDER RTE_LITTLE_ENDIAN
	47	#endif
	48
	49	/*
	50	* An architecture-optimized byte swap for a 16-bit value.
	51	*
	52	* Do not use this function directly. The preferred function is rte_bswap16().
	53	*/
	54	static inline uint16_t rte_arch_bswap16(uint16_t _x)
	55	{
	56	register uint16_t x = _x;
	57	asm volatile ("xchgb %b[x1],%h[x2]"
	58	: [x1] "=Q" (x)
	59	: [x2] "0" (x)
	60	);
	61	return x;
	62	}
	63
	64	/*
65	* An architecture-optimized byte swap for a 32-bit value.
66	*
67	* Do not use this function directly. The preferred function is rte_bswap32().
68	*/
69	static inline uint32_t rte_arch_bswap32(uint32_t _x)
70	{
71	register uint32_t x = _x;
72	asm volatile ("bswap %[x]"
73	: [x] "+r" (x)
74	);
75	return x;
76	}
77
78	#ifndef RTE_FORCE_INTRINSICS
79	#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \
80	rte_constant_bswap16(x) : \
81	rte_arch_bswap16(x)))
82
83	#define rte_bswap32(x) ((uint32_t)(__builtin_constant_p(x) ? \
84	rte_constant_bswap32(x) : \
85	rte_arch_bswap32(x)))
86
87	#define rte_bswap64(x) ((uint64_t)(__builtin_constant_p(x) ? \
88	rte_constant_bswap64(x) : \
89	rte_arch_bswap64(x)))
90	#else
91	/*
92	* __builtin_bswap16 is only available gcc 4.8 and upwards
93	*/
94	#if __GNUC__ < 4 \|\| (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
95	#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \
96	rte_constant_bswap16(x) : \
97	rte_arch_bswap16(x)))
98	#endif
99	#endif
100
101	#define rte_cpu_to_le_16(x) (x)
102	#define rte_cpu_to_le_32(x) (x)
103	#define rte_cpu_to_le_64(x) (x)
104
105	#define rte_cpu_to_be_16(x) rte_bswap16(x)
106	#define rte_cpu_to_be_32(x) rte_bswap32(x)
107	#define rte_cpu_to_be_64(x) rte_bswap64(x)
108
109	#define rte_le_to_cpu_16(x) (x)
110	#define rte_le_to_cpu_32(x) (x)
111	#define rte_le_to_cpu_64(x) (x)
112
113	#define rte_be_to_cpu_16(x) rte_bswap16(x)
114	#define rte_be_to_cpu_32(x) rte_bswap32(x)
115	#define rte_be_to_cpu_64(x) rte_bswap64(x)
116
117	#ifdef RTE_ARCH_I686
118	#include "rte_byteorder_32.h"
119	#else
120	#include "rte_byteorder_64.h"
121	#endif
122
123	#ifdef __cplusplus
124	}
125	#endif
126
127	#endif /* _RTE_BYTEORDER_X86_H_ */