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1/*-
2 * BSD LICENSE
3 *
4 * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _RTE_PREFETCH_H_
35#define _RTE_PREFETCH_H_
36
37/**
38 * @file
39 *
40 * Prefetch operations.
41 *
42 * This file defines an API for prefetch macros / inline-functions,
43 * which are architecture-dependent. Prefetching occurs when a
44 * processor requests an instruction or data from memory to cache
45 * before it is actually needed, potentially speeding up the execution of the
46 * program.
47 */
48
49/**
50 * Prefetch a cache line into all cache levels.
51 * @param p
52 * Address to prefetch
53 */
54static inline void rte_prefetch0(const volatile void *p);
55
56/**
57 * Prefetch a cache line into all cache levels except the 0th cache level.
58 * @param p
59 * Address to prefetch
60 */
61static inline void rte_prefetch1(const volatile void *p);
62
63/**
64 * Prefetch a cache line into all cache levels except the 0th and 1th cache
65 * levels.
66 * @param p
67 * Address to prefetch
68 */
69static inline void rte_prefetch2(const volatile void *p);
70
71/**
72 * Prefetch a cache line into all cache levels (non-temporal/transient version)
73 *
74 * The non-temporal prefetch is intended as a prefetch hint that processor will
75 * use the prefetched data only once or short period, unlike the
76 * rte_prefetch0() function which imply that prefetched data to use repeatedly.
77 *
78 * @param p
79 * Address to prefetch
80 */
81static inline void rte_prefetch_non_temporal(const volatile void *p);
82
83#endif /* _RTE_PREFETCH_H_ */