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1 | /*- |
2 | * BSD LICENSE | |
3 | * | |
4 | * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. | |
5 | * All rights reserved. | |
6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | |
10 | * | |
11 | * * Redistributions of source code must retain the above copyright | |
12 | * notice, this list of conditions and the following disclaimer. | |
13 | * * Redistributions in binary form must reproduce the above copyright | |
14 | * notice, this list of conditions and the following disclaimer in | |
15 | * the documentation and/or other materials provided with the | |
16 | * distribution. | |
17 | * * Neither the name of Intel Corporation nor the names of its | |
18 | * contributors may be used to endorse or promote products derived | |
19 | * from this software without specific prior written permission. | |
20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
22 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
23 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
24 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
25 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
26 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
27 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
28 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
29 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
32 | */ | |
33 | ||
34 | #include <stdio.h> | |
35 | #include <string.h> | |
36 | ||
37 | #include <rte_common.h> | |
38 | #include <rte_log.h> | |
39 | #include <rte_memory.h> | |
40 | #include <rte_malloc.h> | |
41 | #include <rte_cycles.h> | |
42 | #include <rte_prefetch.h> | |
43 | #include <rte_branch_prediction.h> | |
44 | #include <rte_mbuf.h> | |
45 | ||
46 | #include "rte_sched.h" | |
47 | #include "rte_bitmap.h" | |
48 | #include "rte_sched_common.h" | |
49 | #include "rte_approx.h" | |
50 | #include "rte_reciprocal.h" | |
51 | ||
52 | #ifdef __INTEL_COMPILER | |
53 | #pragma warning(disable:2259) /* conversion may lose significant bits */ | |
54 | #endif | |
55 | ||
56 | #ifdef RTE_SCHED_VECTOR | |
57 | #include <rte_vect.h> | |
58 | ||
59 | #if defined(__SSE4__) | |
60 | #define SCHED_VECTOR_SSE4 | |
61 | #endif | |
62 | ||
63 | #endif | |
64 | ||
65 | #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7) | |
66 | #define RTE_SCHED_WRR_SHIFT 3 | |
67 | #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE) | |
68 | #define RTE_SCHED_PIPE_INVALID UINT32_MAX | |
69 | #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX | |
70 | ||
71 | /* Scaling for cycles_per_byte calculation | |
72 | * Chosen so that minimum rate is 480 bit/sec | |
73 | */ | |
74 | #define RTE_SCHED_TIME_SHIFT 8 | |
75 | ||
76 | struct rte_sched_subport { | |
77 | /* Token bucket (TB) */ | |
78 | uint64_t tb_time; /* time of last update */ | |
79 | uint32_t tb_period; | |
80 | uint32_t tb_credits_per_period; | |
81 | uint32_t tb_size; | |
82 | uint32_t tb_credits; | |
83 | ||
84 | /* Traffic classes (TCs) */ | |
85 | uint64_t tc_time; /* time of next update */ | |
86 | uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
87 | uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
88 | uint32_t tc_period; | |
89 | ||
90 | /* TC oversubscription */ | |
91 | uint32_t tc_ov_wm; | |
92 | uint32_t tc_ov_wm_min; | |
93 | uint32_t tc_ov_wm_max; | |
94 | uint8_t tc_ov_period_id; | |
95 | uint8_t tc_ov; | |
96 | uint32_t tc_ov_n; | |
97 | double tc_ov_rate; | |
98 | ||
99 | /* Statistics */ | |
100 | struct rte_sched_subport_stats stats; | |
101 | }; | |
102 | ||
103 | struct rte_sched_pipe_profile { | |
104 | /* Token bucket (TB) */ | |
105 | uint32_t tb_period; | |
106 | uint32_t tb_credits_per_period; | |
107 | uint32_t tb_size; | |
108 | ||
109 | /* Pipe traffic classes */ | |
110 | uint32_t tc_period; | |
111 | uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
112 | uint8_t tc_ov_weight; | |
113 | ||
114 | /* Pipe queues */ | |
115 | uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE]; | |
116 | }; | |
117 | ||
118 | struct rte_sched_pipe { | |
119 | /* Token bucket (TB) */ | |
120 | uint64_t tb_time; /* time of last update */ | |
121 | uint32_t tb_credits; | |
122 | ||
123 | /* Pipe profile and flags */ | |
124 | uint32_t profile; | |
125 | ||
126 | /* Traffic classes (TCs) */ | |
127 | uint64_t tc_time; /* time of next update */ | |
128 | uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
129 | ||
130 | /* Weighted Round Robin (WRR) */ | |
131 | uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE]; | |
132 | ||
133 | /* TC oversubscription */ | |
134 | uint32_t tc_ov_credits; | |
135 | uint8_t tc_ov_period_id; | |
136 | uint8_t reserved[3]; | |
137 | } __rte_cache_aligned; | |
138 | ||
139 | struct rte_sched_queue { | |
140 | uint16_t qw; | |
141 | uint16_t qr; | |
142 | }; | |
143 | ||
144 | struct rte_sched_queue_extra { | |
145 | struct rte_sched_queue_stats stats; | |
146 | #ifdef RTE_SCHED_RED | |
147 | struct rte_red red; | |
148 | #endif | |
149 | }; | |
150 | ||
151 | enum grinder_state { | |
152 | e_GRINDER_PREFETCH_PIPE = 0, | |
153 | e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS, | |
154 | e_GRINDER_PREFETCH_MBUF, | |
155 | e_GRINDER_READ_MBUF | |
156 | }; | |
157 | ||
158 | /* | |
159 | * Path through the scheduler hierarchy used by the scheduler enqueue | |
160 | * operation to identify the destination queue for the current | |
161 | * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of | |
162 | * each packet, typically written by the classification stage and read | |
163 | * by scheduler enqueue. | |
164 | */ | |
165 | struct rte_sched_port_hierarchy { | |
166 | uint16_t queue:2; /**< Queue ID (0 .. 3) */ | |
167 | uint16_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/ | |
168 | uint32_t color:2; /**< Color */ | |
169 | uint16_t unused:10; | |
170 | uint16_t subport; /**< Subport ID */ | |
171 | uint32_t pipe; /**< Pipe ID */ | |
172 | }; | |
173 | ||
174 | struct rte_sched_grinder { | |
175 | /* Pipe cache */ | |
176 | uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE]; | |
177 | uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE]; | |
178 | uint32_t pcache_w; | |
179 | uint32_t pcache_r; | |
180 | ||
181 | /* Current pipe */ | |
182 | enum grinder_state state; | |
183 | uint32_t productive; | |
184 | uint32_t pindex; | |
185 | struct rte_sched_subport *subport; | |
186 | struct rte_sched_pipe *pipe; | |
187 | struct rte_sched_pipe_profile *pipe_params; | |
188 | ||
189 | /* TC cache */ | |
190 | uint8_t tccache_qmask[4]; | |
191 | uint32_t tccache_qindex[4]; | |
192 | uint32_t tccache_w; | |
193 | uint32_t tccache_r; | |
194 | ||
195 | /* Current TC */ | |
196 | uint32_t tc_index; | |
197 | struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
198 | struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
199 | uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
200 | uint16_t qsize; | |
201 | uint32_t qmask; | |
202 | uint32_t qpos; | |
203 | struct rte_mbuf *pkt; | |
204 | ||
205 | /* WRR */ | |
206 | uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS]; | |
207 | uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS]; | |
208 | uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS]; | |
209 | }; | |
210 | ||
211 | struct rte_sched_port { | |
212 | /* User parameters */ | |
213 | uint32_t n_subports_per_port; | |
214 | uint32_t n_pipes_per_subport; | |
215 | uint32_t rate; | |
216 | uint32_t mtu; | |
217 | uint32_t frame_overhead; | |
218 | uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
219 | uint32_t n_pipe_profiles; | |
220 | uint32_t pipe_tc3_rate_max; | |
221 | #ifdef RTE_SCHED_RED | |
222 | struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS]; | |
223 | #endif | |
224 | ||
225 | /* Timing */ | |
226 | uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */ | |
227 | uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */ | |
228 | uint64_t time; /* Current NIC TX time measured in bytes */ | |
229 | struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */ | |
230 | ||
231 | /* Scheduling loop detection */ | |
232 | uint32_t pipe_loop; | |
233 | uint32_t pipe_exhaustion; | |
234 | ||
235 | /* Bitmap */ | |
236 | struct rte_bitmap *bmp; | |
237 | uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16; | |
238 | ||
239 | /* Grinders */ | |
240 | struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS]; | |
241 | uint32_t busy_grinders; | |
242 | struct rte_mbuf **pkts_out; | |
243 | uint32_t n_pkts_out; | |
244 | ||
245 | /* Queue base calculation */ | |
246 | uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE]; | |
247 | uint32_t qsize_sum; | |
248 | ||
249 | /* Large data structures */ | |
250 | struct rte_sched_subport *subport; | |
251 | struct rte_sched_pipe *pipe; | |
252 | struct rte_sched_queue *queue; | |
253 | struct rte_sched_queue_extra *queue_extra; | |
254 | struct rte_sched_pipe_profile *pipe_profiles; | |
255 | uint8_t *bmp_array; | |
256 | struct rte_mbuf **queue_array; | |
257 | uint8_t memory[0] __rte_cache_aligned; | |
258 | } __rte_cache_aligned; | |
259 | ||
260 | enum rte_sched_port_array { | |
261 | e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0, | |
262 | e_RTE_SCHED_PORT_ARRAY_PIPE, | |
263 | e_RTE_SCHED_PORT_ARRAY_QUEUE, | |
264 | e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA, | |
265 | e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES, | |
266 | e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY, | |
267 | e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY, | |
268 | e_RTE_SCHED_PORT_ARRAY_TOTAL, | |
269 | }; | |
270 | ||
271 | #ifdef RTE_SCHED_COLLECT_STATS | |
272 | ||
273 | static inline uint32_t | |
274 | rte_sched_port_queues_per_subport(struct rte_sched_port *port) | |
275 | { | |
276 | return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport; | |
277 | } | |
278 | ||
279 | #endif | |
280 | ||
281 | static inline uint32_t | |
282 | rte_sched_port_queues_per_port(struct rte_sched_port *port) | |
283 | { | |
284 | return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port; | |
285 | } | |
286 | ||
287 | static inline struct rte_mbuf ** | |
288 | rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex) | |
289 | { | |
290 | uint32_t pindex = qindex >> 4; | |
291 | uint32_t qpos = qindex & 0xF; | |
292 | ||
293 | return (port->queue_array + pindex * | |
294 | port->qsize_sum + port->qsize_add[qpos]); | |
295 | } | |
296 | ||
297 | static inline uint16_t | |
298 | rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex) | |
299 | { | |
300 | uint32_t tc = (qindex >> 2) & 0x3; | |
301 | ||
302 | return port->qsize[tc]; | |
303 | } | |
304 | ||
305 | static int | |
306 | rte_sched_port_check_params(struct rte_sched_port_params *params) | |
307 | { | |
308 | uint32_t i, j; | |
309 | ||
310 | if (params == NULL) | |
311 | return -1; | |
312 | ||
313 | /* socket */ | |
314 | if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) | |
315 | return -3; | |
316 | ||
317 | /* rate */ | |
318 | if (params->rate == 0) | |
319 | return -4; | |
320 | ||
321 | /* mtu */ | |
322 | if (params->mtu == 0) | |
323 | return -5; | |
324 | ||
325 | /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */ | |
326 | if (params->n_subports_per_port == 0 || | |
327 | params->n_subports_per_port > 1u << 16 || | |
328 | !rte_is_power_of_2(params->n_subports_per_port)) | |
329 | return -6; | |
330 | ||
331 | /* n_pipes_per_subport: non-zero, power of 2 */ | |
332 | if (params->n_pipes_per_subport == 0 || | |
333 | !rte_is_power_of_2(params->n_pipes_per_subport)) | |
334 | return -7; | |
335 | ||
336 | /* qsize: non-zero, power of 2, | |
337 | * no bigger than 32K (due to 16-bit read/write pointers) | |
338 | */ | |
339 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { | |
340 | uint16_t qsize = params->qsize[i]; | |
341 | ||
342 | if (qsize == 0 || !rte_is_power_of_2(qsize)) | |
343 | return -8; | |
344 | } | |
345 | ||
346 | /* pipe_profiles and n_pipe_profiles */ | |
347 | if (params->pipe_profiles == NULL || | |
348 | params->n_pipe_profiles == 0 || | |
349 | params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT) | |
350 | return -9; | |
351 | ||
352 | for (i = 0; i < params->n_pipe_profiles; i++) { | |
353 | struct rte_sched_pipe_params *p = params->pipe_profiles + i; | |
354 | ||
355 | /* TB rate: non-zero, not greater than port rate */ | |
356 | if (p->tb_rate == 0 || p->tb_rate > params->rate) | |
357 | return -10; | |
358 | ||
359 | /* TB size: non-zero */ | |
360 | if (p->tb_size == 0) | |
361 | return -11; | |
362 | ||
363 | /* TC rate: non-zero, less than pipe rate */ | |
364 | for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) { | |
365 | if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate) | |
366 | return -12; | |
367 | } | |
368 | ||
369 | /* TC period: non-zero */ | |
370 | if (p->tc_period == 0) | |
371 | return -13; | |
372 | ||
373 | #ifdef RTE_SCHED_SUBPORT_TC_OV | |
374 | /* TC3 oversubscription weight: non-zero */ | |
375 | if (p->tc_ov_weight == 0) | |
376 | return -14; | |
377 | #endif | |
378 | ||
379 | /* Queue WRR weights: non-zero */ | |
380 | for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) { | |
381 | if (p->wrr_weights[j] == 0) | |
382 | return -15; | |
383 | } | |
384 | } | |
385 | ||
386 | return 0; | |
387 | } | |
388 | ||
389 | static uint32_t | |
390 | rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array) | |
391 | { | |
392 | uint32_t n_subports_per_port = params->n_subports_per_port; | |
393 | uint32_t n_pipes_per_subport = params->n_pipes_per_subport; | |
394 | uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port; | |
395 | uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port; | |
396 | ||
397 | uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport); | |
398 | uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe); | |
399 | uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue); | |
400 | uint32_t size_queue_extra | |
401 | = n_queues_per_port * sizeof(struct rte_sched_queue_extra); | |
402 | uint32_t size_pipe_profiles | |
403 | = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile); | |
404 | uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port); | |
405 | uint32_t size_per_pipe_queue_array, size_queue_array; | |
406 | ||
407 | uint32_t base, i; | |
408 | ||
409 | size_per_pipe_queue_array = 0; | |
410 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { | |
411 | size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS | |
412 | * params->qsize[i] * sizeof(struct rte_mbuf *); | |
413 | } | |
414 | size_queue_array = n_pipes_per_port * size_per_pipe_queue_array; | |
415 | ||
416 | base = 0; | |
417 | ||
418 | if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) | |
419 | return base; | |
420 | base += RTE_CACHE_LINE_ROUNDUP(size_subport); | |
421 | ||
422 | if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) | |
423 | return base; | |
424 | base += RTE_CACHE_LINE_ROUNDUP(size_pipe); | |
425 | ||
426 | if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) | |
427 | return base; | |
428 | base += RTE_CACHE_LINE_ROUNDUP(size_queue); | |
429 | ||
430 | if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) | |
431 | return base; | |
432 | base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra); | |
433 | ||
434 | if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) | |
435 | return base; | |
436 | base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles); | |
437 | ||
438 | if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) | |
439 | return base; | |
440 | base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array); | |
441 | ||
442 | if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) | |
443 | return base; | |
444 | base += RTE_CACHE_LINE_ROUNDUP(size_queue_array); | |
445 | ||
446 | return base; | |
447 | } | |
448 | ||
449 | uint32_t | |
450 | rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params) | |
451 | { | |
452 | uint32_t size0, size1; | |
453 | int status; | |
454 | ||
455 | status = rte_sched_port_check_params(params); | |
456 | if (status != 0) { | |
457 | RTE_LOG(NOTICE, SCHED, | |
458 | "Port scheduler params check failed (%d)\n", status); | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
463 | size0 = sizeof(struct rte_sched_port); | |
464 | size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL); | |
465 | ||
466 | return size0 + size1; | |
467 | } | |
468 | ||
469 | static void | |
470 | rte_sched_port_config_qsize(struct rte_sched_port *port) | |
471 | { | |
472 | /* TC 0 */ | |
473 | port->qsize_add[0] = 0; | |
474 | port->qsize_add[1] = port->qsize_add[0] + port->qsize[0]; | |
475 | port->qsize_add[2] = port->qsize_add[1] + port->qsize[0]; | |
476 | port->qsize_add[3] = port->qsize_add[2] + port->qsize[0]; | |
477 | ||
478 | /* TC 1 */ | |
479 | port->qsize_add[4] = port->qsize_add[3] + port->qsize[0]; | |
480 | port->qsize_add[5] = port->qsize_add[4] + port->qsize[1]; | |
481 | port->qsize_add[6] = port->qsize_add[5] + port->qsize[1]; | |
482 | port->qsize_add[7] = port->qsize_add[6] + port->qsize[1]; | |
483 | ||
484 | /* TC 2 */ | |
485 | port->qsize_add[8] = port->qsize_add[7] + port->qsize[1]; | |
486 | port->qsize_add[9] = port->qsize_add[8] + port->qsize[2]; | |
487 | port->qsize_add[10] = port->qsize_add[9] + port->qsize[2]; | |
488 | port->qsize_add[11] = port->qsize_add[10] + port->qsize[2]; | |
489 | ||
490 | /* TC 3 */ | |
491 | port->qsize_add[12] = port->qsize_add[11] + port->qsize[2]; | |
492 | port->qsize_add[13] = port->qsize_add[12] + port->qsize[3]; | |
493 | port->qsize_add[14] = port->qsize_add[13] + port->qsize[3]; | |
494 | port->qsize_add[15] = port->qsize_add[14] + port->qsize[3]; | |
495 | ||
496 | port->qsize_sum = port->qsize_add[15] + port->qsize[3]; | |
497 | } | |
498 | ||
499 | static void | |
500 | rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i) | |
501 | { | |
502 | struct rte_sched_pipe_profile *p = port->pipe_profiles + i; | |
503 | ||
504 | RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n" | |
505 | " Token bucket: period = %u, credits per period = %u, size = %u\n" | |
506 | " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n" | |
507 | " Traffic class 3 oversubscription: weight = %hhu\n" | |
508 | " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n", | |
509 | i, | |
510 | ||
511 | /* Token bucket */ | |
512 | p->tb_period, | |
513 | p->tb_credits_per_period, | |
514 | p->tb_size, | |
515 | ||
516 | /* Traffic classes */ | |
517 | p->tc_period, | |
518 | p->tc_credits_per_period[0], | |
519 | p->tc_credits_per_period[1], | |
520 | p->tc_credits_per_period[2], | |
521 | p->tc_credits_per_period[3], | |
522 | ||
523 | /* Traffic class 3 oversubscription */ | |
524 | p->tc_ov_weight, | |
525 | ||
526 | /* WRR */ | |
527 | p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3], | |
528 | p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7], | |
529 | p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11], | |
530 | p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]); | |
531 | } | |
532 | ||
533 | static inline uint64_t | |
534 | rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate) | |
535 | { | |
536 | uint64_t time = time_ms; | |
537 | ||
538 | time = (time * rate) / 1000; | |
539 | ||
540 | return time; | |
541 | } | |
542 | ||
543 | static void | |
544 | rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params) | |
545 | { | |
546 | uint32_t i, j; | |
547 | ||
548 | for (i = 0; i < port->n_pipe_profiles; i++) { | |
549 | struct rte_sched_pipe_params *src = params->pipe_profiles + i; | |
550 | struct rte_sched_pipe_profile *dst = port->pipe_profiles + i; | |
551 | ||
552 | /* Token Bucket */ | |
553 | if (src->tb_rate == params->rate) { | |
554 | dst->tb_credits_per_period = 1; | |
555 | dst->tb_period = 1; | |
556 | } else { | |
557 | double tb_rate = (double) src->tb_rate | |
558 | / (double) params->rate; | |
559 | double d = RTE_SCHED_TB_RATE_CONFIG_ERR; | |
560 | ||
561 | rte_approx(tb_rate, d, | |
562 | &dst->tb_credits_per_period, &dst->tb_period); | |
563 | } | |
564 | dst->tb_size = src->tb_size; | |
565 | ||
566 | /* Traffic Classes */ | |
567 | dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period, | |
568 | params->rate); | |
569 | ||
570 | for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) | |
571 | dst->tc_credits_per_period[j] | |
572 | = rte_sched_time_ms_to_bytes(src->tc_period, | |
573 | src->tc_rate[j]); | |
574 | ||
575 | #ifdef RTE_SCHED_SUBPORT_TC_OV | |
576 | dst->tc_ov_weight = src->tc_ov_weight; | |
577 | #endif | |
578 | ||
579 | /* WRR */ | |
580 | for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) { | |
581 | uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS]; | |
582 | uint32_t lcd, lcd1, lcd2; | |
583 | uint32_t qindex; | |
584 | ||
585 | qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS; | |
586 | ||
587 | wrr_cost[0] = src->wrr_weights[qindex]; | |
588 | wrr_cost[1] = src->wrr_weights[qindex + 1]; | |
589 | wrr_cost[2] = src->wrr_weights[qindex + 2]; | |
590 | wrr_cost[3] = src->wrr_weights[qindex + 3]; | |
591 | ||
592 | lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]); | |
593 | lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]); | |
594 | lcd = rte_get_lcd(lcd1, lcd2); | |
595 | ||
596 | wrr_cost[0] = lcd / wrr_cost[0]; | |
597 | wrr_cost[1] = lcd / wrr_cost[1]; | |
598 | wrr_cost[2] = lcd / wrr_cost[2]; | |
599 | wrr_cost[3] = lcd / wrr_cost[3]; | |
600 | ||
601 | dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0]; | |
602 | dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1]; | |
603 | dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2]; | |
604 | dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3]; | |
605 | } | |
606 | ||
607 | rte_sched_port_log_pipe_profile(port, i); | |
608 | } | |
609 | ||
610 | port->pipe_tc3_rate_max = 0; | |
611 | for (i = 0; i < port->n_pipe_profiles; i++) { | |
612 | struct rte_sched_pipe_params *src = params->pipe_profiles + i; | |
613 | uint32_t pipe_tc3_rate = src->tc_rate[3]; | |
614 | ||
615 | if (port->pipe_tc3_rate_max < pipe_tc3_rate) | |
616 | port->pipe_tc3_rate_max = pipe_tc3_rate; | |
617 | } | |
618 | } | |
619 | ||
620 | struct rte_sched_port * | |
621 | rte_sched_port_config(struct rte_sched_port_params *params) | |
622 | { | |
623 | struct rte_sched_port *port = NULL; | |
624 | uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte; | |
625 | ||
626 | /* Check user parameters. Determine the amount of memory to allocate */ | |
627 | mem_size = rte_sched_port_get_memory_footprint(params); | |
628 | if (mem_size == 0) | |
629 | return NULL; | |
630 | ||
631 | /* Allocate memory to store the data structures */ | |
632 | port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE); | |
633 | if (port == NULL) | |
634 | return NULL; | |
635 | ||
636 | /* compile time checks */ | |
637 | RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0); | |
638 | RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1)); | |
639 | ||
640 | /* User parameters */ | |
641 | port->n_subports_per_port = params->n_subports_per_port; | |
642 | port->n_pipes_per_subport = params->n_pipes_per_subport; | |
643 | port->rate = params->rate; | |
644 | port->mtu = params->mtu + params->frame_overhead; | |
645 | port->frame_overhead = params->frame_overhead; | |
646 | memcpy(port->qsize, params->qsize, sizeof(params->qsize)); | |
647 | port->n_pipe_profiles = params->n_pipe_profiles; | |
648 | ||
649 | #ifdef RTE_SCHED_RED | |
650 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { | |
651 | uint32_t j; | |
652 | ||
653 | for (j = 0; j < e_RTE_METER_COLORS; j++) { | |
654 | /* if min/max are both zero, then RED is disabled */ | |
655 | if ((params->red_params[i][j].min_th | | |
656 | params->red_params[i][j].max_th) == 0) { | |
657 | continue; | |
658 | } | |
659 | ||
660 | if (rte_red_config_init(&port->red_config[i][j], | |
661 | params->red_params[i][j].wq_log2, | |
662 | params->red_params[i][j].min_th, | |
663 | params->red_params[i][j].max_th, | |
664 | params->red_params[i][j].maxp_inv) != 0) { | |
665 | return NULL; | |
666 | } | |
667 | } | |
668 | } | |
669 | #endif | |
670 | ||
671 | /* Timing */ | |
672 | port->time_cpu_cycles = rte_get_tsc_cycles(); | |
673 | port->time_cpu_bytes = 0; | |
674 | port->time = 0; | |
675 | ||
676 | cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT) | |
677 | / params->rate; | |
678 | port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte); | |
679 | ||
680 | /* Scheduling loop detection */ | |
681 | port->pipe_loop = RTE_SCHED_PIPE_INVALID; | |
682 | port->pipe_exhaustion = 0; | |
683 | ||
684 | /* Grinders */ | |
685 | port->busy_grinders = 0; | |
686 | port->pkts_out = NULL; | |
687 | port->n_pkts_out = 0; | |
688 | ||
689 | /* Queue base calculation */ | |
690 | rte_sched_port_config_qsize(port); | |
691 | ||
692 | /* Large data structures */ | |
693 | port->subport = (struct rte_sched_subport *) | |
694 | (port->memory + rte_sched_port_get_array_base(params, | |
695 | e_RTE_SCHED_PORT_ARRAY_SUBPORT)); | |
696 | port->pipe = (struct rte_sched_pipe *) | |
697 | (port->memory + rte_sched_port_get_array_base(params, | |
698 | e_RTE_SCHED_PORT_ARRAY_PIPE)); | |
699 | port->queue = (struct rte_sched_queue *) | |
700 | (port->memory + rte_sched_port_get_array_base(params, | |
701 | e_RTE_SCHED_PORT_ARRAY_QUEUE)); | |
702 | port->queue_extra = (struct rte_sched_queue_extra *) | |
703 | (port->memory + rte_sched_port_get_array_base(params, | |
704 | e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)); | |
705 | port->pipe_profiles = (struct rte_sched_pipe_profile *) | |
706 | (port->memory + rte_sched_port_get_array_base(params, | |
707 | e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)); | |
708 | port->bmp_array = port->memory | |
709 | + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY); | |
710 | port->queue_array = (struct rte_mbuf **) | |
711 | (port->memory + rte_sched_port_get_array_base(params, | |
712 | e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)); | |
713 | ||
714 | /* Pipe profile table */ | |
715 | rte_sched_port_config_pipe_profile_table(port, params); | |
716 | ||
717 | /* Bitmap */ | |
718 | n_queues_per_port = rte_sched_port_queues_per_port(port); | |
719 | bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port); | |
720 | port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, | |
721 | bmp_mem_size); | |
722 | if (port->bmp == NULL) { | |
723 | RTE_LOG(ERR, SCHED, "Bitmap init error\n"); | |
724 | return NULL; | |
725 | } | |
726 | ||
727 | for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) | |
728 | port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID; | |
729 | ||
730 | ||
731 | return port; | |
732 | } | |
733 | ||
734 | void | |
735 | rte_sched_port_free(struct rte_sched_port *port) | |
736 | { | |
737 | uint32_t qindex; | |
738 | uint32_t n_queues_per_port = rte_sched_port_queues_per_port(port); | |
739 | ||
740 | /* Check user parameters */ | |
741 | if (port == NULL) | |
742 | return; | |
743 | ||
744 | /* Free enqueued mbufs */ | |
745 | for (qindex = 0; qindex < n_queues_per_port; qindex++) { | |
746 | struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex); | |
747 | uint16_t qsize = rte_sched_port_qsize(port, qindex); | |
748 | struct rte_sched_queue *queue = port->queue + qindex; | |
749 | uint16_t qr = queue->qr & (qsize - 1); | |
750 | uint16_t qw = queue->qw & (qsize - 1); | |
751 | ||
752 | for (; qr != qw; qr = (qr + 1) & (qsize - 1)) | |
753 | rte_pktmbuf_free(mbufs[qr]); | |
754 | } | |
755 | ||
756 | rte_bitmap_free(port->bmp); | |
757 | rte_free(port); | |
758 | } | |
759 | ||
760 | static void | |
761 | rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i) | |
762 | { | |
763 | struct rte_sched_subport *s = port->subport + i; | |
764 | ||
765 | RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n" | |
766 | " Token bucket: period = %u, credits per period = %u, size = %u\n" | |
767 | " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n" | |
768 | " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n", | |
769 | i, | |
770 | ||
771 | /* Token bucket */ | |
772 | s->tb_period, | |
773 | s->tb_credits_per_period, | |
774 | s->tb_size, | |
775 | ||
776 | /* Traffic classes */ | |
777 | s->tc_period, | |
778 | s->tc_credits_per_period[0], | |
779 | s->tc_credits_per_period[1], | |
780 | s->tc_credits_per_period[2], | |
781 | s->tc_credits_per_period[3], | |
782 | ||
783 | /* Traffic class 3 oversubscription */ | |
784 | s->tc_ov_wm_min, | |
785 | s->tc_ov_wm_max); | |
786 | } | |
787 | ||
788 | int | |
789 | rte_sched_subport_config(struct rte_sched_port *port, | |
790 | uint32_t subport_id, | |
791 | struct rte_sched_subport_params *params) | |
792 | { | |
793 | struct rte_sched_subport *s; | |
794 | uint32_t i; | |
795 | ||
796 | /* Check user parameters */ | |
797 | if (port == NULL || | |
798 | subport_id >= port->n_subports_per_port || | |
799 | params == NULL) | |
800 | return -1; | |
801 | ||
802 | if (params->tb_rate == 0 || params->tb_rate > port->rate) | |
803 | return -2; | |
804 | ||
805 | if (params->tb_size == 0) | |
806 | return -3; | |
807 | ||
808 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { | |
809 | if (params->tc_rate[i] == 0 || | |
810 | params->tc_rate[i] > params->tb_rate) | |
811 | return -4; | |
812 | } | |
813 | ||
814 | if (params->tc_period == 0) | |
815 | return -5; | |
816 | ||
817 | s = port->subport + subport_id; | |
818 | ||
819 | /* Token Bucket (TB) */ | |
820 | if (params->tb_rate == port->rate) { | |
821 | s->tb_credits_per_period = 1; | |
822 | s->tb_period = 1; | |
823 | } else { | |
824 | double tb_rate = ((double) params->tb_rate) / ((double) port->rate); | |
825 | double d = RTE_SCHED_TB_RATE_CONFIG_ERR; | |
826 | ||
827 | rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period); | |
828 | } | |
829 | ||
830 | s->tb_size = params->tb_size; | |
831 | s->tb_time = port->time; | |
832 | s->tb_credits = s->tb_size / 2; | |
833 | ||
834 | /* Traffic Classes (TCs) */ | |
835 | s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate); | |
836 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { | |
837 | s->tc_credits_per_period[i] | |
838 | = rte_sched_time_ms_to_bytes(params->tc_period, | |
839 | params->tc_rate[i]); | |
840 | } | |
841 | s->tc_time = port->time + s->tc_period; | |
842 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) | |
843 | s->tc_credits[i] = s->tc_credits_per_period[i]; | |
844 | ||
845 | #ifdef RTE_SCHED_SUBPORT_TC_OV | |
846 | /* TC oversubscription */ | |
847 | s->tc_ov_wm_min = port->mtu; | |
848 | s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period, | |
849 | port->pipe_tc3_rate_max); | |
850 | s->tc_ov_wm = s->tc_ov_wm_max; | |
851 | s->tc_ov_period_id = 0; | |
852 | s->tc_ov = 0; | |
853 | s->tc_ov_n = 0; | |
854 | s->tc_ov_rate = 0; | |
855 | #endif | |
856 | ||
857 | rte_sched_port_log_subport_config(port, subport_id); | |
858 | ||
859 | return 0; | |
860 | } | |
861 | ||
862 | int | |
863 | rte_sched_pipe_config(struct rte_sched_port *port, | |
864 | uint32_t subport_id, | |
865 | uint32_t pipe_id, | |
866 | int32_t pipe_profile) | |
867 | { | |
868 | struct rte_sched_subport *s; | |
869 | struct rte_sched_pipe *p; | |
870 | struct rte_sched_pipe_profile *params; | |
871 | uint32_t deactivate, profile, i; | |
872 | ||
873 | /* Check user parameters */ | |
874 | profile = (uint32_t) pipe_profile; | |
875 | deactivate = (pipe_profile < 0); | |
876 | ||
877 | if (port == NULL || | |
878 | subport_id >= port->n_subports_per_port || | |
879 | pipe_id >= port->n_pipes_per_subport || | |
880 | (!deactivate && profile >= port->n_pipe_profiles)) | |
881 | return -1; | |
882 | ||
883 | ||
884 | /* Check that subport configuration is valid */ | |
885 | s = port->subport + subport_id; | |
886 | if (s->tb_period == 0) | |
887 | return -2; | |
888 | ||
889 | p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id); | |
890 | ||
891 | /* Handle the case when pipe already has a valid configuration */ | |
892 | if (p->tb_time) { | |
893 | params = port->pipe_profiles + p->profile; | |
894 | ||
895 | #ifdef RTE_SCHED_SUBPORT_TC_OV | |
896 | double subport_tc3_rate = (double) s->tc_credits_per_period[3] | |
897 | / (double) s->tc_period; | |
898 | double pipe_tc3_rate = (double) params->tc_credits_per_period[3] | |
899 | / (double) params->tc_period; | |
900 | uint32_t tc3_ov = s->tc_ov; | |
901 | ||
902 | /* Unplug pipe from its subport */ | |
903 | s->tc_ov_n -= params->tc_ov_weight; | |
904 | s->tc_ov_rate -= pipe_tc3_rate; | |
905 | s->tc_ov = s->tc_ov_rate > subport_tc3_rate; | |
906 | ||
907 | if (s->tc_ov != tc3_ov) { | |
908 | RTE_LOG(DEBUG, SCHED, | |
909 | "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n", | |
910 | subport_id, subport_tc3_rate, s->tc_ov_rate); | |
911 | } | |
912 | #endif | |
913 | ||
914 | /* Reset the pipe */ | |
915 | memset(p, 0, sizeof(struct rte_sched_pipe)); | |
916 | } | |
917 | ||
918 | if (deactivate) | |
919 | return 0; | |
920 | ||
921 | /* Apply the new pipe configuration */ | |
922 | p->profile = profile; | |
923 | params = port->pipe_profiles + p->profile; | |
924 | ||
925 | /* Token Bucket (TB) */ | |
926 | p->tb_time = port->time; | |
927 | p->tb_credits = params->tb_size / 2; | |
928 | ||
929 | /* Traffic Classes (TCs) */ | |
930 | p->tc_time = port->time + params->tc_period; | |
931 | for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) | |
932 | p->tc_credits[i] = params->tc_credits_per_period[i]; | |
933 | ||
934 | #ifdef RTE_SCHED_SUBPORT_TC_OV | |
935 | { | |
936 | /* Subport TC3 oversubscription */ | |
937 | double subport_tc3_rate = (double) s->tc_credits_per_period[3] | |
938 | / (double) s->tc_period; | |
939 | double pipe_tc3_rate = (double) params->tc_credits_per_period[3] | |
940 | / (double) params->tc_period; | |
941 | uint32_t tc3_ov = s->tc_ov; | |
942 | ||
943 | s->tc_ov_n += params->tc_ov_weight; | |
944 | s->tc_ov_rate += pipe_tc3_rate; | |
945 | s->tc_ov = s->tc_ov_rate > subport_tc3_rate; | |
946 | ||
947 | if (s->tc_ov != tc3_ov) { | |
948 | RTE_LOG(DEBUG, SCHED, | |
949 | "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n", | |
950 | subport_id, subport_tc3_rate, s->tc_ov_rate); | |
951 | } | |
952 | p->tc_ov_period_id = s->tc_ov_period_id; | |
953 | p->tc_ov_credits = s->tc_ov_wm; | |
954 | } | |
955 | #endif | |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
960 | void | |
961 | rte_sched_port_pkt_write(struct rte_mbuf *pkt, | |
962 | uint32_t subport, uint32_t pipe, uint32_t traffic_class, | |
963 | uint32_t queue, enum rte_meter_color color) | |
964 | { | |
965 | struct rte_sched_port_hierarchy *sched | |
966 | = (struct rte_sched_port_hierarchy *) &pkt->hash.sched; | |
967 | ||
968 | RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched)); | |
969 | ||
970 | sched->color = (uint32_t) color; | |
971 | sched->subport = subport; | |
972 | sched->pipe = pipe; | |
973 | sched->traffic_class = traffic_class; | |
974 | sched->queue = queue; | |
975 | } | |
976 | ||
977 | void | |
978 | rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt, | |
979 | uint32_t *subport, uint32_t *pipe, | |
980 | uint32_t *traffic_class, uint32_t *queue) | |
981 | { | |
982 | const struct rte_sched_port_hierarchy *sched | |
983 | = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched; | |
984 | ||
985 | *subport = sched->subport; | |
986 | *pipe = sched->pipe; | |
987 | *traffic_class = sched->traffic_class; | |
988 | *queue = sched->queue; | |
989 | } | |
990 | ||
991 | enum rte_meter_color | |
992 | rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt) | |
993 | { | |
994 | const struct rte_sched_port_hierarchy *sched | |
995 | = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched; | |
996 | ||
997 | return (enum rte_meter_color) sched->color; | |
998 | } | |
999 | ||
1000 | int | |
1001 | rte_sched_subport_read_stats(struct rte_sched_port *port, | |
1002 | uint32_t subport_id, | |
1003 | struct rte_sched_subport_stats *stats, | |
1004 | uint32_t *tc_ov) | |
1005 | { | |
1006 | struct rte_sched_subport *s; | |
1007 | ||
1008 | /* Check user parameters */ | |
1009 | if (port == NULL || subport_id >= port->n_subports_per_port || | |
1010 | stats == NULL || tc_ov == NULL) | |
1011 | return -1; | |
1012 | ||
1013 | s = port->subport + subport_id; | |
1014 | ||
1015 | /* Copy subport stats and clear */ | |
1016 | memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats)); | |
1017 | memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats)); | |
1018 | ||
1019 | /* Subport TC ovesubscription status */ | |
1020 | *tc_ov = s->tc_ov; | |
1021 | ||
1022 | return 0; | |
1023 | } | |
1024 | ||
1025 | int | |
1026 | rte_sched_queue_read_stats(struct rte_sched_port *port, | |
1027 | uint32_t queue_id, | |
1028 | struct rte_sched_queue_stats *stats, | |
1029 | uint16_t *qlen) | |
1030 | { | |
1031 | struct rte_sched_queue *q; | |
1032 | struct rte_sched_queue_extra *qe; | |
1033 | ||
1034 | /* Check user parameters */ | |
1035 | if ((port == NULL) || | |
1036 | (queue_id >= rte_sched_port_queues_per_port(port)) || | |
1037 | (stats == NULL) || | |
1038 | (qlen == NULL)) { | |
1039 | return -1; | |
1040 | } | |
1041 | q = port->queue + queue_id; | |
1042 | qe = port->queue_extra + queue_id; | |
1043 | ||
1044 | /* Copy queue stats and clear */ | |
1045 | memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats)); | |
1046 | memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats)); | |
1047 | ||
1048 | /* Queue length */ | |
1049 | *qlen = q->qw - q->qr; | |
1050 | ||
1051 | return 0; | |
1052 | } | |
1053 | ||
1054 | static inline uint32_t | |
1055 | rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue) | |
1056 | { | |
1057 | uint32_t result; | |
1058 | ||
1059 | result = subport * port->n_pipes_per_subport + pipe; | |
1060 | result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class; | |
1061 | result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue; | |
1062 | ||
1063 | return result; | |
1064 | } | |
1065 | ||
1066 | #ifdef RTE_SCHED_DEBUG | |
1067 | ||
1068 | static inline int | |
1069 | rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex) | |
1070 | { | |
1071 | struct rte_sched_queue *queue = port->queue + qindex; | |
1072 | ||
1073 | return queue->qr == queue->qw; | |
1074 | } | |
1075 | ||
1076 | #endif /* RTE_SCHED_DEBUG */ | |
1077 | ||
1078 | #ifdef RTE_SCHED_COLLECT_STATS | |
1079 | ||
1080 | static inline void | |
1081 | rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt) | |
1082 | { | |
1083 | struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port)); | |
1084 | uint32_t tc_index = (qindex >> 2) & 0x3; | |
1085 | uint32_t pkt_len = pkt->pkt_len; | |
1086 | ||
1087 | s->stats.n_pkts_tc[tc_index] += 1; | |
1088 | s->stats.n_bytes_tc[tc_index] += pkt_len; | |
1089 | } | |
1090 | ||
1091 | #ifdef RTE_SCHED_RED | |
1092 | static inline void | |
1093 | rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, | |
1094 | uint32_t qindex, | |
1095 | struct rte_mbuf *pkt, uint32_t red) | |
1096 | #else | |
1097 | static inline void | |
1098 | rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, | |
1099 | uint32_t qindex, | |
1100 | struct rte_mbuf *pkt, __rte_unused uint32_t red) | |
1101 | #endif | |
1102 | { | |
1103 | struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port)); | |
1104 | uint32_t tc_index = (qindex >> 2) & 0x3; | |
1105 | uint32_t pkt_len = pkt->pkt_len; | |
1106 | ||
1107 | s->stats.n_pkts_tc_dropped[tc_index] += 1; | |
1108 | s->stats.n_bytes_tc_dropped[tc_index] += pkt_len; | |
1109 | #ifdef RTE_SCHED_RED | |
1110 | s->stats.n_pkts_red_dropped[tc_index] += red; | |
1111 | #endif | |
1112 | } | |
1113 | ||
1114 | static inline void | |
1115 | rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt) | |
1116 | { | |
1117 | struct rte_sched_queue_extra *qe = port->queue_extra + qindex; | |
1118 | uint32_t pkt_len = pkt->pkt_len; | |
1119 | ||
1120 | qe->stats.n_pkts += 1; | |
1121 | qe->stats.n_bytes += pkt_len; | |
1122 | } | |
1123 | ||
1124 | #ifdef RTE_SCHED_RED | |
1125 | static inline void | |
1126 | rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, | |
1127 | uint32_t qindex, | |
1128 | struct rte_mbuf *pkt, uint32_t red) | |
1129 | #else | |
1130 | static inline void | |
1131 | rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, | |
1132 | uint32_t qindex, | |
1133 | struct rte_mbuf *pkt, __rte_unused uint32_t red) | |
1134 | #endif | |
1135 | { | |
1136 | struct rte_sched_queue_extra *qe = port->queue_extra + qindex; | |
1137 | uint32_t pkt_len = pkt->pkt_len; | |
1138 | ||
1139 | qe->stats.n_pkts_dropped += 1; | |
1140 | qe->stats.n_bytes_dropped += pkt_len; | |
1141 | #ifdef RTE_SCHED_RED | |
1142 | qe->stats.n_pkts_red_dropped += red; | |
1143 | #endif | |
1144 | } | |
1145 | ||
1146 | #endif /* RTE_SCHED_COLLECT_STATS */ | |
1147 | ||
1148 | #ifdef RTE_SCHED_RED | |
1149 | ||
1150 | static inline int | |
1151 | rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen) | |
1152 | { | |
1153 | struct rte_sched_queue_extra *qe; | |
1154 | struct rte_red_config *red_cfg; | |
1155 | struct rte_red *red; | |
1156 | uint32_t tc_index; | |
1157 | enum rte_meter_color color; | |
1158 | ||
1159 | tc_index = (qindex >> 2) & 0x3; | |
1160 | color = rte_sched_port_pkt_read_color(pkt); | |
1161 | red_cfg = &port->red_config[tc_index][color]; | |
1162 | ||
1163 | if ((red_cfg->min_th | red_cfg->max_th) == 0) | |
1164 | return 0; | |
1165 | ||
1166 | qe = port->queue_extra + qindex; | |
1167 | red = &qe->red; | |
1168 | ||
1169 | return rte_red_enqueue(red_cfg, red, qlen, port->time); | |
1170 | } | |
1171 | ||
1172 | static inline void | |
1173 | rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex) | |
1174 | { | |
1175 | struct rte_sched_queue_extra *qe = port->queue_extra + qindex; | |
1176 | struct rte_red *red = &qe->red; | |
1177 | ||
1178 | rte_red_mark_queue_empty(red, port->time); | |
1179 | } | |
1180 | ||
1181 | #else | |
1182 | ||
1183 | #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0 | |
1184 | ||
1185 | #define rte_sched_port_set_queue_empty_timestamp(port, qindex) | |
1186 | ||
1187 | #endif /* RTE_SCHED_RED */ | |
1188 | ||
1189 | #ifdef RTE_SCHED_DEBUG | |
1190 | ||
1191 | static inline void | |
1192 | debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, | |
1193 | uint64_t bmp_slab) | |
1194 | { | |
1195 | uint64_t mask; | |
1196 | uint32_t i, panic; | |
1197 | ||
1198 | if (bmp_slab == 0) | |
1199 | rte_panic("Empty slab at position %u\n", bmp_pos); | |
1200 | ||
1201 | panic = 0; | |
1202 | for (i = 0, mask = 1; i < 64; i++, mask <<= 1) { | |
1203 | if (mask & bmp_slab) { | |
1204 | if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) { | |
1205 | printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i); | |
1206 | panic = 1; | |
1207 | } | |
1208 | } | |
1209 | } | |
1210 | ||
1211 | if (panic) | |
1212 | rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n", | |
1213 | bmp_slab, bmp_pos); | |
1214 | } | |
1215 | ||
1216 | #endif /* RTE_SCHED_DEBUG */ | |
1217 | ||
1218 | static inline uint32_t | |
1219 | rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, | |
1220 | struct rte_mbuf *pkt) | |
1221 | { | |
1222 | struct rte_sched_queue *q; | |
1223 | #ifdef RTE_SCHED_COLLECT_STATS | |
1224 | struct rte_sched_queue_extra *qe; | |
1225 | #endif | |
1226 | uint32_t subport, pipe, traffic_class, queue, qindex; | |
1227 | ||
1228 | rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue); | |
1229 | ||
1230 | qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue); | |
1231 | q = port->queue + qindex; | |
1232 | rte_prefetch0(q); | |
1233 | #ifdef RTE_SCHED_COLLECT_STATS | |
1234 | qe = port->queue_extra + qindex; | |
1235 | rte_prefetch0(qe); | |
1236 | #endif | |
1237 | ||
1238 | return qindex; | |
1239 | } | |
1240 | ||
1241 | static inline void | |
1242 | rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, | |
1243 | uint32_t qindex, struct rte_mbuf **qbase) | |
1244 | { | |
1245 | struct rte_sched_queue *q; | |
1246 | struct rte_mbuf **q_qw; | |
1247 | uint16_t qsize; | |
1248 | ||
1249 | q = port->queue + qindex; | |
1250 | qsize = rte_sched_port_qsize(port, qindex); | |
1251 | q_qw = qbase + (q->qw & (qsize - 1)); | |
1252 | ||
1253 | rte_prefetch0(q_qw); | |
1254 | rte_bitmap_prefetch0(port->bmp, qindex); | |
1255 | } | |
1256 | ||
1257 | static inline int | |
1258 | rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, | |
1259 | struct rte_mbuf **qbase, struct rte_mbuf *pkt) | |
1260 | { | |
1261 | struct rte_sched_queue *q; | |
1262 | uint16_t qsize; | |
1263 | uint16_t qlen; | |
1264 | ||
1265 | q = port->queue + qindex; | |
1266 | qsize = rte_sched_port_qsize(port, qindex); | |
1267 | qlen = q->qw - q->qr; | |
1268 | ||
1269 | /* Drop the packet (and update drop stats) when queue is full */ | |
1270 | if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || | |
1271 | (qlen >= qsize))) { | |
1272 | rte_pktmbuf_free(pkt); | |
1273 | #ifdef RTE_SCHED_COLLECT_STATS | |
1274 | rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt, | |
1275 | qlen < qsize); | |
1276 | rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt, | |
1277 | qlen < qsize); | |
1278 | #endif | |
1279 | return 0; | |
1280 | } | |
1281 | ||
1282 | /* Enqueue packet */ | |
1283 | qbase[q->qw & (qsize - 1)] = pkt; | |
1284 | q->qw++; | |
1285 | ||
1286 | /* Activate queue in the port bitmap */ | |
1287 | rte_bitmap_set(port->bmp, qindex); | |
1288 | ||
1289 | /* Statistics */ | |
1290 | #ifdef RTE_SCHED_COLLECT_STATS | |
1291 | rte_sched_port_update_subport_stats(port, qindex, pkt); | |
1292 | rte_sched_port_update_queue_stats(port, qindex, pkt); | |
1293 | #endif | |
1294 | ||
1295 | return 1; | |
1296 | } | |
1297 | ||
1298 | ||
1299 | /* | |
1300 | * The enqueue function implements a 4-level pipeline with each stage | |
1301 | * processing two different packets. The purpose of using a pipeline | |
1302 | * is to hide the latency of prefetching the data structures. The | |
1303 | * naming convention is presented in the diagram below: | |
1304 | * | |
1305 | * p00 _______ p10 _______ p20 _______ p30 _______ | |
1306 | * ----->| |----->| |----->| |----->| |-----> | |
1307 | * | 0 | | 1 | | 2 | | 3 | | |
1308 | * ----->|_______|----->|_______|----->|_______|----->|_______|-----> | |
1309 | * p01 p11 p21 p31 | |
1310 | * | |
1311 | */ | |
1312 | int | |
1313 | rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, | |
1314 | uint32_t n_pkts) | |
1315 | { | |
1316 | struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, | |
1317 | *pkt30, *pkt31, *pkt_last; | |
1318 | struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, | |
1319 | **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base; | |
1320 | uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last; | |
1321 | uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last; | |
1322 | uint32_t result, i; | |
1323 | ||
1324 | result = 0; | |
1325 | ||
1326 | /* | |
1327 | * Less then 6 input packets available, which is not enough to | |
1328 | * feed the pipeline | |
1329 | */ | |
1330 | if (unlikely(n_pkts < 6)) { | |
1331 | struct rte_mbuf **q_base[5]; | |
1332 | uint32_t q[5]; | |
1333 | ||
1334 | /* Prefetch the mbuf structure of each packet */ | |
1335 | for (i = 0; i < n_pkts; i++) | |
1336 | rte_prefetch0(pkts[i]); | |
1337 | ||
1338 | /* Prefetch the queue structure for each queue */ | |
1339 | for (i = 0; i < n_pkts; i++) | |
1340 | q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, | |
1341 | pkts[i]); | |
1342 | ||
1343 | /* Prefetch the write pointer location of each queue */ | |
1344 | for (i = 0; i < n_pkts; i++) { | |
1345 | q_base[i] = rte_sched_port_qbase(port, q[i]); | |
1346 | rte_sched_port_enqueue_qwa_prefetch0(port, q[i], | |
1347 | q_base[i]); | |
1348 | } | |
1349 | ||
1350 | /* Write each packet to its queue */ | |
1351 | for (i = 0; i < n_pkts; i++) | |
1352 | result += rte_sched_port_enqueue_qwa(port, q[i], | |
1353 | q_base[i], pkts[i]); | |
1354 | ||
1355 | return result; | |
1356 | } | |
1357 | ||
1358 | /* Feed the first 3 stages of the pipeline (6 packets needed) */ | |
1359 | pkt20 = pkts[0]; | |
1360 | pkt21 = pkts[1]; | |
1361 | rte_prefetch0(pkt20); | |
1362 | rte_prefetch0(pkt21); | |
1363 | ||
1364 | pkt10 = pkts[2]; | |
1365 | pkt11 = pkts[3]; | |
1366 | rte_prefetch0(pkt10); | |
1367 | rte_prefetch0(pkt11); | |
1368 | ||
1369 | q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20); | |
1370 | q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21); | |
1371 | ||
1372 | pkt00 = pkts[4]; | |
1373 | pkt01 = pkts[5]; | |
1374 | rte_prefetch0(pkt00); | |
1375 | rte_prefetch0(pkt01); | |
1376 | ||
1377 | q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10); | |
1378 | q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11); | |
1379 | ||
1380 | q20_base = rte_sched_port_qbase(port, q20); | |
1381 | q21_base = rte_sched_port_qbase(port, q21); | |
1382 | rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base); | |
1383 | rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base); | |
1384 | ||
1385 | /* Run the pipeline */ | |
1386 | for (i = 6; i < (n_pkts & (~1)); i += 2) { | |
1387 | /* Propagate stage inputs */ | |
1388 | pkt30 = pkt20; | |
1389 | pkt31 = pkt21; | |
1390 | pkt20 = pkt10; | |
1391 | pkt21 = pkt11; | |
1392 | pkt10 = pkt00; | |
1393 | pkt11 = pkt01; | |
1394 | q30 = q20; | |
1395 | q31 = q21; | |
1396 | q20 = q10; | |
1397 | q21 = q11; | |
1398 | q30_base = q20_base; | |
1399 | q31_base = q21_base; | |
1400 | ||
1401 | /* Stage 0: Get packets in */ | |
1402 | pkt00 = pkts[i]; | |
1403 | pkt01 = pkts[i + 1]; | |
1404 | rte_prefetch0(pkt00); | |
1405 | rte_prefetch0(pkt01); | |
1406 | ||
1407 | /* Stage 1: Prefetch queue structure storing queue pointers */ | |
1408 | q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10); | |
1409 | q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11); | |
1410 | ||
1411 | /* Stage 2: Prefetch queue write location */ | |
1412 | q20_base = rte_sched_port_qbase(port, q20); | |
1413 | q21_base = rte_sched_port_qbase(port, q21); | |
1414 | rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base); | |
1415 | rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base); | |
1416 | ||
1417 | /* Stage 3: Write packet to queue and activate queue */ | |
1418 | r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30); | |
1419 | r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31); | |
1420 | result += r30 + r31; | |
1421 | } | |
1422 | ||
1423 | /* | |
1424 | * Drain the pipeline (exactly 6 packets). | |
1425 | * Handle the last packet in the case | |
1426 | * of an odd number of input packets. | |
1427 | */ | |
1428 | pkt_last = pkts[n_pkts - 1]; | |
1429 | rte_prefetch0(pkt_last); | |
1430 | ||
1431 | q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00); | |
1432 | q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01); | |
1433 | ||
1434 | q10_base = rte_sched_port_qbase(port, q10); | |
1435 | q11_base = rte_sched_port_qbase(port, q11); | |
1436 | rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base); | |
1437 | rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base); | |
1438 | ||
1439 | r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20); | |
1440 | r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21); | |
1441 | result += r20 + r21; | |
1442 | ||
1443 | q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last); | |
1444 | ||
1445 | q00_base = rte_sched_port_qbase(port, q00); | |
1446 | q01_base = rte_sched_port_qbase(port, q01); | |
1447 | rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base); | |
1448 | rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base); | |
1449 | ||
1450 | r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10); | |
1451 | r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11); | |
1452 | result += r10 + r11; | |
1453 | ||
1454 | q_last_base = rte_sched_port_qbase(port, q_last); | |
1455 | rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base); | |
1456 | ||
1457 | r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00); | |
1458 | r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01); | |
1459 | result += r00 + r01; | |
1460 | ||
1461 | if (n_pkts & 1) { | |
1462 | r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last); | |
1463 | result += r_last; | |
1464 | } | |
1465 | ||
1466 | return result; | |
1467 | } | |
1468 | ||
1469 | #ifndef RTE_SCHED_SUBPORT_TC_OV | |
1470 | ||
1471 | static inline void | |
1472 | grinder_credits_update(struct rte_sched_port *port, uint32_t pos) | |
1473 | { | |
1474 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1475 | struct rte_sched_subport *subport = grinder->subport; | |
1476 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1477 | struct rte_sched_pipe_profile *params = grinder->pipe_params; | |
1478 | uint64_t n_periods; | |
1479 | ||
1480 | /* Subport TB */ | |
1481 | n_periods = (port->time - subport->tb_time) / subport->tb_period; | |
1482 | subport->tb_credits += n_periods * subport->tb_credits_per_period; | |
1483 | subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size); | |
1484 | subport->tb_time += n_periods * subport->tb_period; | |
1485 | ||
1486 | /* Pipe TB */ | |
1487 | n_periods = (port->time - pipe->tb_time) / params->tb_period; | |
1488 | pipe->tb_credits += n_periods * params->tb_credits_per_period; | |
1489 | pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size); | |
1490 | pipe->tb_time += n_periods * params->tb_period; | |
1491 | ||
1492 | /* Subport TCs */ | |
1493 | if (unlikely(port->time >= subport->tc_time)) { | |
1494 | subport->tc_credits[0] = subport->tc_credits_per_period[0]; | |
1495 | subport->tc_credits[1] = subport->tc_credits_per_period[1]; | |
1496 | subport->tc_credits[2] = subport->tc_credits_per_period[2]; | |
1497 | subport->tc_credits[3] = subport->tc_credits_per_period[3]; | |
1498 | subport->tc_time = port->time + subport->tc_period; | |
1499 | } | |
1500 | ||
1501 | /* Pipe TCs */ | |
1502 | if (unlikely(port->time >= pipe->tc_time)) { | |
1503 | pipe->tc_credits[0] = params->tc_credits_per_period[0]; | |
1504 | pipe->tc_credits[1] = params->tc_credits_per_period[1]; | |
1505 | pipe->tc_credits[2] = params->tc_credits_per_period[2]; | |
1506 | pipe->tc_credits[3] = params->tc_credits_per_period[3]; | |
1507 | pipe->tc_time = port->time + params->tc_period; | |
1508 | } | |
1509 | } | |
1510 | ||
1511 | #else | |
1512 | ||
1513 | static inline uint32_t | |
1514 | grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos) | |
1515 | { | |
1516 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1517 | struct rte_sched_subport *subport = grinder->subport; | |
1518 | uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; | |
1519 | uint32_t tc_ov_consumption_max; | |
1520 | uint32_t tc_ov_wm = subport->tc_ov_wm; | |
1521 | ||
1522 | if (subport->tc_ov == 0) | |
1523 | return subport->tc_ov_wm_max; | |
1524 | ||
1525 | tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0]; | |
1526 | tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1]; | |
1527 | tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2]; | |
1528 | tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3]; | |
1529 | ||
1530 | tc_ov_consumption_max = subport->tc_credits_per_period[3] - | |
1531 | (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]); | |
1532 | ||
1533 | if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) { | |
1534 | tc_ov_wm -= tc_ov_wm >> 7; | |
1535 | if (tc_ov_wm < subport->tc_ov_wm_min) | |
1536 | tc_ov_wm = subport->tc_ov_wm_min; | |
1537 | ||
1538 | return tc_ov_wm; | |
1539 | } | |
1540 | ||
1541 | tc_ov_wm += (tc_ov_wm >> 7) + 1; | |
1542 | if (tc_ov_wm > subport->tc_ov_wm_max) | |
1543 | tc_ov_wm = subport->tc_ov_wm_max; | |
1544 | ||
1545 | return tc_ov_wm; | |
1546 | } | |
1547 | ||
1548 | static inline void | |
1549 | grinder_credits_update(struct rte_sched_port *port, uint32_t pos) | |
1550 | { | |
1551 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1552 | struct rte_sched_subport *subport = grinder->subport; | |
1553 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1554 | struct rte_sched_pipe_profile *params = grinder->pipe_params; | |
1555 | uint64_t n_periods; | |
1556 | ||
1557 | /* Subport TB */ | |
1558 | n_periods = (port->time - subport->tb_time) / subport->tb_period; | |
1559 | subport->tb_credits += n_periods * subport->tb_credits_per_period; | |
1560 | subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size); | |
1561 | subport->tb_time += n_periods * subport->tb_period; | |
1562 | ||
1563 | /* Pipe TB */ | |
1564 | n_periods = (port->time - pipe->tb_time) / params->tb_period; | |
1565 | pipe->tb_credits += n_periods * params->tb_credits_per_period; | |
1566 | pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size); | |
1567 | pipe->tb_time += n_periods * params->tb_period; | |
1568 | ||
1569 | /* Subport TCs */ | |
1570 | if (unlikely(port->time >= subport->tc_time)) { | |
1571 | subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos); | |
1572 | ||
1573 | subport->tc_credits[0] = subport->tc_credits_per_period[0]; | |
1574 | subport->tc_credits[1] = subport->tc_credits_per_period[1]; | |
1575 | subport->tc_credits[2] = subport->tc_credits_per_period[2]; | |
1576 | subport->tc_credits[3] = subport->tc_credits_per_period[3]; | |
1577 | ||
1578 | subport->tc_time = port->time + subport->tc_period; | |
1579 | subport->tc_ov_period_id++; | |
1580 | } | |
1581 | ||
1582 | /* Pipe TCs */ | |
1583 | if (unlikely(port->time >= pipe->tc_time)) { | |
1584 | pipe->tc_credits[0] = params->tc_credits_per_period[0]; | |
1585 | pipe->tc_credits[1] = params->tc_credits_per_period[1]; | |
1586 | pipe->tc_credits[2] = params->tc_credits_per_period[2]; | |
1587 | pipe->tc_credits[3] = params->tc_credits_per_period[3]; | |
1588 | pipe->tc_time = port->time + params->tc_period; | |
1589 | } | |
1590 | ||
1591 | /* Pipe TCs - Oversubscription */ | |
1592 | if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) { | |
1593 | pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight; | |
1594 | ||
1595 | pipe->tc_ov_period_id = subport->tc_ov_period_id; | |
1596 | } | |
1597 | } | |
1598 | ||
1599 | #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */ | |
1600 | ||
1601 | ||
1602 | #ifndef RTE_SCHED_SUBPORT_TC_OV | |
1603 | ||
1604 | static inline int | |
1605 | grinder_credits_check(struct rte_sched_port *port, uint32_t pos) | |
1606 | { | |
1607 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1608 | struct rte_sched_subport *subport = grinder->subport; | |
1609 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1610 | struct rte_mbuf *pkt = grinder->pkt; | |
1611 | uint32_t tc_index = grinder->tc_index; | |
1612 | uint32_t pkt_len = pkt->pkt_len + port->frame_overhead; | |
1613 | uint32_t subport_tb_credits = subport->tb_credits; | |
1614 | uint32_t subport_tc_credits = subport->tc_credits[tc_index]; | |
1615 | uint32_t pipe_tb_credits = pipe->tb_credits; | |
1616 | uint32_t pipe_tc_credits = pipe->tc_credits[tc_index]; | |
1617 | int enough_credits; | |
1618 | ||
1619 | /* Check queue credits */ | |
1620 | enough_credits = (pkt_len <= subport_tb_credits) && | |
1621 | (pkt_len <= subport_tc_credits) && | |
1622 | (pkt_len <= pipe_tb_credits) && | |
1623 | (pkt_len <= pipe_tc_credits); | |
1624 | ||
1625 | if (!enough_credits) | |
1626 | return 0; | |
1627 | ||
1628 | /* Update port credits */ | |
1629 | subport->tb_credits -= pkt_len; | |
1630 | subport->tc_credits[tc_index] -= pkt_len; | |
1631 | pipe->tb_credits -= pkt_len; | |
1632 | pipe->tc_credits[tc_index] -= pkt_len; | |
1633 | ||
1634 | return 1; | |
1635 | } | |
1636 | ||
1637 | #else | |
1638 | ||
1639 | static inline int | |
1640 | grinder_credits_check(struct rte_sched_port *port, uint32_t pos) | |
1641 | { | |
1642 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1643 | struct rte_sched_subport *subport = grinder->subport; | |
1644 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1645 | struct rte_mbuf *pkt = grinder->pkt; | |
1646 | uint32_t tc_index = grinder->tc_index; | |
1647 | uint32_t pkt_len = pkt->pkt_len + port->frame_overhead; | |
1648 | uint32_t subport_tb_credits = subport->tb_credits; | |
1649 | uint32_t subport_tc_credits = subport->tc_credits[tc_index]; | |
1650 | uint32_t pipe_tb_credits = pipe->tb_credits; | |
1651 | uint32_t pipe_tc_credits = pipe->tc_credits[tc_index]; | |
1652 | uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits}; | |
1653 | uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX}; | |
1654 | uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index]; | |
1655 | int enough_credits; | |
1656 | ||
1657 | /* Check pipe and subport credits */ | |
1658 | enough_credits = (pkt_len <= subport_tb_credits) && | |
1659 | (pkt_len <= subport_tc_credits) && | |
1660 | (pkt_len <= pipe_tb_credits) && | |
1661 | (pkt_len <= pipe_tc_credits) && | |
1662 | (pkt_len <= pipe_tc_ov_credits); | |
1663 | ||
1664 | if (!enough_credits) | |
1665 | return 0; | |
1666 | ||
1667 | /* Update pipe and subport credits */ | |
1668 | subport->tb_credits -= pkt_len; | |
1669 | subport->tc_credits[tc_index] -= pkt_len; | |
1670 | pipe->tb_credits -= pkt_len; | |
1671 | pipe->tc_credits[tc_index] -= pkt_len; | |
1672 | pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len; | |
1673 | ||
1674 | return 1; | |
1675 | } | |
1676 | ||
1677 | #endif /* RTE_SCHED_SUBPORT_TC_OV */ | |
1678 | ||
1679 | ||
1680 | static inline int | |
1681 | grinder_schedule(struct rte_sched_port *port, uint32_t pos) | |
1682 | { | |
1683 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1684 | struct rte_sched_queue *queue = grinder->queue[grinder->qpos]; | |
1685 | struct rte_mbuf *pkt = grinder->pkt; | |
1686 | uint32_t pkt_len = pkt->pkt_len + port->frame_overhead; | |
1687 | ||
1688 | if (!grinder_credits_check(port, pos)) | |
1689 | return 0; | |
1690 | ||
1691 | /* Advance port time */ | |
1692 | port->time += pkt_len; | |
1693 | ||
1694 | /* Send packet */ | |
1695 | port->pkts_out[port->n_pkts_out++] = pkt; | |
1696 | queue->qr++; | |
1697 | grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos]; | |
1698 | if (queue->qr == queue->qw) { | |
1699 | uint32_t qindex = grinder->qindex[grinder->qpos]; | |
1700 | ||
1701 | rte_bitmap_clear(port->bmp, qindex); | |
1702 | grinder->qmask &= ~(1 << grinder->qpos); | |
1703 | grinder->wrr_mask[grinder->qpos] = 0; | |
1704 | rte_sched_port_set_queue_empty_timestamp(port, qindex); | |
1705 | } | |
1706 | ||
1707 | /* Reset pipe loop detection */ | |
1708 | port->pipe_loop = RTE_SCHED_PIPE_INVALID; | |
1709 | grinder->productive = 1; | |
1710 | ||
1711 | return 1; | |
1712 | } | |
1713 | ||
1714 | #ifdef SCHED_VECTOR_SSE4 | |
1715 | ||
1716 | static inline int | |
1717 | grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) | |
1718 | { | |
1719 | __m128i index = _mm_set1_epi32(base_pipe); | |
1720 | __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos); | |
1721 | __m128i res = _mm_cmpeq_epi32(pipes, index); | |
1722 | ||
1723 | pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4)); | |
1724 | pipes = _mm_cmpeq_epi32(pipes, index); | |
1725 | res = _mm_or_si128(res, pipes); | |
1726 | ||
1727 | if (_mm_testz_si128(res, res)) | |
1728 | return 0; | |
1729 | ||
1730 | return 1; | |
1731 | } | |
1732 | ||
1733 | #else | |
1734 | ||
1735 | static inline int | |
1736 | grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) | |
1737 | { | |
1738 | uint32_t i; | |
1739 | ||
1740 | for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) { | |
1741 | if (port->grinder_base_bmp_pos[i] == base_pipe) | |
1742 | return 1; | |
1743 | } | |
1744 | ||
1745 | return 0; | |
1746 | } | |
1747 | ||
1748 | #endif /* RTE_SCHED_OPTIMIZATIONS */ | |
1749 | ||
1750 | static inline void | |
1751 | grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab) | |
1752 | { | |
1753 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1754 | uint16_t w[4]; | |
1755 | ||
1756 | grinder->pcache_w = 0; | |
1757 | grinder->pcache_r = 0; | |
1758 | ||
1759 | w[0] = (uint16_t) bmp_slab; | |
1760 | w[1] = (uint16_t) (bmp_slab >> 16); | |
1761 | w[2] = (uint16_t) (bmp_slab >> 32); | |
1762 | w[3] = (uint16_t) (bmp_slab >> 48); | |
1763 | ||
1764 | grinder->pcache_qmask[grinder->pcache_w] = w[0]; | |
1765 | grinder->pcache_qindex[grinder->pcache_w] = bmp_pos; | |
1766 | grinder->pcache_w += (w[0] != 0); | |
1767 | ||
1768 | grinder->pcache_qmask[grinder->pcache_w] = w[1]; | |
1769 | grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16; | |
1770 | grinder->pcache_w += (w[1] != 0); | |
1771 | ||
1772 | grinder->pcache_qmask[grinder->pcache_w] = w[2]; | |
1773 | grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32; | |
1774 | grinder->pcache_w += (w[2] != 0); | |
1775 | ||
1776 | grinder->pcache_qmask[grinder->pcache_w] = w[3]; | |
1777 | grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48; | |
1778 | grinder->pcache_w += (w[3] != 0); | |
1779 | } | |
1780 | ||
1781 | static inline void | |
1782 | grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask) | |
1783 | { | |
1784 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1785 | uint8_t b[4]; | |
1786 | ||
1787 | grinder->tccache_w = 0; | |
1788 | grinder->tccache_r = 0; | |
1789 | ||
1790 | b[0] = (uint8_t) (qmask & 0xF); | |
1791 | b[1] = (uint8_t) ((qmask >> 4) & 0xF); | |
1792 | b[2] = (uint8_t) ((qmask >> 8) & 0xF); | |
1793 | b[3] = (uint8_t) ((qmask >> 12) & 0xF); | |
1794 | ||
1795 | grinder->tccache_qmask[grinder->tccache_w] = b[0]; | |
1796 | grinder->tccache_qindex[grinder->tccache_w] = qindex; | |
1797 | grinder->tccache_w += (b[0] != 0); | |
1798 | ||
1799 | grinder->tccache_qmask[grinder->tccache_w] = b[1]; | |
1800 | grinder->tccache_qindex[grinder->tccache_w] = qindex + 4; | |
1801 | grinder->tccache_w += (b[1] != 0); | |
1802 | ||
1803 | grinder->tccache_qmask[grinder->tccache_w] = b[2]; | |
1804 | grinder->tccache_qindex[grinder->tccache_w] = qindex + 8; | |
1805 | grinder->tccache_w += (b[2] != 0); | |
1806 | ||
1807 | grinder->tccache_qmask[grinder->tccache_w] = b[3]; | |
1808 | grinder->tccache_qindex[grinder->tccache_w] = qindex + 12; | |
1809 | grinder->tccache_w += (b[3] != 0); | |
1810 | } | |
1811 | ||
1812 | static inline int | |
1813 | grinder_next_tc(struct rte_sched_port *port, uint32_t pos) | |
1814 | { | |
1815 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1816 | struct rte_mbuf **qbase; | |
1817 | uint32_t qindex; | |
1818 | uint16_t qsize; | |
1819 | ||
1820 | if (grinder->tccache_r == grinder->tccache_w) | |
1821 | return 0; | |
1822 | ||
1823 | qindex = grinder->tccache_qindex[grinder->tccache_r]; | |
1824 | qbase = rte_sched_port_qbase(port, qindex); | |
1825 | qsize = rte_sched_port_qsize(port, qindex); | |
1826 | ||
1827 | grinder->tc_index = (qindex >> 2) & 0x3; | |
1828 | grinder->qmask = grinder->tccache_qmask[grinder->tccache_r]; | |
1829 | grinder->qsize = qsize; | |
1830 | ||
1831 | grinder->qindex[0] = qindex; | |
1832 | grinder->qindex[1] = qindex + 1; | |
1833 | grinder->qindex[2] = qindex + 2; | |
1834 | grinder->qindex[3] = qindex + 3; | |
1835 | ||
1836 | grinder->queue[0] = port->queue + qindex; | |
1837 | grinder->queue[1] = port->queue + qindex + 1; | |
1838 | grinder->queue[2] = port->queue + qindex + 2; | |
1839 | grinder->queue[3] = port->queue + qindex + 3; | |
1840 | ||
1841 | grinder->qbase[0] = qbase; | |
1842 | grinder->qbase[1] = qbase + qsize; | |
1843 | grinder->qbase[2] = qbase + 2 * qsize; | |
1844 | grinder->qbase[3] = qbase + 3 * qsize; | |
1845 | ||
1846 | grinder->tccache_r++; | |
1847 | return 1; | |
1848 | } | |
1849 | ||
1850 | static inline int | |
1851 | grinder_next_pipe(struct rte_sched_port *port, uint32_t pos) | |
1852 | { | |
1853 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1854 | uint32_t pipe_qindex; | |
1855 | uint16_t pipe_qmask; | |
1856 | ||
1857 | if (grinder->pcache_r < grinder->pcache_w) { | |
1858 | pipe_qmask = grinder->pcache_qmask[grinder->pcache_r]; | |
1859 | pipe_qindex = grinder->pcache_qindex[grinder->pcache_r]; | |
1860 | grinder->pcache_r++; | |
1861 | } else { | |
1862 | uint64_t bmp_slab = 0; | |
1863 | uint32_t bmp_pos = 0; | |
1864 | ||
1865 | /* Get another non-empty pipe group */ | |
1866 | if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) | |
1867 | return 0; | |
1868 | ||
1869 | #ifdef RTE_SCHED_DEBUG | |
1870 | debug_check_queue_slab(port, bmp_pos, bmp_slab); | |
1871 | #endif | |
1872 | ||
1873 | /* Return if pipe group already in one of the other grinders */ | |
1874 | port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID; | |
1875 | if (unlikely(grinder_pipe_exists(port, bmp_pos))) | |
1876 | return 0; | |
1877 | ||
1878 | port->grinder_base_bmp_pos[pos] = bmp_pos; | |
1879 | ||
1880 | /* Install new pipe group into grinder's pipe cache */ | |
1881 | grinder_pcache_populate(port, pos, bmp_pos, bmp_slab); | |
1882 | ||
1883 | pipe_qmask = grinder->pcache_qmask[0]; | |
1884 | pipe_qindex = grinder->pcache_qindex[0]; | |
1885 | grinder->pcache_r = 1; | |
1886 | } | |
1887 | ||
1888 | /* Install new pipe in the grinder */ | |
1889 | grinder->pindex = pipe_qindex >> 4; | |
1890 | grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport); | |
1891 | grinder->pipe = port->pipe + grinder->pindex; | |
1892 | grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */ | |
1893 | grinder->productive = 0; | |
1894 | ||
1895 | grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask); | |
1896 | grinder_next_tc(port, pos); | |
1897 | ||
1898 | /* Check for pipe exhaustion */ | |
1899 | if (grinder->pindex == port->pipe_loop) { | |
1900 | port->pipe_exhaustion = 1; | |
1901 | port->pipe_loop = RTE_SCHED_PIPE_INVALID; | |
1902 | } | |
1903 | ||
1904 | return 1; | |
1905 | } | |
1906 | ||
1907 | ||
1908 | static inline void | |
1909 | grinder_wrr_load(struct rte_sched_port *port, uint32_t pos) | |
1910 | { | |
1911 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1912 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1913 | struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params; | |
1914 | uint32_t tc_index = grinder->tc_index; | |
1915 | uint32_t qmask = grinder->qmask; | |
1916 | uint32_t qindex; | |
1917 | ||
1918 | qindex = tc_index * 4; | |
1919 | ||
1920 | grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT; | |
1921 | grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT; | |
1922 | grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT; | |
1923 | grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT; | |
1924 | ||
1925 | grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF; | |
1926 | grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF; | |
1927 | grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF; | |
1928 | grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF; | |
1929 | ||
1930 | grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex]; | |
1931 | grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1]; | |
1932 | grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2]; | |
1933 | grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3]; | |
1934 | } | |
1935 | ||
1936 | static inline void | |
1937 | grinder_wrr_store(struct rte_sched_port *port, uint32_t pos) | |
1938 | { | |
1939 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1940 | struct rte_sched_pipe *pipe = grinder->pipe; | |
1941 | uint32_t tc_index = grinder->tc_index; | |
1942 | uint32_t qindex; | |
1943 | ||
1944 | qindex = tc_index * 4; | |
1945 | ||
1946 | pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0]) | |
1947 | >> RTE_SCHED_WRR_SHIFT; | |
1948 | pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1]) | |
1949 | >> RTE_SCHED_WRR_SHIFT; | |
1950 | pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2]) | |
1951 | >> RTE_SCHED_WRR_SHIFT; | |
1952 | pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3]) | |
1953 | >> RTE_SCHED_WRR_SHIFT; | |
1954 | } | |
1955 | ||
1956 | static inline void | |
1957 | grinder_wrr(struct rte_sched_port *port, uint32_t pos) | |
1958 | { | |
1959 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1960 | uint16_t wrr_tokens_min; | |
1961 | ||
1962 | grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0]; | |
1963 | grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1]; | |
1964 | grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2]; | |
1965 | grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3]; | |
1966 | ||
1967 | grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens); | |
1968 | wrr_tokens_min = grinder->wrr_tokens[grinder->qpos]; | |
1969 | ||
1970 | grinder->wrr_tokens[0] -= wrr_tokens_min; | |
1971 | grinder->wrr_tokens[1] -= wrr_tokens_min; | |
1972 | grinder->wrr_tokens[2] -= wrr_tokens_min; | |
1973 | grinder->wrr_tokens[3] -= wrr_tokens_min; | |
1974 | } | |
1975 | ||
1976 | ||
1977 | #define grinder_evict(port, pos) | |
1978 | ||
1979 | static inline void | |
1980 | grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos) | |
1981 | { | |
1982 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1983 | ||
1984 | rte_prefetch0(grinder->pipe); | |
1985 | rte_prefetch0(grinder->queue[0]); | |
1986 | } | |
1987 | ||
1988 | static inline void | |
1989 | grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos) | |
1990 | { | |
1991 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
1992 | uint16_t qsize, qr[4]; | |
1993 | ||
1994 | qsize = grinder->qsize; | |
1995 | qr[0] = grinder->queue[0]->qr & (qsize - 1); | |
1996 | qr[1] = grinder->queue[1]->qr & (qsize - 1); | |
1997 | qr[2] = grinder->queue[2]->qr & (qsize - 1); | |
1998 | qr[3] = grinder->queue[3]->qr & (qsize - 1); | |
1999 | ||
2000 | rte_prefetch0(grinder->qbase[0] + qr[0]); | |
2001 | rte_prefetch0(grinder->qbase[1] + qr[1]); | |
2002 | ||
2003 | grinder_wrr_load(port, pos); | |
2004 | grinder_wrr(port, pos); | |
2005 | ||
2006 | rte_prefetch0(grinder->qbase[2] + qr[2]); | |
2007 | rte_prefetch0(grinder->qbase[3] + qr[3]); | |
2008 | } | |
2009 | ||
2010 | static inline void | |
2011 | grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos) | |
2012 | { | |
2013 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
2014 | uint32_t qpos = grinder->qpos; | |
2015 | struct rte_mbuf **qbase = grinder->qbase[qpos]; | |
2016 | uint16_t qsize = grinder->qsize; | |
2017 | uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1); | |
2018 | ||
2019 | grinder->pkt = qbase[qr]; | |
2020 | rte_prefetch0(grinder->pkt); | |
2021 | ||
2022 | if (unlikely((qr & 0x7) == 7)) { | |
2023 | uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1); | |
2024 | ||
2025 | rte_prefetch0(qbase + qr_next); | |
2026 | } | |
2027 | } | |
2028 | ||
2029 | static inline uint32_t | |
2030 | grinder_handle(struct rte_sched_port *port, uint32_t pos) | |
2031 | { | |
2032 | struct rte_sched_grinder *grinder = port->grinder + pos; | |
2033 | ||
2034 | switch (grinder->state) { | |
2035 | case e_GRINDER_PREFETCH_PIPE: | |
2036 | { | |
2037 | if (grinder_next_pipe(port, pos)) { | |
2038 | grinder_prefetch_pipe(port, pos); | |
2039 | port->busy_grinders++; | |
2040 | ||
2041 | grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS; | |
2042 | return 0; | |
2043 | } | |
2044 | ||
2045 | return 0; | |
2046 | } | |
2047 | ||
2048 | case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS: | |
2049 | { | |
2050 | struct rte_sched_pipe *pipe = grinder->pipe; | |
2051 | ||
2052 | grinder->pipe_params = port->pipe_profiles + pipe->profile; | |
2053 | grinder_prefetch_tc_queue_arrays(port, pos); | |
2054 | grinder_credits_update(port, pos); | |
2055 | ||
2056 | grinder->state = e_GRINDER_PREFETCH_MBUF; | |
2057 | return 0; | |
2058 | } | |
2059 | ||
2060 | case e_GRINDER_PREFETCH_MBUF: | |
2061 | { | |
2062 | grinder_prefetch_mbuf(port, pos); | |
2063 | ||
2064 | grinder->state = e_GRINDER_READ_MBUF; | |
2065 | return 0; | |
2066 | } | |
2067 | ||
2068 | case e_GRINDER_READ_MBUF: | |
2069 | { | |
2070 | uint32_t result = 0; | |
2071 | ||
2072 | result = grinder_schedule(port, pos); | |
2073 | ||
2074 | /* Look for next packet within the same TC */ | |
2075 | if (result && grinder->qmask) { | |
2076 | grinder_wrr(port, pos); | |
2077 | grinder_prefetch_mbuf(port, pos); | |
2078 | ||
2079 | return 1; | |
2080 | } | |
2081 | grinder_wrr_store(port, pos); | |
2082 | ||
2083 | /* Look for another active TC within same pipe */ | |
2084 | if (grinder_next_tc(port, pos)) { | |
2085 | grinder_prefetch_tc_queue_arrays(port, pos); | |
2086 | ||
2087 | grinder->state = e_GRINDER_PREFETCH_MBUF; | |
2088 | return result; | |
2089 | } | |
2090 | ||
2091 | if (grinder->productive == 0 && | |
2092 | port->pipe_loop == RTE_SCHED_PIPE_INVALID) | |
2093 | port->pipe_loop = grinder->pindex; | |
2094 | ||
2095 | grinder_evict(port, pos); | |
2096 | ||
2097 | /* Look for another active pipe */ | |
2098 | if (grinder_next_pipe(port, pos)) { | |
2099 | grinder_prefetch_pipe(port, pos); | |
2100 | ||
2101 | grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS; | |
2102 | return result; | |
2103 | } | |
2104 | ||
2105 | /* No active pipe found */ | |
2106 | port->busy_grinders--; | |
2107 | ||
2108 | grinder->state = e_GRINDER_PREFETCH_PIPE; | |
2109 | return result; | |
2110 | } | |
2111 | ||
2112 | default: | |
2113 | rte_panic("Algorithmic error (invalid state)\n"); | |
2114 | return 0; | |
2115 | } | |
2116 | } | |
2117 | ||
2118 | static inline void | |
2119 | rte_sched_port_time_resync(struct rte_sched_port *port) | |
2120 | { | |
2121 | uint64_t cycles = rte_get_tsc_cycles(); | |
2122 | uint64_t cycles_diff = cycles - port->time_cpu_cycles; | |
2123 | uint64_t bytes_diff; | |
2124 | ||
2125 | /* Compute elapsed time in bytes */ | |
2126 | bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT, | |
2127 | port->inv_cycles_per_byte); | |
2128 | ||
2129 | /* Advance port time */ | |
2130 | port->time_cpu_cycles = cycles; | |
2131 | port->time_cpu_bytes += bytes_diff; | |
2132 | if (port->time < port->time_cpu_bytes) | |
2133 | port->time = port->time_cpu_bytes; | |
2134 | ||
2135 | /* Reset pipe loop detection */ | |
2136 | port->pipe_loop = RTE_SCHED_PIPE_INVALID; | |
2137 | } | |
2138 | ||
2139 | static inline int | |
2140 | rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass) | |
2141 | { | |
2142 | int exceptions; | |
2143 | ||
2144 | /* Check if any exception flag is set */ | |
2145 | exceptions = (second_pass && port->busy_grinders == 0) || | |
2146 | (port->pipe_exhaustion == 1); | |
2147 | ||
2148 | /* Clear exception flags */ | |
2149 | port->pipe_exhaustion = 0; | |
2150 | ||
2151 | return exceptions; | |
2152 | } | |
2153 | ||
2154 | int | |
2155 | rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts) | |
2156 | { | |
2157 | uint32_t i, count; | |
2158 | ||
2159 | port->pkts_out = pkts; | |
2160 | port->n_pkts_out = 0; | |
2161 | ||
2162 | rte_sched_port_time_resync(port); | |
2163 | ||
2164 | /* Take each queue in the grinder one step further */ | |
2165 | for (i = 0, count = 0; ; i++) { | |
2166 | count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1)); | |
2167 | if ((count == n_pkts) || | |
2168 | rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) { | |
2169 | break; | |
2170 | } | |
2171 | } | |
2172 | ||
2173 | return count; | |
2174 | } |