[ceph.git] / ceph / src / isa-l / crc / aarch64 / crc_aarch64_dispatcher.c

/**********************************************************************
  Copyright(c) 2019-2020 Arm Corporation All rights reserved.

  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions
  are met:
    * Redistributions of source code must retain the above copyright
      notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in
      the documentation and/or other materials provided with the
      distribution.
    * Neither the name of Arm Corporation nor the names of its
      contributors may be used to endorse or promote products derived
      from this software without specific prior written permission.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <aarch64_multibinary.h>

DEFINE_INTERFACE_DISPATCHER(crc16_t10dif)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc16_t10dif_pmull);

	return PROVIDER_BASIC(crc16_t10dif);

}

DEFINE_INTERFACE_DISPATCHER(crc16_t10dif_copy)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc16_t10dif_copy_pmull);

	return PROVIDER_BASIC(crc16_t10dif_copy);

}

DEFINE_INTERFACE_DISPATCHER(crc32_ieee)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL) {
		return PROVIDER_INFO(crc32_ieee_norm_pmull);
	}

	return PROVIDER_BASIC(crc32_ieee);

}

DEFINE_INTERFACE_DISPATCHER(crc32_iscsi)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_CRC32) {
		switch (get_micro_arch_id()) {
		case MICRO_ARCH_ID(ARM, NEOVERSE_N1):
		case MICRO_ARCH_ID(ARM, CORTEX_A57):
		case MICRO_ARCH_ID(ARM, CORTEX_A72):
			return PROVIDER_INFO(crc32_iscsi_crc_ext);
		}
	}
	if ((HWCAP_CRC32 | HWCAP_PMULL) == (auxval & (HWCAP_CRC32 | HWCAP_PMULL))) {
		return PROVIDER_INFO(crc32_iscsi_3crc_fold);
	}

	if (auxval & HWCAP_PMULL) {
		return PROVIDER_INFO(crc32_iscsi_refl_pmull);
	}
	return PROVIDER_BASIC(crc32_iscsi);

}

DEFINE_INTERFACE_DISPATCHER(crc32_gzip_refl)
{
	unsigned long auxval = getauxval(AT_HWCAP);

	if (auxval & HWCAP_CRC32) {
		switch (get_micro_arch_id()) {
		case MICRO_ARCH_ID(ARM, NEOVERSE_N1):
		case MICRO_ARCH_ID(ARM, CORTEX_A57):
		case MICRO_ARCH_ID(ARM, CORTEX_A72):
			return PROVIDER_INFO(crc32_gzip_refl_crc_ext);
		}
	}
	if ((HWCAP_CRC32 | HWCAP_PMULL) == (auxval & (HWCAP_CRC32 | HWCAP_PMULL))) {
		return PROVIDER_INFO(crc32_gzip_refl_3crc_fold);
	}

	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc32_gzip_refl_pmull);

	return PROVIDER_BASIC(crc32_gzip_refl);

}

DEFINE_INTERFACE_DISPATCHER(crc64_ecma_refl)
{
	unsigned long auxval = getauxval(AT_HWCAP);

	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_ecma_refl_pmull);

	return PROVIDER_BASIC(crc64_ecma_refl);

}

DEFINE_INTERFACE_DISPATCHER(crc64_ecma_norm)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_ecma_norm_pmull);

	return PROVIDER_BASIC(crc64_ecma_norm);

}

DEFINE_INTERFACE_DISPATCHER(crc64_iso_refl)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_iso_refl_pmull);

	return PROVIDER_BASIC(crc64_iso_refl);

}

DEFINE_INTERFACE_DISPATCHER(crc64_iso_norm)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_iso_norm_pmull);

	return PROVIDER_BASIC(crc64_iso_norm);

}

DEFINE_INTERFACE_DISPATCHER(crc64_jones_refl)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_jones_refl_pmull);

	return PROVIDER_BASIC(crc64_jones_refl);

}

DEFINE_INTERFACE_DISPATCHER(crc64_jones_norm)
{
	unsigned long auxval = getauxval(AT_HWCAP);
	if (auxval & HWCAP_PMULL)
		return PROVIDER_INFO(crc64_jones_norm_pmull);

	return PROVIDER_BASIC(crc64_jones_norm);

}
Commit	Line	Data
f91f0fd5	1	/**********************************************************************
20effc67	2	Copyright(c) 2019-2020 Arm Corporation All rights reserved.
f91f0fd5 TL	3
	4	Redistribution and use in source and binary forms, with or without
	5	modification, are permitted provided that the following conditions
	6	are met:
	7	* Redistributions of source code must retain the above copyright
	8	notice, this list of conditions and the following disclaimer.
	9	* Redistributions in binary form must reproduce the above copyright
	10	notice, this list of conditions and the following disclaimer in
	11	the documentation and/or other materials provided with the
	12	distribution.
	13	* Neither the name of Arm Corporation nor the names of its
	14	contributors may be used to endorse or promote products derived
	15	from this software without specific prior written permission.
	16
	17	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	18	"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	19	LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	20	A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	21	OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	22	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	23	LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	24	DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	25	THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	26	(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	27	OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	28	**********************************************************************/
	29	#include <aarch64_multibinary.h>
	30
	31	DEFINE_INTERFACE_DISPATCHER(crc16_t10dif)
	32	{
	33	unsigned long auxval = getauxval(AT_HWCAP);
	34	if (auxval & HWCAP_PMULL)
	35	return PROVIDER_INFO(crc16_t10dif_pmull);
	36
	37	return PROVIDER_BASIC(crc16_t10dif);
	38
	39	}
	40
	41	DEFINE_INTERFACE_DISPATCHER(crc16_t10dif_copy)
	42	{
	43	unsigned long auxval = getauxval(AT_HWCAP);
	44	if (auxval & HWCAP_PMULL)
	45	return PROVIDER_INFO(crc16_t10dif_copy_pmull);
	46
	47	return PROVIDER_BASIC(crc16_t10dif_copy);
	48
	49	}
	50
	51	DEFINE_INTERFACE_DISPATCHER(crc32_ieee)
	52	{
	53	unsigned long auxval = getauxval(AT_HWCAP);
	54	if (auxval & HWCAP_PMULL) {
	55	return PROVIDER_INFO(crc32_ieee_norm_pmull);
	56	}
	57
	58	return PROVIDER_BASIC(crc32_ieee);
	59
	60	}
	61
	62	DEFINE_INTERFACE_DISPATCHER(crc32_iscsi)
	63	{
	64	unsigned long auxval = getauxval(AT_HWCAP);
20effc67 TL	65	if (auxval & HWCAP_CRC32) {
	66	switch (get_micro_arch_id()) {
	67	case MICRO_ARCH_ID(ARM, NEOVERSE_N1):
	68	case MICRO_ARCH_ID(ARM, CORTEX_A57):
	69	case MICRO_ARCH_ID(ARM, CORTEX_A72):
	70	return PROVIDER_INFO(crc32_iscsi_crc_ext);
	71	}
	72	}
	73	if ((HWCAP_CRC32 \| HWCAP_PMULL) == (auxval & (HWCAP_CRC32 \| HWCAP_PMULL))) {
	74	return PROVIDER_INFO(crc32_iscsi_3crc_fold);
	75	}
	76
f91f0fd5 TL	77	if (auxval & HWCAP_PMULL) {
	78	return PROVIDER_INFO(crc32_iscsi_refl_pmull);
	79	}
	80	return PROVIDER_BASIC(crc32_iscsi);
	81
	82	}
	83
	84	DEFINE_INTERFACE_DISPATCHER(crc32_gzip_refl)
	85	{
	86	unsigned long auxval = getauxval(AT_HWCAP);
20effc67 TL	87
	88	if (auxval & HWCAP_CRC32) {
	89	switch (get_micro_arch_id()) {
	90	case MICRO_ARCH_ID(ARM, NEOVERSE_N1):
	91	case MICRO_ARCH_ID(ARM, CORTEX_A57):
	92	case MICRO_ARCH_ID(ARM, CORTEX_A72):
	93	return PROVIDER_INFO(crc32_gzip_refl_crc_ext);
	94	}
	95	}
	96	if ((HWCAP_CRC32 \| HWCAP_PMULL) == (auxval & (HWCAP_CRC32 \| HWCAP_PMULL))) {
	97	return PROVIDER_INFO(crc32_gzip_refl_3crc_fold);
	98	}
	99
f91f0fd5 TL	100	if (auxval & HWCAP_PMULL)
	101	return PROVIDER_INFO(crc32_gzip_refl_pmull);
	102
	103	return PROVIDER_BASIC(crc32_gzip_refl);
	104
	105	}
	106
	107	DEFINE_INTERFACE_DISPATCHER(crc64_ecma_refl)
	108	{
	109	unsigned long auxval = getauxval(AT_HWCAP);
	110
	111	if (auxval & HWCAP_PMULL)
	112	return PROVIDER_INFO(crc64_ecma_refl_pmull);
	113
	114	return PROVIDER_BASIC(crc64_ecma_refl);
	115
	116	}
	117
	118	DEFINE_INTERFACE_DISPATCHER(crc64_ecma_norm)
	119	{
	120	unsigned long auxval = getauxval(AT_HWCAP);
	121	if (auxval & HWCAP_PMULL)
	122	return PROVIDER_INFO(crc64_ecma_norm_pmull);
	123
	124	return PROVIDER_BASIC(crc64_ecma_norm);
	125
	126	}
	127
	128	DEFINE_INTERFACE_DISPATCHER(crc64_iso_refl)
	129	{
	130	unsigned long auxval = getauxval(AT_HWCAP);
	131	if (auxval & HWCAP_PMULL)
	132	return PROVIDER_INFO(crc64_iso_refl_pmull);
	133
	134	return PROVIDER_BASIC(crc64_iso_refl);
	135
	136	}
	137
	138	DEFINE_INTERFACE_DISPATCHER(crc64_iso_norm)
	139	{
	140	unsigned long auxval = getauxval(AT_HWCAP);
	141	if (auxval & HWCAP_PMULL)
	142	return PROVIDER_INFO(crc64_iso_norm_pmull);
	143
	144	return PROVIDER_BASIC(crc64_iso_norm);
	145
	146	}
	147
	148	DEFINE_INTERFACE_DISPATCHER(crc64_jones_refl)
	149	{
	150	unsigned long auxval = getauxval(AT_HWCAP);
	151	if (auxval & HWCAP_PMULL)
	152	return PROVIDER_INFO(crc64_jones_refl_pmull);
	153
	154	return PROVIDER_BASIC(crc64_jones_refl);
	155
	156	}
	157
	158	DEFINE_INTERFACE_DISPATCHER(crc64_jones_norm)
	159	{
	160	unsigned long auxval = getauxval(AT_HWCAP);
	161	if (auxval & HWCAP_PMULL)
	162	return PROVIDER_INFO(crc64_jones_norm_pmull);
	163
164	return PROVIDER_BASIC(crc64_jones_norm);
165
166	}