[ceph.git] / ceph / src / seastar / dpdk / drivers / crypto / dpaa2_sec / hw / rta / operation_cmd.h

/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
 *
 * Copyright 2008-2016 Freescale Semiconductor Inc.
 * Copyright 2016 NXP
 *
 */

#ifndef __RTA_OPERATION_CMD_H__
#define __RTA_OPERATION_CMD_H__

#if defined(RTE_TOOLCHAIN_GCC) && (GCC_VERSION >= 70000)
#pragma GCC diagnostic ignored "-Wimplicit-fallthrough"
#endif

extern enum rta_sec_era rta_sec_era;

static inline int
__rta_alg_aai_aes(uint16_t aai)
{
	uint16_t aes_mode = aai & OP_ALG_AESA_MODE_MASK;

	if (aai & OP_ALG_AAI_C2K) {
		if (rta_sec_era < RTA_SEC_ERA_5)
			return -1;
		if ((aes_mode != OP_ALG_AAI_CCM) &&
		    (aes_mode != OP_ALG_AAI_GCM))
			return -EINVAL;
	}

	switch (aes_mode) {
	case OP_ALG_AAI_CBC_CMAC:
	case OP_ALG_AAI_CTR_CMAC_LTE:
	case OP_ALG_AAI_CTR_CMAC:
		if (rta_sec_era < RTA_SEC_ERA_2)
			return -EINVAL;
		/* no break */
	case OP_ALG_AAI_CTR:
	case OP_ALG_AAI_CBC:
	case OP_ALG_AAI_ECB:
	case OP_ALG_AAI_OFB:
	case OP_ALG_AAI_CFB:
	case OP_ALG_AAI_XTS:
	case OP_ALG_AAI_CMAC:
	case OP_ALG_AAI_XCBC_MAC:
	case OP_ALG_AAI_CCM:
	case OP_ALG_AAI_GCM:
	case OP_ALG_AAI_CBC_XCBCMAC:
	case OP_ALG_AAI_CTR_XCBCMAC:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_des(uint16_t aai)
{
	uint16_t aai_code = (uint16_t)(aai & ~OP_ALG_AAI_CHECKODD);

	switch (aai_code) {
	case OP_ALG_AAI_CBC:
	case OP_ALG_AAI_ECB:
	case OP_ALG_AAI_CFB:
	case OP_ALG_AAI_OFB:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_md5(uint16_t aai)
{
	switch (aai) {
	case OP_ALG_AAI_HMAC:
		if (rta_sec_era < RTA_SEC_ERA_2)
			return -EINVAL;
		/* no break */
	case OP_ALG_AAI_SMAC:
	case OP_ALG_AAI_HASH:
	case OP_ALG_AAI_HMAC_PRECOMP:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_sha(uint16_t aai)
{
	switch (aai) {
	case OP_ALG_AAI_HMAC:
		if (rta_sec_era < RTA_SEC_ERA_2)
			return -EINVAL;
		/* no break */
	case OP_ALG_AAI_HASH:
	case OP_ALG_AAI_HMAC_PRECOMP:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_rng(uint16_t aai)
{
	uint16_t rng_mode = aai & OP_ALG_RNG_MODE_MASK;
	uint16_t rng_sh = aai & OP_ALG_AAI_RNG4_SH_MASK;

	switch (rng_mode) {
	case OP_ALG_AAI_RNG:
	case OP_ALG_AAI_RNG_NZB:
	case OP_ALG_AAI_RNG_OBP:
		break;
	default:
		return -EINVAL;
	}

	/* State Handle bits are valid only for SEC Era >= 5 */
	if ((rta_sec_era < RTA_SEC_ERA_5) && rng_sh)
		return -EINVAL;

	/* PS, AI, SK bits are also valid only for SEC Era >= 5 */
	if ((rta_sec_era < RTA_SEC_ERA_5) && (aai &
	     (OP_ALG_AAI_RNG4_PS | OP_ALG_AAI_RNG4_AI | OP_ALG_AAI_RNG4_SK)))
		return -EINVAL;

	switch (rng_sh) {
	case OP_ALG_AAI_RNG4_SH_0:
	case OP_ALG_AAI_RNG4_SH_1:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_crc(uint16_t aai)
{
	uint16_t aai_code = aai & OP_ALG_CRC_POLY_MASK;

	switch (aai_code) {
	case OP_ALG_AAI_802:
	case OP_ALG_AAI_3385:
	case OP_ALG_AAI_CUST_POLY:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_kasumi(uint16_t aai)
{
	switch (aai) {
	case OP_ALG_AAI_GSM:
	case OP_ALG_AAI_EDGE:
	case OP_ALG_AAI_F8:
	case OP_ALG_AAI_F9:
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_alg_aai_snow_f9(uint16_t aai)
{
	if (aai == OP_ALG_AAI_F9)
		return 0;

	return -EINVAL;
}

static inline int
__rta_alg_aai_snow_f8(uint16_t aai)
{
	if (aai == OP_ALG_AAI_F8)
		return 0;

	return -EINVAL;
}

static inline int
__rta_alg_aai_zuce(uint16_t aai)
{
	if (aai == OP_ALG_AAI_F8)
		return 0;

	return -EINVAL;
}

static inline int
__rta_alg_aai_zuca(uint16_t aai)
{
	if (aai == OP_ALG_AAI_F9)
		return 0;

	return -EINVAL;
}

struct alg_aai_map {
	uint32_t chipher_algo;
	int (*aai_func)(uint16_t);
	uint32_t class;
};

static const struct alg_aai_map alg_table[] = {
/*1*/	{ OP_ALG_ALGSEL_AES,      __rta_alg_aai_aes,    OP_TYPE_CLASS1_ALG },
	{ OP_ALG_ALGSEL_DES,      __rta_alg_aai_des,    OP_TYPE_CLASS1_ALG },
	{ OP_ALG_ALGSEL_3DES,     __rta_alg_aai_des,    OP_TYPE_CLASS1_ALG },
	{ OP_ALG_ALGSEL_MD5,      __rta_alg_aai_md5,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_SHA1,     __rta_alg_aai_md5,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_SHA224,   __rta_alg_aai_sha,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_SHA256,   __rta_alg_aai_sha,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_SHA384,   __rta_alg_aai_sha,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_SHA512,   __rta_alg_aai_sha,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_RNG,      __rta_alg_aai_rng,    OP_TYPE_CLASS1_ALG },
/*11*/	{ OP_ALG_ALGSEL_CRC,      __rta_alg_aai_crc,    OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_ARC4,     NULL,                 OP_TYPE_CLASS1_ALG },
	{ OP_ALG_ALGSEL_SNOW_F8,  __rta_alg_aai_snow_f8, OP_TYPE_CLASS1_ALG },
/*14*/	{ OP_ALG_ALGSEL_KASUMI,   __rta_alg_aai_kasumi, OP_TYPE_CLASS1_ALG },
	{ OP_ALG_ALGSEL_SNOW_F9,  __rta_alg_aai_snow_f9, OP_TYPE_CLASS2_ALG },
	{ OP_ALG_ALGSEL_ZUCE,     __rta_alg_aai_zuce,   OP_TYPE_CLASS1_ALG },
/*17*/	{ OP_ALG_ALGSEL_ZUCA,     __rta_alg_aai_zuca,   OP_TYPE_CLASS2_ALG }
};

/*
 * Allowed OPERATION algorithms for each SEC Era.
 * Values represent the number of entries from alg_table[] that are supported.
 */
static const unsigned int alg_table_sz[] = {14, 15, 15, 15, 17, 17, 11, 17};

static inline int
rta_operation(struct program *program, uint32_t cipher_algo,
	      uint16_t aai, uint8_t algo_state,
	      int icv_checking, int enc)
{
	uint32_t opcode = CMD_OPERATION;
	unsigned int i, found = 0;
	unsigned int start_pc = program->current_pc;
	int ret;

	for (i = 0; i < alg_table_sz[rta_sec_era]; i++) {
		if (alg_table[i].chipher_algo == cipher_algo) {
			opcode |= cipher_algo | alg_table[i].class;
			/* nothing else to verify */
			if (alg_table[i].aai_func == NULL) {
				found = 1;
				break;
			}

			aai &= OP_ALG_AAI_MASK;

			ret = (*alg_table[i].aai_func)(aai);
			if (ret < 0) {
				pr_err("OPERATION: Bad AAI Type. SEC Program Line: %d\n",
				       program->current_pc);
				goto err;
			}
			opcode |= aai;
			found = 1;
			break;
		}
	}
	if (!found) {
		pr_err("OPERATION: Invalid Command. SEC Program Line: %d\n",
		       program->current_pc);
		ret = -EINVAL;
		goto err;
	}

	switch (algo_state) {
	case OP_ALG_AS_UPDATE:
	case OP_ALG_AS_INIT:
	case OP_ALG_AS_FINALIZE:
	case OP_ALG_AS_INITFINAL:
		opcode |= algo_state;
		break;
	default:
		pr_err("Invalid Operation Command\n");
		ret = -EINVAL;
		goto err;
	}

	switch (icv_checking) {
	case ICV_CHECK_DISABLE:
		/*
		 * opcode |= OP_ALG_ICV_OFF;
		 * OP_ALG_ICV_OFF is 0
		 */
		break;
	case ICV_CHECK_ENABLE:
		opcode |= OP_ALG_ICV_ON;
		break;
	default:
		pr_err("Invalid Operation Command\n");
		ret = -EINVAL;
		goto err;
	}

	switch (enc) {
	case DIR_DEC:
		/*
		 * opcode |= OP_ALG_DECRYPT;
		 * OP_ALG_DECRYPT is 0
		 */
		break;
	case DIR_ENC:
		opcode |= OP_ALG_ENCRYPT;
		break;
	default:
		pr_err("Invalid Operation Command\n");
		ret = -EINVAL;
		goto err;
	}

	__rta_out32(program, opcode);
	program->current_instruction++;
	return (int)start_pc;

 err:
	program->first_error_pc = start_pc;
	return ret;
}

/*
 * OPERATION PKHA routines
 */
static inline int
__rta_pkha_clearmem(uint32_t pkha_op)
{
	switch (pkha_op) {
	case (OP_ALG_PKMODE_CLEARMEM_ALL):
	case (OP_ALG_PKMODE_CLEARMEM_ABE):
	case (OP_ALG_PKMODE_CLEARMEM_ABN):
	case (OP_ALG_PKMODE_CLEARMEM_AB):
	case (OP_ALG_PKMODE_CLEARMEM_AEN):
	case (OP_ALG_PKMODE_CLEARMEM_AE):
	case (OP_ALG_PKMODE_CLEARMEM_AN):
	case (OP_ALG_PKMODE_CLEARMEM_A):
	case (OP_ALG_PKMODE_CLEARMEM_BEN):
	case (OP_ALG_PKMODE_CLEARMEM_BE):
	case (OP_ALG_PKMODE_CLEARMEM_BN):
	case (OP_ALG_PKMODE_CLEARMEM_B):
	case (OP_ALG_PKMODE_CLEARMEM_EN):
	case (OP_ALG_PKMODE_CLEARMEM_N):
	case (OP_ALG_PKMODE_CLEARMEM_E):
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_pkha_mod_arithmetic(uint32_t pkha_op)
{
	pkha_op &= (uint32_t)~OP_ALG_PKMODE_OUT_A;

	switch (pkha_op) {
	case (OP_ALG_PKMODE_MOD_ADD):
	case (OP_ALG_PKMODE_MOD_SUB_AB):
	case (OP_ALG_PKMODE_MOD_SUB_BA):
	case (OP_ALG_PKMODE_MOD_MULT):
	case (OP_ALG_PKMODE_MOD_MULT_IM):
	case (OP_ALG_PKMODE_MOD_MULT_IM_OM):
	case (OP_ALG_PKMODE_MOD_EXPO):
	case (OP_ALG_PKMODE_MOD_EXPO_TEQ):
	case (OP_ALG_PKMODE_MOD_EXPO_IM):
	case (OP_ALG_PKMODE_MOD_EXPO_IM_TEQ):
	case (OP_ALG_PKMODE_MOD_REDUCT):
	case (OP_ALG_PKMODE_MOD_INV):
	case (OP_ALG_PKMODE_MOD_MONT_CNST):
	case (OP_ALG_PKMODE_MOD_CRT_CNST):
	case (OP_ALG_PKMODE_MOD_GCD):
	case (OP_ALG_PKMODE_MOD_PRIMALITY):
	case (OP_ALG_PKMODE_MOD_SML_EXP):
	case (OP_ALG_PKMODE_F2M_ADD):
	case (OP_ALG_PKMODE_F2M_MUL):
	case (OP_ALG_PKMODE_F2M_MUL_IM):
	case (OP_ALG_PKMODE_F2M_MUL_IM_OM):
	case (OP_ALG_PKMODE_F2M_EXP):
	case (OP_ALG_PKMODE_F2M_EXP_TEQ):
	case (OP_ALG_PKMODE_F2M_AMODN):
	case (OP_ALG_PKMODE_F2M_INV):
	case (OP_ALG_PKMODE_F2M_R2):
	case (OP_ALG_PKMODE_F2M_GCD):
	case (OP_ALG_PKMODE_F2M_SML_EXP):
	case (OP_ALG_PKMODE_ECC_F2M_ADD):
	case (OP_ALG_PKMODE_ECC_F2M_ADD_IM_OM_PROJ):
	case (OP_ALG_PKMODE_ECC_F2M_DBL):
	case (OP_ALG_PKMODE_ECC_F2M_DBL_IM_OM_PROJ):
	case (OP_ALG_PKMODE_ECC_F2M_MUL):
	case (OP_ALG_PKMODE_ECC_F2M_MUL_TEQ):
	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2):
	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_TEQ):
	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ):
	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ_TEQ):
	case (OP_ALG_PKMODE_ECC_MOD_ADD):
	case (OP_ALG_PKMODE_ECC_MOD_ADD_IM_OM_PROJ):
	case (OP_ALG_PKMODE_ECC_MOD_DBL):
	case (OP_ALG_PKMODE_ECC_MOD_DBL_IM_OM_PROJ):
	case (OP_ALG_PKMODE_ECC_MOD_MUL):
	case (OP_ALG_PKMODE_ECC_MOD_MUL_TEQ):
	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2):
	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_TEQ):
	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ):
	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ_TEQ):
		return 0;
	}

	return -EINVAL;
}

static inline int
__rta_pkha_copymem(uint32_t pkha_op)
{
	switch (pkha_op) {
	case (OP_ALG_PKMODE_COPY_NSZ_A0_B0):
	case (OP_ALG_PKMODE_COPY_NSZ_A0_B1):
	case (OP_ALG_PKMODE_COPY_NSZ_A0_B2):
	case (OP_ALG_PKMODE_COPY_NSZ_A0_B3):
	case (OP_ALG_PKMODE_COPY_NSZ_A1_B0):
	case (OP_ALG_PKMODE_COPY_NSZ_A1_B1):
	case (OP_ALG_PKMODE_COPY_NSZ_A1_B2):
	case (OP_ALG_PKMODE_COPY_NSZ_A1_B3):
	case (OP_ALG_PKMODE_COPY_NSZ_A2_B0):
	case (OP_ALG_PKMODE_COPY_NSZ_A2_B1):
	case (OP_ALG_PKMODE_COPY_NSZ_A2_B2):
	case (OP_ALG_PKMODE_COPY_NSZ_A2_B3):
	case (OP_ALG_PKMODE_COPY_NSZ_A3_B0):
	case (OP_ALG_PKMODE_COPY_NSZ_A3_B1):
	case (OP_ALG_PKMODE_COPY_NSZ_A3_B2):
	case (OP_ALG_PKMODE_COPY_NSZ_A3_B3):
	case (OP_ALG_PKMODE_COPY_NSZ_B0_A0):
	case (OP_ALG_PKMODE_COPY_NSZ_B0_A1):
	case (OP_ALG_PKMODE_COPY_NSZ_B0_A2):
	case (OP_ALG_PKMODE_COPY_NSZ_B0_A3):
	case (OP_ALG_PKMODE_COPY_NSZ_B1_A0):
	case (OP_ALG_PKMODE_COPY_NSZ_B1_A1):
	case (OP_ALG_PKMODE_COPY_NSZ_B1_A2):
	case (OP_ALG_PKMODE_COPY_NSZ_B1_A3):
	case (OP_ALG_PKMODE_COPY_NSZ_B2_A0):
	case (OP_ALG_PKMODE_COPY_NSZ_B2_A1):
	case (OP_ALG_PKMODE_COPY_NSZ_B2_A2):
	case (OP_ALG_PKMODE_COPY_NSZ_B2_A3):
	case (OP_ALG_PKMODE_COPY_NSZ_B3_A0):
	case (OP_ALG_PKMODE_COPY_NSZ_B3_A1):
	case (OP_ALG_PKMODE_COPY_NSZ_B3_A2):
	case (OP_ALG_PKMODE_COPY_NSZ_B3_A3):
	case (OP_ALG_PKMODE_COPY_NSZ_A_E):
	case (OP_ALG_PKMODE_COPY_NSZ_A_N):
	case (OP_ALG_PKMODE_COPY_NSZ_B_E):
	case (OP_ALG_PKMODE_COPY_NSZ_B_N):
	case (OP_ALG_PKMODE_COPY_NSZ_N_A):
	case (OP_ALG_PKMODE_COPY_NSZ_N_B):
	case (OP_ALG_PKMODE_COPY_NSZ_N_E):
	case (OP_ALG_PKMODE_COPY_SSZ_A0_B0):
	case (OP_ALG_PKMODE_COPY_SSZ_A0_B1):
	case (OP_ALG_PKMODE_COPY_SSZ_A0_B2):
	case (OP_ALG_PKMODE_COPY_SSZ_A0_B3):
	case (OP_ALG_PKMODE_COPY_SSZ_A1_B0):
	case (OP_ALG_PKMODE_COPY_SSZ_A1_B1):
	case (OP_ALG_PKMODE_COPY_SSZ_A1_B2):
	case (OP_ALG_PKMODE_COPY_SSZ_A1_B3):
	case (OP_ALG_PKMODE_COPY_SSZ_A2_B0):
	case (OP_ALG_PKMODE_COPY_SSZ_A2_B1):
	case (OP_ALG_PKMODE_COPY_SSZ_A2_B2):
	case (OP_ALG_PKMODE_COPY_SSZ_A2_B3):
	case (OP_ALG_PKMODE_COPY_SSZ_A3_B0):
	case (OP_ALG_PKMODE_COPY_SSZ_A3_B1):
	case (OP_ALG_PKMODE_COPY_SSZ_A3_B2):
	case (OP_ALG_PKMODE_COPY_SSZ_A3_B3):
	case (OP_ALG_PKMODE_COPY_SSZ_B0_A0):
	case (OP_ALG_PKMODE_COPY_SSZ_B0_A1):
	case (OP_ALG_PKMODE_COPY_SSZ_B0_A2):
	case (OP_ALG_PKMODE_COPY_SSZ_B0_A3):
	case (OP_ALG_PKMODE_COPY_SSZ_B1_A0):
	case (OP_ALG_PKMODE_COPY_SSZ_B1_A1):
	case (OP_ALG_PKMODE_COPY_SSZ_B1_A2):
	case (OP_ALG_PKMODE_COPY_SSZ_B1_A3):
	case (OP_ALG_PKMODE_COPY_SSZ_B2_A0):
	case (OP_ALG_PKMODE_COPY_SSZ_B2_A1):
	case (OP_ALG_PKMODE_COPY_SSZ_B2_A2):
	case (OP_ALG_PKMODE_COPY_SSZ_B2_A3):
	case (OP_ALG_PKMODE_COPY_SSZ_B3_A0):
	case (OP_ALG_PKMODE_COPY_SSZ_B3_A1):
	case (OP_ALG_PKMODE_COPY_SSZ_B3_A2):
	case (OP_ALG_PKMODE_COPY_SSZ_B3_A3):
	case (OP_ALG_PKMODE_COPY_SSZ_A_E):
	case (OP_ALG_PKMODE_COPY_SSZ_A_N):
	case (OP_ALG_PKMODE_COPY_SSZ_B_E):
	case (OP_ALG_PKMODE_COPY_SSZ_B_N):
	case (OP_ALG_PKMODE_COPY_SSZ_N_A):
	case (OP_ALG_PKMODE_COPY_SSZ_N_B):
	case (OP_ALG_PKMODE_COPY_SSZ_N_E):
		return 0;
	}

	return -EINVAL;
}

static inline int
rta_pkha_operation(struct program *program, uint32_t op_pkha)
{
	uint32_t opcode = CMD_OPERATION | OP_TYPE_PK | OP_ALG_PK;
	uint32_t pkha_func;
	unsigned int start_pc = program->current_pc;
	int ret = -EINVAL;

	pkha_func = op_pkha & OP_ALG_PK_FUN_MASK;

	switch (pkha_func) {
	case (OP_ALG_PKMODE_CLEARMEM):
		ret = __rta_pkha_clearmem(op_pkha);
		if (ret < 0) {
			pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
			       program->current_pc);
			goto err;
		}
		break;
	case (OP_ALG_PKMODE_MOD_ADD):
	case (OP_ALG_PKMODE_MOD_SUB_AB):
	case (OP_ALG_PKMODE_MOD_SUB_BA):
	case (OP_ALG_PKMODE_MOD_MULT):
	case (OP_ALG_PKMODE_MOD_EXPO):
	case (OP_ALG_PKMODE_MOD_REDUCT):
	case (OP_ALG_PKMODE_MOD_INV):
	case (OP_ALG_PKMODE_MOD_MONT_CNST):
	case (OP_ALG_PKMODE_MOD_CRT_CNST):
	case (OP_ALG_PKMODE_MOD_GCD):
	case (OP_ALG_PKMODE_MOD_PRIMALITY):
	case (OP_ALG_PKMODE_MOD_SML_EXP):
	case (OP_ALG_PKMODE_ECC_MOD_ADD):
	case (OP_ALG_PKMODE_ECC_MOD_DBL):
	case (OP_ALG_PKMODE_ECC_MOD_MUL):
		ret = __rta_pkha_mod_arithmetic(op_pkha);
		if (ret < 0) {
			pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
			       program->current_pc);
			goto err;
		}
		break;
	case (OP_ALG_PKMODE_COPY_NSZ):
	case (OP_ALG_PKMODE_COPY_SSZ):
		ret = __rta_pkha_copymem(op_pkha);
		if (ret < 0) {
			pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
			       program->current_pc);
			goto err;
		}
		break;
	default:
		pr_err("Invalid Operation Command\n");
		goto err;
	}

	opcode |= op_pkha;

	__rta_out32(program, opcode);
	program->current_instruction++;
	return (int)start_pc;

 err:
	program->first_error_pc = start_pc;
	program->current_instruction++;
	return ret;
}

#endif /* __RTA_OPERATION_CMD_H__ */
Commit	Line	Data
9f95a23c	1	/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
11fdf7f2 TL	2	*
11fdf7f2 TL	3	* Copyright 2008-2016 Freescale Semiconductor Inc.
9f95a23c	4	* Copyright 2016 NXP
11fdf7f2	5	*
11fdf7f2 TL	6	*/
	7
	8	#ifndef __RTA_OPERATION_CMD_H__
	9	#define __RTA_OPERATION_CMD_H__
	10
9f95a23c TL	11	#if defined(RTE_TOOLCHAIN_GCC) && (GCC_VERSION >= 70000)
	12	#pragma GCC diagnostic ignored "-Wimplicit-fallthrough"
	13	#endif
	14
11fdf7f2 TL	15	extern enum rta_sec_era rta_sec_era;
	16
	17	static inline int
	18	__rta_alg_aai_aes(uint16_t aai)
	19	{
	20	uint16_t aes_mode = aai & OP_ALG_AESA_MODE_MASK;
	21
	22	if (aai & OP_ALG_AAI_C2K) {
	23	if (rta_sec_era < RTA_SEC_ERA_5)
	24	return -1;
	25	if ((aes_mode != OP_ALG_AAI_CCM) &&
	26	(aes_mode != OP_ALG_AAI_GCM))
	27	return -EINVAL;
	28	}
	29
	30	switch (aes_mode) {
	31	case OP_ALG_AAI_CBC_CMAC:
	32	case OP_ALG_AAI_CTR_CMAC_LTE:
	33	case OP_ALG_AAI_CTR_CMAC:
	34	if (rta_sec_era < RTA_SEC_ERA_2)
	35	return -EINVAL;
	36	/* no break */
	37	case OP_ALG_AAI_CTR:
	38	case OP_ALG_AAI_CBC:
	39	case OP_ALG_AAI_ECB:
	40	case OP_ALG_AAI_OFB:
	41	case OP_ALG_AAI_CFB:
	42	case OP_ALG_AAI_XTS:
	43	case OP_ALG_AAI_CMAC:
	44	case OP_ALG_AAI_XCBC_MAC:
	45	case OP_ALG_AAI_CCM:
	46	case OP_ALG_AAI_GCM:
	47	case OP_ALG_AAI_CBC_XCBCMAC:
	48	case OP_ALG_AAI_CTR_XCBCMAC:
	49	return 0;
	50	}
	51
	52	return -EINVAL;
	53	}
	54
	55	static inline int
	56	__rta_alg_aai_des(uint16_t aai)
	57	{
	58	uint16_t aai_code = (uint16_t)(aai & ~OP_ALG_AAI_CHECKODD);
	59
	60	switch (aai_code) {
	61	case OP_ALG_AAI_CBC:
	62	case OP_ALG_AAI_ECB:
	63	case OP_ALG_AAI_CFB:
	64	case OP_ALG_AAI_OFB:
	65	return 0;
	66	}
	67
	68	return -EINVAL;
	69	}
	70
	71	static inline int
	72	__rta_alg_aai_md5(uint16_t aai)
	73	{
	74	switch (aai) {
	75	case OP_ALG_AAI_HMAC:
	76	if (rta_sec_era < RTA_SEC_ERA_2)
	77	return -EINVAL;
	78	/* no break */
79	case OP_ALG_AAI_SMAC:
80	case OP_ALG_AAI_HASH:
81	case OP_ALG_AAI_HMAC_PRECOMP:
82	return 0;
83	}
84
85	return -EINVAL;
86	}
87
88	static inline int
89	__rta_alg_aai_sha(uint16_t aai)
90	{
91	switch (aai) {
92	case OP_ALG_AAI_HMAC:
93	if (rta_sec_era < RTA_SEC_ERA_2)
94	return -EINVAL;
95	/* no break */
96	case OP_ALG_AAI_HASH:
97	case OP_ALG_AAI_HMAC_PRECOMP:
98	return 0;
99	}
100
101	return -EINVAL;
102	}
103
104	static inline int
105	__rta_alg_aai_rng(uint16_t aai)
106	{
107	uint16_t rng_mode = aai & OP_ALG_RNG_MODE_MASK;
108	uint16_t rng_sh = aai & OP_ALG_AAI_RNG4_SH_MASK;
109
110	switch (rng_mode) {
111	case OP_ALG_AAI_RNG:
112	case OP_ALG_AAI_RNG_NZB:
113	case OP_ALG_AAI_RNG_OBP:
114	break;
115	default:
116	return -EINVAL;
117	}
118
119	/* State Handle bits are valid only for SEC Era >= 5 */
120	if ((rta_sec_era < RTA_SEC_ERA_5) && rng_sh)
121	return -EINVAL;
122
123	/* PS, AI, SK bits are also valid only for SEC Era >= 5 */
124	if ((rta_sec_era < RTA_SEC_ERA_5) && (aai &
125	(OP_ALG_AAI_RNG4_PS \| OP_ALG_AAI_RNG4_AI \| OP_ALG_AAI_RNG4_SK)))
126	return -EINVAL;
127
128	switch (rng_sh) {
129	case OP_ALG_AAI_RNG4_SH_0:
130	case OP_ALG_AAI_RNG4_SH_1:
131	return 0;
132	}
133
134	return -EINVAL;
135	}
136
137	static inline int
138	__rta_alg_aai_crc(uint16_t aai)
139	{
140	uint16_t aai_code = aai & OP_ALG_CRC_POLY_MASK;
141
142	switch (aai_code) {
143	case OP_ALG_AAI_802:
144	case OP_ALG_AAI_3385:
145	case OP_ALG_AAI_CUST_POLY:
146	return 0;
147	}
148
149	return -EINVAL;
150	}
151
152	static inline int
153	__rta_alg_aai_kasumi(uint16_t aai)
154	{
155	switch (aai) {
156	case OP_ALG_AAI_GSM:
157	case OP_ALG_AAI_EDGE:
158	case OP_ALG_AAI_F8:
159	case OP_ALG_AAI_F9:
160	return 0;
161	}
162
163	return -EINVAL;
164	}
165
166	static inline int
167	__rta_alg_aai_snow_f9(uint16_t aai)
168	{
169	if (aai == OP_ALG_AAI_F9)
170	return 0;
171
172	return -EINVAL;
173	}
174
175	static inline int
176	__rta_alg_aai_snow_f8(uint16_t aai)
177	{
178	if (aai == OP_ALG_AAI_F8)
179	return 0;
180
181	return -EINVAL;
182	}
183
184	static inline int
185	__rta_alg_aai_zuce(uint16_t aai)
186	{
187	if (aai == OP_ALG_AAI_F8)
188	return 0;
189
190	return -EINVAL;
191	}
192
193	static inline int
194	__rta_alg_aai_zuca(uint16_t aai)
195	{
196	if (aai == OP_ALG_AAI_F9)
197	return 0;
198
199	return -EINVAL;
200	}
201
202	struct alg_aai_map {
203	uint32_t chipher_algo;
204	int (*aai_func)(uint16_t);
205	uint32_t class;
206	};
207
208	static const struct alg_aai_map alg_table[] = {
209	/1/ { OP_ALG_ALGSEL_AES, __rta_alg_aai_aes, OP_TYPE_CLASS1_ALG },
210	{ OP_ALG_ALGSEL_DES, __rta_alg_aai_des, OP_TYPE_CLASS1_ALG },
211	{ OP_ALG_ALGSEL_3DES, __rta_alg_aai_des, OP_TYPE_CLASS1_ALG },
212	{ OP_ALG_ALGSEL_MD5, __rta_alg_aai_md5, OP_TYPE_CLASS2_ALG },
213	{ OP_ALG_ALGSEL_SHA1, __rta_alg_aai_md5, OP_TYPE_CLASS2_ALG },
214	{ OP_ALG_ALGSEL_SHA224, __rta_alg_aai_sha, OP_TYPE_CLASS2_ALG },
215	{ OP_ALG_ALGSEL_SHA256, __rta_alg_aai_sha, OP_TYPE_CLASS2_ALG },
216	{ OP_ALG_ALGSEL_SHA384, __rta_alg_aai_sha, OP_TYPE_CLASS2_ALG },
217	{ OP_ALG_ALGSEL_SHA512, __rta_alg_aai_sha, OP_TYPE_CLASS2_ALG },
218	{ OP_ALG_ALGSEL_RNG, __rta_alg_aai_rng, OP_TYPE_CLASS1_ALG },
219	/11/ { OP_ALG_ALGSEL_CRC, __rta_alg_aai_crc, OP_TYPE_CLASS2_ALG },
220	{ OP_ALG_ALGSEL_ARC4, NULL, OP_TYPE_CLASS1_ALG },
221	{ OP_ALG_ALGSEL_SNOW_F8, __rta_alg_aai_snow_f8, OP_TYPE_CLASS1_ALG },
222	/14/ { OP_ALG_ALGSEL_KASUMI, __rta_alg_aai_kasumi, OP_TYPE_CLASS1_ALG },
223	{ OP_ALG_ALGSEL_SNOW_F9, __rta_alg_aai_snow_f9, OP_TYPE_CLASS2_ALG },
224	{ OP_ALG_ALGSEL_ZUCE, __rta_alg_aai_zuce, OP_TYPE_CLASS1_ALG },
225	/17/ { OP_ALG_ALGSEL_ZUCA, __rta_alg_aai_zuca, OP_TYPE_CLASS2_ALG }
226	};
227
228	/*
229	* Allowed OPERATION algorithms for each SEC Era.
230	* Values represent the number of entries from alg_table[] that are supported.
231	*/
232	static const unsigned int alg_table_sz[] = {14, 15, 15, 15, 17, 17, 11, 17};
233
234	static inline int
235	rta_operation(struct program *program, uint32_t cipher_algo,
236	uint16_t aai, uint8_t algo_state,
237	int icv_checking, int enc)
238	{
239	uint32_t opcode = CMD_OPERATION;
240	unsigned int i, found = 0;
241	unsigned int start_pc = program->current_pc;
242	int ret;
243
244	for (i = 0; i < alg_table_sz[rta_sec_era]; i++) {
245	if (alg_table[i].chipher_algo == cipher_algo) {
246	opcode \|= cipher_algo \| alg_table[i].class;
247	/* nothing else to verify */
248	if (alg_table[i].aai_func == NULL) {
249	found = 1;
250	break;
251	}
252
253	aai &= OP_ALG_AAI_MASK;
254
255	ret = (*alg_table[i].aai_func)(aai);
256	if (ret < 0) {
257	pr_err("OPERATION: Bad AAI Type. SEC Program Line: %d\n",
258	program->current_pc);
259	goto err;
260	}
261	opcode \|= aai;
262	found = 1;
263	break;
264	}
265	}
266	if (!found) {
267	pr_err("OPERATION: Invalid Command. SEC Program Line: %d\n",
268	program->current_pc);
269	ret = -EINVAL;
270	goto err;
271	}
272
273	switch (algo_state) {
274	case OP_ALG_AS_UPDATE:
275	case OP_ALG_AS_INIT:
276	case OP_ALG_AS_FINALIZE:
277	case OP_ALG_AS_INITFINAL:
278	opcode \|= algo_state;
279	break;
280	default:
281	pr_err("Invalid Operation Command\n");
282	ret = -EINVAL;
283	goto err;
284	}
285
286	switch (icv_checking) {
287	case ICV_CHECK_DISABLE:
288	/*
289	* opcode \|= OP_ALG_ICV_OFF;
290	* OP_ALG_ICV_OFF is 0
291	*/
292	break;
293	case ICV_CHECK_ENABLE:
294	opcode \|= OP_ALG_ICV_ON;
295	break;
296	default:
297	pr_err("Invalid Operation Command\n");
298	ret = -EINVAL;
299	goto err;
300	}
301
302	switch (enc) {
303	case DIR_DEC:
304	/*
305	* opcode \|= OP_ALG_DECRYPT;
306	* OP_ALG_DECRYPT is 0
307	*/
308	break;
309	case DIR_ENC:
310	opcode \|= OP_ALG_ENCRYPT;
311	break;
312	default:
313	pr_err("Invalid Operation Command\n");
314	ret = -EINVAL;
315	goto err;
316	}
317
318	__rta_out32(program, opcode);
319	program->current_instruction++;
320	return (int)start_pc;
321
322	err:
323	program->first_error_pc = start_pc;
324	return ret;
325	}
326
327	/*
328	* OPERATION PKHA routines
329	*/
330	static inline int
331	__rta_pkha_clearmem(uint32_t pkha_op)
332	{
333	switch (pkha_op) {
334	case (OP_ALG_PKMODE_CLEARMEM_ALL):
335	case (OP_ALG_PKMODE_CLEARMEM_ABE):
336	case (OP_ALG_PKMODE_CLEARMEM_ABN):
337	case (OP_ALG_PKMODE_CLEARMEM_AB):
338	case (OP_ALG_PKMODE_CLEARMEM_AEN):
339	case (OP_ALG_PKMODE_CLEARMEM_AE):
340	case (OP_ALG_PKMODE_CLEARMEM_AN):
341	case (OP_ALG_PKMODE_CLEARMEM_A):
342	case (OP_ALG_PKMODE_CLEARMEM_BEN):
343	case (OP_ALG_PKMODE_CLEARMEM_BE):
344	case (OP_ALG_PKMODE_CLEARMEM_BN):
345	case (OP_ALG_PKMODE_CLEARMEM_B):
346	case (OP_ALG_PKMODE_CLEARMEM_EN):
347	case (OP_ALG_PKMODE_CLEARMEM_N):
348	case (OP_ALG_PKMODE_CLEARMEM_E):
349	return 0;
350	}
351
352	return -EINVAL;
353	}
354
355	static inline int
356	__rta_pkha_mod_arithmetic(uint32_t pkha_op)
357	{
358	pkha_op &= (uint32_t)~OP_ALG_PKMODE_OUT_A;
359
360	switch (pkha_op) {
361	case (OP_ALG_PKMODE_MOD_ADD):
362	case (OP_ALG_PKMODE_MOD_SUB_AB):
363	case (OP_ALG_PKMODE_MOD_SUB_BA):
364	case (OP_ALG_PKMODE_MOD_MULT):
365	case (OP_ALG_PKMODE_MOD_MULT_IM):
366	case (OP_ALG_PKMODE_MOD_MULT_IM_OM):
367	case (OP_ALG_PKMODE_MOD_EXPO):
368	case (OP_ALG_PKMODE_MOD_EXPO_TEQ):
369	case (OP_ALG_PKMODE_MOD_EXPO_IM):
370	case (OP_ALG_PKMODE_MOD_EXPO_IM_TEQ):
371	case (OP_ALG_PKMODE_MOD_REDUCT):
372	case (OP_ALG_PKMODE_MOD_INV):
373	case (OP_ALG_PKMODE_MOD_MONT_CNST):
374	case (OP_ALG_PKMODE_MOD_CRT_CNST):
375	case (OP_ALG_PKMODE_MOD_GCD):
376	case (OP_ALG_PKMODE_MOD_PRIMALITY):
377	case (OP_ALG_PKMODE_MOD_SML_EXP):
378	case (OP_ALG_PKMODE_F2M_ADD):
379	case (OP_ALG_PKMODE_F2M_MUL):
380	case (OP_ALG_PKMODE_F2M_MUL_IM):
381	case (OP_ALG_PKMODE_F2M_MUL_IM_OM):
382	case (OP_ALG_PKMODE_F2M_EXP):
383	case (OP_ALG_PKMODE_F2M_EXP_TEQ):
384	case (OP_ALG_PKMODE_F2M_AMODN):
385	case (OP_ALG_PKMODE_F2M_INV):
386	case (OP_ALG_PKMODE_F2M_R2):
387	case (OP_ALG_PKMODE_F2M_GCD):
388	case (OP_ALG_PKMODE_F2M_SML_EXP):
389	case (OP_ALG_PKMODE_ECC_F2M_ADD):
390	case (OP_ALG_PKMODE_ECC_F2M_ADD_IM_OM_PROJ):
391	case (OP_ALG_PKMODE_ECC_F2M_DBL):
392	case (OP_ALG_PKMODE_ECC_F2M_DBL_IM_OM_PROJ):
393	case (OP_ALG_PKMODE_ECC_F2M_MUL):
394	case (OP_ALG_PKMODE_ECC_F2M_MUL_TEQ):
395	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2):
396	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_TEQ):
397	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ):
398	case (OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ_TEQ):
399	case (OP_ALG_PKMODE_ECC_MOD_ADD):
400	case (OP_ALG_PKMODE_ECC_MOD_ADD_IM_OM_PROJ):
401	case (OP_ALG_PKMODE_ECC_MOD_DBL):
402	case (OP_ALG_PKMODE_ECC_MOD_DBL_IM_OM_PROJ):
403	case (OP_ALG_PKMODE_ECC_MOD_MUL):
404	case (OP_ALG_PKMODE_ECC_MOD_MUL_TEQ):
405	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2):
406	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_TEQ):
407	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ):
408	case (OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ_TEQ):
409	return 0;
410	}
411
412	return -EINVAL;
413	}
414
415	static inline int
416	__rta_pkha_copymem(uint32_t pkha_op)
417	{
418	switch (pkha_op) {
419	case (OP_ALG_PKMODE_COPY_NSZ_A0_B0):
420	case (OP_ALG_PKMODE_COPY_NSZ_A0_B1):
421	case (OP_ALG_PKMODE_COPY_NSZ_A0_B2):
422	case (OP_ALG_PKMODE_COPY_NSZ_A0_B3):
423	case (OP_ALG_PKMODE_COPY_NSZ_A1_B0):
424	case (OP_ALG_PKMODE_COPY_NSZ_A1_B1):
425	case (OP_ALG_PKMODE_COPY_NSZ_A1_B2):
426	case (OP_ALG_PKMODE_COPY_NSZ_A1_B3):
427	case (OP_ALG_PKMODE_COPY_NSZ_A2_B0):
428	case (OP_ALG_PKMODE_COPY_NSZ_A2_B1):
429	case (OP_ALG_PKMODE_COPY_NSZ_A2_B2):
430	case (OP_ALG_PKMODE_COPY_NSZ_A2_B3):
431	case (OP_ALG_PKMODE_COPY_NSZ_A3_B0):
432	case (OP_ALG_PKMODE_COPY_NSZ_A3_B1):
433	case (OP_ALG_PKMODE_COPY_NSZ_A3_B2):
434	case (OP_ALG_PKMODE_COPY_NSZ_A3_B3):
435	case (OP_ALG_PKMODE_COPY_NSZ_B0_A0):
436	case (OP_ALG_PKMODE_COPY_NSZ_B0_A1):
437	case (OP_ALG_PKMODE_COPY_NSZ_B0_A2):
438	case (OP_ALG_PKMODE_COPY_NSZ_B0_A3):
439	case (OP_ALG_PKMODE_COPY_NSZ_B1_A0):
440	case (OP_ALG_PKMODE_COPY_NSZ_B1_A1):
441	case (OP_ALG_PKMODE_COPY_NSZ_B1_A2):
442	case (OP_ALG_PKMODE_COPY_NSZ_B1_A3):
443	case (OP_ALG_PKMODE_COPY_NSZ_B2_A0):
444	case (OP_ALG_PKMODE_COPY_NSZ_B2_A1):
445	case (OP_ALG_PKMODE_COPY_NSZ_B2_A2):
446	case (OP_ALG_PKMODE_COPY_NSZ_B2_A3):
447	case (OP_ALG_PKMODE_COPY_NSZ_B3_A0):
448	case (OP_ALG_PKMODE_COPY_NSZ_B3_A1):
449	case (OP_ALG_PKMODE_COPY_NSZ_B3_A2):
450	case (OP_ALG_PKMODE_COPY_NSZ_B3_A3):
451	case (OP_ALG_PKMODE_COPY_NSZ_A_E):
452	case (OP_ALG_PKMODE_COPY_NSZ_A_N):
453	case (OP_ALG_PKMODE_COPY_NSZ_B_E):
454	case (OP_ALG_PKMODE_COPY_NSZ_B_N):
455	case (OP_ALG_PKMODE_COPY_NSZ_N_A):
456	case (OP_ALG_PKMODE_COPY_NSZ_N_B):
457	case (OP_ALG_PKMODE_COPY_NSZ_N_E):
458	case (OP_ALG_PKMODE_COPY_SSZ_A0_B0):
459	case (OP_ALG_PKMODE_COPY_SSZ_A0_B1):
460	case (OP_ALG_PKMODE_COPY_SSZ_A0_B2):
461	case (OP_ALG_PKMODE_COPY_SSZ_A0_B3):
462	case (OP_ALG_PKMODE_COPY_SSZ_A1_B0):
463	case (OP_ALG_PKMODE_COPY_SSZ_A1_B1):
464	case (OP_ALG_PKMODE_COPY_SSZ_A1_B2):
465	case (OP_ALG_PKMODE_COPY_SSZ_A1_B3):
466	case (OP_ALG_PKMODE_COPY_SSZ_A2_B0):
467	case (OP_ALG_PKMODE_COPY_SSZ_A2_B1):
468	case (OP_ALG_PKMODE_COPY_SSZ_A2_B2):
469	case (OP_ALG_PKMODE_COPY_SSZ_A2_B3):
470	case (OP_ALG_PKMODE_COPY_SSZ_A3_B0):
471	case (OP_ALG_PKMODE_COPY_SSZ_A3_B1):
472	case (OP_ALG_PKMODE_COPY_SSZ_A3_B2):
473	case (OP_ALG_PKMODE_COPY_SSZ_A3_B3):
474	case (OP_ALG_PKMODE_COPY_SSZ_B0_A0):
475	case (OP_ALG_PKMODE_COPY_SSZ_B0_A1):
476	case (OP_ALG_PKMODE_COPY_SSZ_B0_A2):
477	case (OP_ALG_PKMODE_COPY_SSZ_B0_A3):
478	case (OP_ALG_PKMODE_COPY_SSZ_B1_A0):
479	case (OP_ALG_PKMODE_COPY_SSZ_B1_A1):
480	case (OP_ALG_PKMODE_COPY_SSZ_B1_A2):
481	case (OP_ALG_PKMODE_COPY_SSZ_B1_A3):
482	case (OP_ALG_PKMODE_COPY_SSZ_B2_A0):
483	case (OP_ALG_PKMODE_COPY_SSZ_B2_A1):
484	case (OP_ALG_PKMODE_COPY_SSZ_B2_A2):
485	case (OP_ALG_PKMODE_COPY_SSZ_B2_A3):
486	case (OP_ALG_PKMODE_COPY_SSZ_B3_A0):
487	case (OP_ALG_PKMODE_COPY_SSZ_B3_A1):
488	case (OP_ALG_PKMODE_COPY_SSZ_B3_A2):
489	case (OP_ALG_PKMODE_COPY_SSZ_B3_A3):
490	case (OP_ALG_PKMODE_COPY_SSZ_A_E):
491	case (OP_ALG_PKMODE_COPY_SSZ_A_N):
492	case (OP_ALG_PKMODE_COPY_SSZ_B_E):
493	case (OP_ALG_PKMODE_COPY_SSZ_B_N):
494	case (OP_ALG_PKMODE_COPY_SSZ_N_A):
495	case (OP_ALG_PKMODE_COPY_SSZ_N_B):
496	case (OP_ALG_PKMODE_COPY_SSZ_N_E):
497	return 0;
498	}
499
500	return -EINVAL;
501	}
502
503	static inline int
504	rta_pkha_operation(struct program *program, uint32_t op_pkha)
505	{
506	uint32_t opcode = CMD_OPERATION \| OP_TYPE_PK \| OP_ALG_PK;
507	uint32_t pkha_func;
508	unsigned int start_pc = program->current_pc;
509	int ret = -EINVAL;
510
511	pkha_func = op_pkha & OP_ALG_PK_FUN_MASK;
512
513	switch (pkha_func) {
514	case (OP_ALG_PKMODE_CLEARMEM):
515	ret = __rta_pkha_clearmem(op_pkha);
516	if (ret < 0) {
517	pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
518	program->current_pc);
519	goto err;
520	}
521	break;
522	case (OP_ALG_PKMODE_MOD_ADD):
523	case (OP_ALG_PKMODE_MOD_SUB_AB):
524	case (OP_ALG_PKMODE_MOD_SUB_BA):
525	case (OP_ALG_PKMODE_MOD_MULT):
526	case (OP_ALG_PKMODE_MOD_EXPO):
527	case (OP_ALG_PKMODE_MOD_REDUCT):
528	case (OP_ALG_PKMODE_MOD_INV):
529	case (OP_ALG_PKMODE_MOD_MONT_CNST):
530	case (OP_ALG_PKMODE_MOD_CRT_CNST):
531	case (OP_ALG_PKMODE_MOD_GCD):
532	case (OP_ALG_PKMODE_MOD_PRIMALITY):
533	case (OP_ALG_PKMODE_MOD_SML_EXP):
534	case (OP_ALG_PKMODE_ECC_MOD_ADD):
535	case (OP_ALG_PKMODE_ECC_MOD_DBL):
536	case (OP_ALG_PKMODE_ECC_MOD_MUL):
537	ret = __rta_pkha_mod_arithmetic(op_pkha);
538	if (ret < 0) {
539	pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
540	program->current_pc);
541	goto err;
542	}
543	break;
544	case (OP_ALG_PKMODE_COPY_NSZ):
545	case (OP_ALG_PKMODE_COPY_SSZ):
546	ret = __rta_pkha_copymem(op_pkha);
547	if (ret < 0) {
548	pr_err("OPERATION PKHA: Type not supported. SEC Program Line: %d\n",
549	program->current_pc);
550	goto err;
551	}
552	break;
553	default:
554	pr_err("Invalid Operation Command\n");
555	goto err;
556	}
557
558	opcode \|= op_pkha;
559
560	__rta_out32(program, opcode);
561	program->current_instruction++;
562	return (int)start_pc;
563
564	err:
565	program->first_error_pc = start_pc;
566	program->current_instruction++;
567	return ret;
568	}
569
570	#endif /* __RTA_OPERATION_CMD_H__ */