[ceph.git] / ceph / src / seastar / dpdk / drivers / net / bnx2x / bnx2x_rxtx.h

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright (c) 2013-2015 Brocade Communications Systems, Inc.
 * Copyright (c) 2015-2018 Cavium Inc.
 * All rights reserved.
 * www.cavium.com
 */

#ifndef _BNX2X_RXTX_H_
#define _BNX2X_RXTX_H_

#define DEFAULT_TX_FREE_THRESH   64
#define RTE_PMD_BNX2X_TX_MAX_BURST 1

/**
 * Structure associated with each descriptor of the RX ring of a RX queue.
 */
struct bnx2x_rx_entry {
	struct rte_mbuf     *mbuf;                /**< mbuf associated with RX descriptor. */
};

/**
 * Structure associated with each RX queue.
 */
struct bnx2x_rx_queue {
	struct rte_mempool         *mb_pool;             /**< mbuf pool to populate RX ring. */
	union eth_rx_cqe           *cq_ring;             /**< RCQ ring virtual address. */
	uint64_t                   cq_ring_phys_addr;    /**< RCQ ring DMA address. */
	uint64_t                   *rx_ring;             /**< RX ring virtual address. */
	uint64_t                   rx_ring_phys_addr;    /**< RX ring DMA address. */
	struct rte_mbuf            **sw_ring;            /**< address of RX software ring. */
	struct rte_mbuf            *pkt_first_seg;       /**< First segment of current packet. */
	struct rte_mbuf            *pkt_last_seg;        /**< Last segment of current packet. */
	uint16_t                   nb_cq_pages;          /**< number of RCQ pages. */
	uint16_t                   nb_rx_desc;           /**< number of RX descriptors. */
	uint16_t                   nb_rx_pages;          /**< number of RX pages. */
	uint16_t                   rx_bd_head;           /**< Index of current rx bd. */
	uint16_t                   rx_bd_tail;           /**< Index of last rx bd. */
	uint16_t                   rx_cq_head;           /**< Index of current rcq bd. */
	uint16_t                   rx_cq_tail;           /**< Index of last rcq bd. */
	uint16_t                   queue_id;             /**< RX queue index. */
	uint16_t                   port_id;              /**< Device port identifier. */
	struct bnx2x_softc           *sc;                  /**< Ptr to dev_private data. */
};

/**
 * Structure associated with each TX queue.
 */
struct bnx2x_tx_queue {
	/** TX ring virtual address. */
	union eth_tx_bd_types      *tx_ring;             /**< TX ring virtual address. */
	uint64_t                   tx_ring_phys_addr;    /**< TX ring DMA address. */
	struct rte_mbuf            **sw_ring;            /**< virtual address of SW ring. */
	uint16_t                   tx_pkt_tail;          /**< Index of current tx pkt. */
	uint16_t                   tx_pkt_head;          /**< Index of last pkt counted by txeof. */
	uint16_t                   tx_bd_tail;           /**< Index of current tx bd. */
	uint16_t                   tx_bd_head;           /**< Index of last bd counted by txeof. */
	uint16_t                   nb_tx_desc;           /**< number of TX descriptors. */
	uint16_t                   tx_free_thresh;       /**< minimum TX before freeing. */
	uint16_t                   nb_tx_avail;          /**< Number of TX descriptors available. */
	uint16_t                   nb_tx_pages;          /**< number of TX pages */
	uint16_t                   queue_id;             /**< TX queue index. */
	uint16_t                   port_id;              /**< Device port identifier. */
	struct bnx2x_softc           *sc;                  /**< Ptr to dev_private data */
};

int bnx2x_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
			      uint16_t nb_rx_desc, unsigned int socket_id,
			      const struct rte_eth_rxconf *rx_conf,
			      struct rte_mempool *mb_pool);

int bnx2x_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
			      uint16_t nb_tx_desc, unsigned int socket_id,
			      const struct rte_eth_txconf *tx_conf);

void bnx2x_dev_rx_queue_release(void *rxq);
void bnx2x_dev_tx_queue_release(void *txq);
void bnx2x_dev_rxtx_init(struct rte_eth_dev *dev);
void bnx2x_dev_rxtx_init_dummy(struct rte_eth_dev *dev);
void bnx2x_dev_clear_queues(struct rte_eth_dev *dev);

#endif /* _BNX2X_RXTX_H_ */
Commit	Line	Data
9f95a23c	1	/* SPDX-License-Identifier: BSD-3-Clause
7c673cae	2	* Copyright (c) 2013-2015 Brocade Communications Systems, Inc.
9f95a23c	3	* Copyright (c) 2015-2018 Cavium Inc.
7c673cae	4	* All rights reserved.
9f95a23c	5	* www.cavium.com
7c673cae FG	6	*/
	7
	8	#ifndef _BNX2X_RXTX_H_
	9	#define _BNX2X_RXTX_H_
	10
11fdf7f2	11	#define DEFAULT_TX_FREE_THRESH 64
7c673cae FG	12	#define RTE_PMD_BNX2X_TX_MAX_BURST 1
	13
	14	/**
	15	* Structure associated with each descriptor of the RX ring of a RX queue.
	16	*/
	17	struct bnx2x_rx_entry {
	18	struct rte_mbuf mbuf; /< mbuf associated with RX descriptor. /
	19	};
	20
	21	/**
	22	* Structure associated with each RX queue.
	23	*/
	24	struct bnx2x_rx_queue {
	25	struct rte_mempool mb_pool; /< mbuf pool to populate RX ring. /
	26	union eth_rx_cqe cq_ring; /< RCQ ring virtual address. /
	27	uint64_t cq_ring_phys_addr; /*< RCQ ring DMA address. /
	28	uint64_t rx_ring; /< RX ring virtual address. /
	29	uint64_t rx_ring_phys_addr; /*< RX ring DMA address. /
	30	struct rte_mbuf sw_ring; /< address of RX software ring. */
	31	struct rte_mbuf pkt_first_seg; /< First segment of current packet. /
	32	struct rte_mbuf pkt_last_seg; /< Last segment of current packet. /
	33	uint16_t nb_cq_pages; /*< number of RCQ pages. /
	34	uint16_t nb_rx_desc; /*< number of RX descriptors. /
	35	uint16_t nb_rx_pages; /*< number of RX pages. /
	36	uint16_t rx_bd_head; /*< Index of current rx bd. /
	37	uint16_t rx_bd_tail; /*< Index of last rx bd. /
	38	uint16_t rx_cq_head; /*< Index of current rcq bd. /
	39	uint16_t rx_cq_tail; /*< Index of last rcq bd. /
	40	uint16_t queue_id; /*< RX queue index. /
9f95a23c	41	uint16_t port_id; /*< Device port identifier. /
7c673cae FG	42	struct bnx2x_softc sc; /< Ptr to dev_private data. /
	43	};
	44
	45	/**
	46	* Structure associated with each TX queue.
	47	*/
	48	struct bnx2x_tx_queue {
	49	/** TX ring virtual address. */
	50	union eth_tx_bd_types tx_ring; /< TX ring virtual address. /
	51	uint64_t tx_ring_phys_addr; /*< TX ring DMA address. /
	52	struct rte_mbuf sw_ring; /< virtual address of SW ring. */
	53	uint16_t tx_pkt_tail; /*< Index of current tx pkt. /
	54	uint16_t tx_pkt_head; /*< Index of last pkt counted by txeof. /
	55	uint16_t tx_bd_tail; /*< Index of current tx bd. /
	56	uint16_t tx_bd_head; /*< Index of last bd counted by txeof. /
	57	uint16_t nb_tx_desc; /*< number of TX descriptors. /
	58	uint16_t tx_free_thresh; /*< minimum TX before freeing. /
	59	uint16_t nb_tx_avail; /*< Number of TX descriptors available. /
	60	uint16_t nb_tx_pages; /*< number of TX pages /
	61	uint16_t queue_id; /*< TX queue index. /
9f95a23c	62	uint16_t port_id; /*< Device port identifier. /
7c673cae FG	63	struct bnx2x_softc sc; /< Ptr to dev_private data /
	64	};
	65
	66	int bnx2x_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
	67	uint16_t nb_rx_desc, unsigned int socket_id,
	68	const struct rte_eth_rxconf *rx_conf,
	69	struct rte_mempool *mb_pool);
	70
	71	int bnx2x_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
	72	uint16_t nb_tx_desc, unsigned int socket_id,
	73	const struct rte_eth_txconf *tx_conf);
	74
	75	void bnx2x_dev_rx_queue_release(void *rxq);
	76	void bnx2x_dev_tx_queue_release(void *txq);
9f95a23c TL	77	void bnx2x_dev_rxtx_init(struct rte_eth_dev *dev);
9f95a23c TL	78	void bnx2x_dev_rxtx_init_dummy(struct rte_eth_dev *dev);
7c673cae FG	79	void bnx2x_dev_clear_queues(struct rte_eth_dev *dev);
	80
	81	#endif /* _BNX2X_RXTX_H_ */