[ceph.git] / ceph / src / seastar / dpdk / drivers / net / ixgbe / base / ixgbe_common.h

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2001-2018
 */

#ifndef _IXGBE_COMMON_H_
#define _IXGBE_COMMON_H_

#include "ixgbe_type.h"
#define IXGBE_WRITE_REG64(hw, reg, value) \
	do { \
		IXGBE_WRITE_REG(hw, reg, (u32) value); \
		IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
	} while (0)
#define IXGBE_REMOVED(a) (0)
struct ixgbe_pba {
	u16 word[2];
	u16 *pba_block;
};

void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
				  u32 pba_num_size);
s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
		       u32 eeprom_buf_size, u16 max_pba_block_size,
		       struct ixgbe_pba *pba);
s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
			u32 eeprom_buf_size, struct ixgbe_pba *pba);
s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
			     u32 eeprom_buf_size, u16 *pba_block_size);
s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);

s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
					       u16 words, u16 *data);
s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
				   u16 words, u16 *data);
s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
				    u16 words, u16 *data);
s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
				       u16 *data);
s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
					      u16 words, u16 *data);
s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
					   u16 *checksum_val);
s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
			  u32 enable_addr);
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
				      u32 mc_addr_count,
				      ixgbe_mc_addr_itr func, bool clear);
s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
				      u32 addr_count, ixgbe_mc_addr_itr func);
s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);

s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);

s32 ixgbe_validate_mac_addr(u8 *mac_addr);
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);

s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
			 u32 vind, bool vlan_on, bool vlvf_bypass);
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
			   bool vlan_on, u32 *vfta_delta, u32 vfta,
			   bool vlvf_bypass);
s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);

s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
			       ixgbe_link_speed *speed,
			       bool *link_up, bool link_up_wait_to_complete);

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
				 u16 *wwpn_prefix);

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
			     int strategy);
void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
				 u8 build, u8 ver, u16 len, const char *str);
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
				 u32 length, u32 timeout, bool return_data);
s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *);
s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,
			  u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);

extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
bool ixgbe_mng_present(struct ixgbe_hw *hw);
bool ixgbe_mng_enabled(struct ixgbe_hw *hw);

#define IXGBE_I2C_THERMAL_SENSOR_ADDR	0xF8
#define IXGBE_EMC_INTERNAL_DATA		0x00
#define IXGBE_EMC_INTERNAL_THERM_LIMIT	0x20
#define IXGBE_EMC_DIODE1_DATA		0x01
#define IXGBE_EMC_DIODE1_THERM_LIMIT	0x19
#define IXGBE_EMC_DIODE2_DATA		0x23
#define IXGBE_EMC_DIODE2_THERM_LIMIT	0x1A
#define IXGBE_EMC_DIODE3_DATA		0x2A
#define IXGBE_EMC_DIODE3_THERM_LIMIT	0x30

s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);

void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
				struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_orom_version(struct ixgbe_hw *hw,
			    struct ixgbe_nvm_version *nvm_ver);
void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
					  ixgbe_link_speed speed,
					  bool autoneg_wait_to_complete);
void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
				      ixgbe_link_speed speed);
#endif /* IXGBE_COMMON */
Commit	Line	Data
9f95a23c TL	1	/* SPDX-License-Identifier: BSD-3-Clause
	2	* Copyright(c) 2001-2018
	3	*/
7c673cae FG	4
	5	#ifndef _IXGBE_COMMON_H_
	6	#define _IXGBE_COMMON_H_
	7
	8	#include "ixgbe_type.h"
	9	#define IXGBE_WRITE_REG64(hw, reg, value) \
	10	do { \
	11	IXGBE_WRITE_REG(hw, reg, (u32) value); \
	12	IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
	13	} while (0)
	14	#define IXGBE_REMOVED(a) (0)
	15	struct ixgbe_pba {
	16	u16 word[2];
	17	u16 *pba_block;
	18	};
	19
	20	void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw hw, u8 map);
	21
	22	u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
	23	s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
	24	s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
	25	s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
	26	s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
	27	s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
	28	s32 ixgbe_read_pba_num_generic(struct ixgbe_hw hw, u32 pba_num);
	29	s32 ixgbe_read_pba_string_generic(struct ixgbe_hw hw, u8 pba_num,
	30	u32 pba_num_size);
	31	s32 ixgbe_read_pba_raw(struct ixgbe_hw hw, u16 eeprom_buf,
	32	u32 eeprom_buf_size, u16 max_pba_block_size,
	33	struct ixgbe_pba *pba);
	34	s32 ixgbe_write_pba_raw(struct ixgbe_hw hw, u16 eeprom_buf,
	35	u32 eeprom_buf_size, struct ixgbe_pba *pba);
	36	s32 ixgbe_get_pba_block_size(struct ixgbe_hw hw, u16 eeprom_buf,
	37	u32 eeprom_buf_size, u16 *pba_block_size);
	38	s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw hw, u8 mac_addr);
	39	s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
	40	void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
	41	void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
	42	s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
	43
	44	s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
	45	s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
11fdf7f2	46	s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
7c673cae FG	47
	48	s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
	49	s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
	50	s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
	51	u16 words, u16 *data);
	52	s32 ixgbe_read_eerd_generic(struct ixgbe_hw hw, u16 offset, u16 data);
	53	s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
	54	u16 words, u16 *data);
	55	s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
	56	s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
	57	u16 words, u16 *data);
	58	s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
	59	u16 *data);
	60	s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
	61	u16 words, u16 *data);
	62	s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
	63	s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
	64	u16 *checksum_val);
	65	s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
	66	s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
	67
	68	s32 ixgbe_set_rar_generic(struct ixgbe_hw hw, u32 index, u8 addr, u32 vmdq,
	69	u32 enable_addr);
	70	s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
	71	s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
	72	s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw hw, u8 mc_addr_list,
	73	u32 mc_addr_count,
	74	ixgbe_mc_addr_itr func, bool clear);
	75	s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw hw, u8 addr_list,
	76	u32 addr_count, ixgbe_mc_addr_itr func);
	77	s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
	78	s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
	79	s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
	80	s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
	81	s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
	82
	83	s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
	84	bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
	85	void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
	86	s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
	87
	88	s32 ixgbe_validate_mac_addr(u8 *mac_addr);
	89	s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
	90	void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
	91	s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
	92
	93	s32 prot_autoc_read_generic(struct ixgbe_hw hw, bool , u32 *reg_val);
	94	s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
	95
	96	s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
	97	s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
	98
	99	s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw hw, u8 san_mac_addr);
	100	s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw hw, u8 san_mac_addr);
	101
	102	s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
	103	s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
	104	s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
	105	s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw hw, u8 addr, u32 vmdq);
	106	s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
	107	s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
	108	u32 vind, bool vlan_on, bool vlvf_bypass);
	109	s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
	110	bool vlan_on, u32 *vfta_delta, u32 vfta,
111	bool vlvf_bypass);
112	s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
113	s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
114
115	s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
116	ixgbe_link_speed *speed,
117	bool *link_up, bool link_up_wait_to_complete);
118
119	s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw hw, u16 wwnn_prefix,
120	u16 *wwpn_prefix);
121
122	s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw hw, u16 bs);
123	void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
124	void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
125	s32 ixgbe_get_device_caps_generic(struct ixgbe_hw hw, u16 device_caps);
126	void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
127	int strategy);
128	void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
129	s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
11fdf7f2	130	u8 build, u8 ver, u16 len, const char *str);
7c673cae FG	131	u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
	132	s32 ixgbe_host_interface_command(struct ixgbe_hw hw, u32 buffer,
	133	u32 length, u32 timeout, bool return_data);
	134	s32 ixgbe_hic_unlocked(struct ixgbe_hw , u32 buffer, u32 length, u32 timeout);
11fdf7f2 TL	135	s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *);
	136	s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,
	137	u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
7c673cae FG	138	void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
	139
	140	extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
	141	extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
	142	bool ixgbe_mng_present(struct ixgbe_hw *hw);
	143	bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
	144
	145	#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
	146	#define IXGBE_EMC_INTERNAL_DATA 0x00
	147	#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
	148	#define IXGBE_EMC_DIODE1_DATA 0x01
	149	#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19
	150	#define IXGBE_EMC_DIODE2_DATA 0x23
	151	#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A
	152	#define IXGBE_EMC_DIODE3_DATA 0x2A
	153	#define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30
	154
	155	s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
	156	s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
9f95a23c TL	157
	158	void ixgbe_get_etk_id(struct ixgbe_hw hw, struct ixgbe_nvm_version nvm_ver);
	159	void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
	160	struct ixgbe_nvm_version *nvm_ver);
	161	void ixgbe_get_orom_version(struct ixgbe_hw *hw,
	162	struct ixgbe_nvm_version *nvm_ver);
7c673cae FG	163	void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
	164	void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
	165	s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
	166	ixgbe_link_speed speed,
	167	bool autoneg_wait_to_complete);
	168	void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
	169	ixgbe_link_speed speed);
	170	#endif /* IXGBE_COMMON */