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1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
4 | Copyright(c) 1999 - 2012 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "LICENSE.GPL". | |
21 | ||
22 | Contact Information: | |
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | ||
26 | *******************************************************************************/ | |
27 | ||
28 | #ifndef _IXGBE_COMMON_H_ | |
29 | #define _IXGBE_COMMON_H_ | |
30 | ||
31 | #include "ixgbe_type.h" | |
32 | ||
33 | u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); | |
34 | ||
35 | s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); | |
36 | s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); | |
37 | s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); | |
38 | s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); | |
39 | s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); | |
40 | s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, | |
41 | u32 pba_num_size); | |
42 | s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); | |
43 | s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); | |
44 | void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); | |
45 | s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); | |
46 | ||
47 | s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); | |
48 | s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); | |
49 | ||
50 | s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); | |
51 | s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); | |
52 | s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | |
53 | u16 words, u16 *data); | |
54 | s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); | |
55 | s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, | |
56 | u16 words, u16 *data); | |
57 | s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); | |
58 | s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, | |
59 | u16 words, u16 *data); | |
60 | s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | |
61 | u16 *data); | |
62 | s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, | |
63 | u16 words, u16 *data); | |
64 | u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); | |
65 | s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, | |
66 | u16 *checksum_val); | |
67 | s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); | |
68 | s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); | |
69 | ||
70 | s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, | |
71 | u32 enable_addr); | |
72 | s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); | |
73 | s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); | |
74 | s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, | |
75 | u32 mc_addr_count, | |
76 | ixgbe_mc_addr_itr func, bool clear); | |
77 | s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, | |
78 | u32 addr_count, ixgbe_mc_addr_itr func); | |
79 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); | |
80 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); | |
81 | s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); | |
82 | s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); | |
83 | s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); | |
84 | ||
85 | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); | |
86 | void ixgbe_fc_autoneg(struct ixgbe_hw *hw); | |
87 | ||
88 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); | |
89 | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); | |
90 | void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask); | |
91 | s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); | |
92 | ||
93 | s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); | |
94 | s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); | |
95 | ||
96 | s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); | |
97 | s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); | |
98 | ||
99 | s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | |
100 | s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); | |
101 | s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); | |
102 | s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); | |
103 | s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); | |
104 | s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, | |
105 | u32 vind, bool vlan_on); | |
106 | s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
107 | bool vlan_on, bool *vfta_changed); | |
108 | s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); | |
109 | s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan); | |
110 | ||
111 | s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, | |
112 | ixgbe_link_speed *speed, | |
113 | bool *link_up, bool link_up_wait_to_complete); | |
114 | ||
115 | s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, | |
116 | u16 *wwpn_prefix); | |
117 | ||
118 | s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); | |
119 | void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf); | |
120 | void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); | |
121 | s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); | |
122 | void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, | |
123 | int strategy); | |
124 | s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, | |
125 | u8 build, u8 ver); | |
126 | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); | |
127 | ||
128 | #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 | |
129 | #define IXGBE_EMC_INTERNAL_DATA 0x00 | |
130 | #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 | |
131 | #define IXGBE_EMC_DIODE1_DATA 0x01 | |
132 | #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 | |
133 | #define IXGBE_EMC_DIODE2_DATA 0x23 | |
134 | #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A | |
135 | #define IXGBE_EMC_DIODE3_DATA 0x2A | |
136 | #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 | |
137 | ||
138 | s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); | |
139 | s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); | |
140 | #endif /* IXGBE_COMMON */ |