[ceph.git] / ceph / src / spdk / dpdk / app / test-eventdev / evt_common.h

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2017 Cavium, Inc
 */

#ifndef _EVT_COMMON_
#define _EVT_COMMON_

#include <rte_common.h>
#include <rte_debug.h>
#include <rte_eventdev.h>
#include <rte_service.h>

#define CLNRM  "\x1b[0m"
#define CLRED  "\x1b[31m"
#define CLGRN  "\x1b[32m"
#define CLYEL  "\x1b[33m"

#define evt_err(fmt, args...) \
	fprintf(stderr, CLRED"error: %s() "fmt CLNRM "\n", __func__, ## args)

#define evt_info(fmt, args...) \
	fprintf(stdout, CLYEL""fmt CLNRM "\n", ## args)

#define EVT_STR_FMT 20

#define evt_dump(str, fmt, val...) \
	printf("\t%-*s : "fmt"\n", EVT_STR_FMT, str, ## val)

#define evt_dump_begin(str) printf("\t%-*s : {", EVT_STR_FMT, str)

#define evt_dump_end printf("\b}\n")

#define EVT_MAX_STAGES           64
#define EVT_MAX_PORTS            256
#define EVT_MAX_QUEUES           256

enum evt_prod_type {
	EVT_PROD_TYPE_NONE,
	EVT_PROD_TYPE_SYNT,          /* Producer type Synthetic i.e. CPU. */
	EVT_PROD_TYPE_ETH_RX_ADPTR,  /* Producer type Eth Rx Adapter. */
	EVT_PROD_TYPE_EVENT_TIMER_ADPTR,  /* Producer type Timer Adapter. */
	EVT_PROD_TYPE_MAX,
};

struct evt_options {
#define EVT_TEST_NAME_MAX_LEN     32
	char test_name[EVT_TEST_NAME_MAX_LEN];
	bool plcores[RTE_MAX_LCORE];
	bool wlcores[RTE_MAX_LCORE];
	int pool_sz;
	int socket_id;
	int nb_stages;
	int verbose_level;
	uint8_t dev_id;
	uint8_t timdev_cnt;
	uint8_t nb_timer_adptrs;
	uint8_t timdev_use_burst;
	uint8_t sched_type_list[EVT_MAX_STAGES];
	uint16_t mbuf_sz;
	uint16_t wkr_deq_dep;
	uint32_t nb_flows;
	uint32_t tx_first;
	uint32_t max_pkt_sz;
	uint32_t deq_tmo_nsec;
	uint32_t q_priority:1;
	uint32_t fwd_latency:1;
	uint64_t nb_pkts;
	uint64_t nb_timers;
	uint64_t expiry_nsec;
	uint64_t max_tmo_nsec;
	uint64_t timer_tick_nsec;
	uint64_t optm_timer_tick_nsec;
	enum evt_prod_type prod_type;
};

static inline bool
evt_has_distributed_sched(uint8_t dev_id)
{
	struct rte_event_dev_info dev_info;

	rte_event_dev_info_get(dev_id, &dev_info);
	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED) ?
			true : false;
}

static inline bool
evt_has_burst_mode(uint8_t dev_id)
{
	struct rte_event_dev_info dev_info;

	rte_event_dev_info_get(dev_id, &dev_info);
	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE) ?
			true : false;
}


static inline bool
evt_has_all_types_queue(uint8_t dev_id)
{
	struct rte_event_dev_info dev_info;

	rte_event_dev_info_get(dev_id, &dev_info);
	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES) ?
			true : false;
}

static inline int
evt_service_setup(uint32_t service_id)
{
	int32_t core_cnt;
	unsigned int lcore = 0;
	uint32_t core_array[RTE_MAX_LCORE];
	uint8_t cnt;
	uint8_t min_cnt = UINT8_MAX;

	if (!rte_service_lcore_count())
		return -ENOENT;

	core_cnt = rte_service_lcore_list(core_array,
			RTE_MAX_LCORE);
	if (core_cnt < 0)
		return -ENOENT;
	/* Get the core which has least number of services running. */
	while (core_cnt--) {
		/* Reset default mapping */
		rte_service_map_lcore_set(service_id,
				core_array[core_cnt], 0);
		cnt = rte_service_lcore_count_services(
				core_array[core_cnt]);
		if (cnt < min_cnt) {
			lcore = core_array[core_cnt];
			min_cnt = cnt;
		}
	}
	if (rte_service_map_lcore_set(service_id, lcore, 1))
		return -ENOENT;

	return 0;
}

static inline int
evt_configure_eventdev(struct evt_options *opt, uint8_t nb_queues,
		uint8_t nb_ports)
{
	struct rte_event_dev_info info;
	int ret;

	memset(&info, 0, sizeof(struct rte_event_dev_info));
	ret = rte_event_dev_info_get(opt->dev_id, &info);
	if (ret) {
		evt_err("failed to get eventdev info %d", opt->dev_id);
		return ret;
	}

	if (opt->deq_tmo_nsec) {
		if (opt->deq_tmo_nsec < info.min_dequeue_timeout_ns) {
			opt->deq_tmo_nsec = info.min_dequeue_timeout_ns;
			evt_info("dequeue_timeout_ns too low, using %d",
					opt->deq_tmo_nsec);
		}
		if (opt->deq_tmo_nsec > info.max_dequeue_timeout_ns) {
			opt->deq_tmo_nsec = info.max_dequeue_timeout_ns;
			evt_info("dequeue_timeout_ns too high, using %d",
					opt->deq_tmo_nsec);
		}
	}

	const struct rte_event_dev_config config = {
			.dequeue_timeout_ns = opt->deq_tmo_nsec,
			.nb_event_queues = nb_queues,
			.nb_event_ports = nb_ports,
			.nb_events_limit  = info.max_num_events,
			.nb_event_queue_flows = opt->nb_flows,
			.nb_event_port_dequeue_depth =
				info.max_event_port_dequeue_depth,
			.nb_event_port_enqueue_depth =
				info.max_event_port_enqueue_depth,
	};

	return rte_event_dev_configure(opt->dev_id, &config);
}

#endif /*  _EVT_COMMON_*/
Commit	Line	Data
11fdf7f2 TL	1	/* SPDX-License-Identifier: BSD-3-Clause
	2	* Copyright(c) 2017 Cavium, Inc
	3	*/
	4
	5	#ifndef _EVT_COMMON_
	6	#define _EVT_COMMON_
	7
	8	#include <rte_common.h>
	9	#include <rte_debug.h>
	10	#include <rte_eventdev.h>
	11	#include <rte_service.h>
	12
	13	#define CLNRM "\x1b[0m"
	14	#define CLRED "\x1b[31m"
	15	#define CLGRN "\x1b[32m"
	16	#define CLYEL "\x1b[33m"
	17
	18	#define evt_err(fmt, args...) \
	19	fprintf(stderr, CLRED"error: %s() "fmt CLNRM "\n", __func__, ## args)
	20
	21	#define evt_info(fmt, args...) \
	22	fprintf(stdout, CLYEL""fmt CLNRM "\n", ## args)
	23
	24	#define EVT_STR_FMT 20
	25
	26	#define evt_dump(str, fmt, val...) \
	27	printf("\t%-*s : "fmt"\n", EVT_STR_FMT, str, ## val)
	28
	29	#define evt_dump_begin(str) printf("\t%-*s : {", EVT_STR_FMT, str)
	30
	31	#define evt_dump_end printf("\b}\n")
	32
	33	#define EVT_MAX_STAGES 64
	34	#define EVT_MAX_PORTS 256
	35	#define EVT_MAX_QUEUES 256
	36
9f95a23c TL	37	enum evt_prod_type {
	38	EVT_PROD_TYPE_NONE,
	39	EVT_PROD_TYPE_SYNT, /* Producer type Synthetic i.e. CPU. */
	40	EVT_PROD_TYPE_ETH_RX_ADPTR, /* Producer type Eth Rx Adapter. */
	41	EVT_PROD_TYPE_EVENT_TIMER_ADPTR, /* Producer type Timer Adapter. */
	42	EVT_PROD_TYPE_MAX,
	43	};
	44
	45	struct evt_options {
	46	#define EVT_TEST_NAME_MAX_LEN 32
	47	char test_name[EVT_TEST_NAME_MAX_LEN];
	48	bool plcores[RTE_MAX_LCORE];
	49	bool wlcores[RTE_MAX_LCORE];
9f95a23c	50	int pool_sz;
f67539c2	51	int socket_id;
9f95a23c TL	52	int nb_stages;
9f95a23c TL	53	int verbose_level;
f67539c2 TL	54	uint8_t dev_id;
f67539c2 TL	55	uint8_t timdev_cnt;
9f95a23c	56	uint8_t nb_timer_adptrs;
f67539c2 TL	57	uint8_t timdev_use_burst;
	58	uint8_t sched_type_list[EVT_MAX_STAGES];
	59	uint16_t mbuf_sz;
9f95a23c	60	uint16_t wkr_deq_dep;
f67539c2	61	uint32_t nb_flows;
9f95a23c	62	uint32_t tx_first;
f67539c2	63	uint32_t max_pkt_sz;
9f95a23c	64	uint32_t deq_tmo_nsec;
f67539c2 TL	65	uint32_t q_priority:1;
	66	uint32_t fwd_latency:1;
	67	uint64_t nb_pkts;
	68	uint64_t nb_timers;
	69	uint64_t expiry_nsec;
	70	uint64_t max_tmo_nsec;
	71	uint64_t timer_tick_nsec;
	72	uint64_t optm_timer_tick_nsec;
9f95a23c	73	enum evt_prod_type prod_type;
9f95a23c TL	74	};
9f95a23c TL	75
11fdf7f2 TL	76	static inline bool
	77	evt_has_distributed_sched(uint8_t dev_id)
	78	{
	79	struct rte_event_dev_info dev_info;
	80
	81	rte_event_dev_info_get(dev_id, &dev_info);
	82	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED) ?
	83	true : false;
	84	}
	85
	86	static inline bool
	87	evt_has_burst_mode(uint8_t dev_id)
	88	{
	89	struct rte_event_dev_info dev_info;
	90
	91	rte_event_dev_info_get(dev_id, &dev_info);
	92	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_BURST_MODE) ?
	93	true : false;
	94	}
	95
	96
	97	static inline bool
	98	evt_has_all_types_queue(uint8_t dev_id)
	99	{
	100	struct rte_event_dev_info dev_info;
	101
	102	rte_event_dev_info_get(dev_id, &dev_info);
	103	return (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES) ?
	104	true : false;
	105	}
	106
	107	static inline int
	108	evt_service_setup(uint32_t service_id)
	109	{
	110	int32_t core_cnt;
	111	unsigned int lcore = 0;
	112	uint32_t core_array[RTE_MAX_LCORE];
	113	uint8_t cnt;
	114	uint8_t min_cnt = UINT8_MAX;
	115
	116	if (!rte_service_lcore_count())
	117	return -ENOENT;
	118
	119	core_cnt = rte_service_lcore_list(core_array,
	120	RTE_MAX_LCORE);
	121	if (core_cnt < 0)
	122	return -ENOENT;
	123	/* Get the core which has least number of services running. */
	124	while (core_cnt--) {
	125	/* Reset default mapping */
	126	rte_service_map_lcore_set(service_id,
	127	core_array[core_cnt], 0);
	128	cnt = rte_service_lcore_count_services(
	129	core_array[core_cnt]);
	130	if (cnt < min_cnt) {
	131	lcore = core_array[core_cnt];
	132	min_cnt = cnt;
	133	}
	134	}
	135	if (rte_service_map_lcore_set(service_id, lcore, 1))
	136	return -ENOENT;
	137
	138	return 0;
	139	}
140
9f95a23c TL	141	static inline int
	142	evt_configure_eventdev(struct evt_options *opt, uint8_t nb_queues,
	143	uint8_t nb_ports)
	144	{
	145	struct rte_event_dev_info info;
	146	int ret;
	147
	148	memset(&info, 0, sizeof(struct rte_event_dev_info));
	149	ret = rte_event_dev_info_get(opt->dev_id, &info);
	150	if (ret) {
	151	evt_err("failed to get eventdev info %d", opt->dev_id);
	152	return ret;
	153	}
	154
	155	if (opt->deq_tmo_nsec) {
	156	if (opt->deq_tmo_nsec < info.min_dequeue_timeout_ns) {
	157	opt->deq_tmo_nsec = info.min_dequeue_timeout_ns;
	158	evt_info("dequeue_timeout_ns too low, using %d",
	159	opt->deq_tmo_nsec);
	160	}
	161	if (opt->deq_tmo_nsec > info.max_dequeue_timeout_ns) {
	162	opt->deq_tmo_nsec = info.max_dequeue_timeout_ns;
	163	evt_info("dequeue_timeout_ns too high, using %d",
	164	opt->deq_tmo_nsec);
	165	}
	166	}
	167
	168	const struct rte_event_dev_config config = {
	169	.dequeue_timeout_ns = opt->deq_tmo_nsec,
	170	.nb_event_queues = nb_queues,
	171	.nb_event_ports = nb_ports,
	172	.nb_events_limit = info.max_num_events,
	173	.nb_event_queue_flows = opt->nb_flows,
	174	.nb_event_port_dequeue_depth =
	175	info.max_event_port_dequeue_depth,
	176	.nb_event_port_enqueue_depth =
	177	info.max_event_port_enqueue_depth,
	178	};
	179
	180	return rte_event_dev_configure(opt->dev_id, &config);
	181	}
	182
11fdf7f2	183	#endif /* _EVT_COMMON_*/