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[ceph.git] / ceph / src / spdk / dpdk / app / test-pmd / testpmd.h
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11fdf7f2
TL		 1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
7c673cae
FG		 3 */
4
5#ifndef _TESTPMD_H_
6#define _TESTPMD_H_
7
9f95a23c
TL		 8#include <stdbool.h>
9
11fdf7f2
TL		 10#include <rte_pci.h>
11#include <rte_bus_pci.h>
12#include <rte_gro.h>
13#include <rte_gso.h>
f67539c2 14#include <cmdline.h>
11fdf7f2 15
7c673cae
FG		 16#define RTE_PORT_ALL (~(portid_t)0x0)
17
18#define RTE_TEST_RX_DESC_MAX 2048
19#define RTE_TEST_TX_DESC_MAX 2048
20
21#define RTE_PORT_STOPPED (uint16_t)0
22#define RTE_PORT_STARTED (uint16_t)1
23#define RTE_PORT_CLOSED (uint16_t)2
24#define RTE_PORT_HANDLING (uint16_t)3
25
26/*
27 * It is used to allocate the memory for hash key.
28 * The hash key size is NIC dependent.
29 */
30#define RSS_HASH_KEY_LENGTH 64
31
32/*
33 * Default size of the mbuf data buffer to receive standard 1518-byte
34 * Ethernet frames in a mono-segment memory buffer.
35 */
36#define DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE
37/**< Default size of mbuf data buffer. */
38
39/*
40 * The maximum number of segments per packet is used when creating
41 * scattered transmit packets composed of a list of mbufs.
42 */
43#define RTE_MAX_SEGS_PER_PKT 255 /**< nb_segs is a 8-bit unsigned char. */
44
45#define MAX_PKT_BURST 512
46#define DEF_PKT_BURST 32
47
48#define DEF_MBUF_CACHE 250
49
50#define RTE_CACHE_LINE_SIZE_ROUNDUP(size) \
51 (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
52
53#define NUMA_NO_CONFIG 0xFF
54#define UMA_NO_CONFIG 0xFF
55
56typedef uint8_t lcoreid_t;
11fdf7f2 57typedef uint16_t portid_t;
7c673cae
FG		 58typedef uint16_t queueid_t;
59typedef uint16_t streamid_t;
60
11fdf7f2
TL		 61#if defined RTE_LIBRTE_PMD_SOFTNIC
62#define SOFTNIC 1
63#else
64#define SOFTNIC 0
65#endif
66
7c673cae
FG		 67enum {
68 PORT_TOPOLOGY_PAIRED,
69 PORT_TOPOLOGY_CHAINED,
70 PORT_TOPOLOGY_LOOP,
71};
72
9f95a23c
TL		 73enum {
74 MP_ALLOC_NATIVE, /**< allocate and populate mempool natively */
75 MP_ALLOC_ANON,
76 /**< allocate mempool natively, but populate using anonymous memory */
77 MP_ALLOC_XMEM,
78 /**< allocate and populate mempool using anonymous memory */
f67539c2 79 MP_ALLOC_XMEM_HUGE,
9f95a23c 80 /**< allocate and populate mempool using anonymous hugepage memory */
f67539c2
TL		 81 MP_ALLOC_XBUF
82 /**< allocate mempool natively, use rte_pktmbuf_pool_create_extbuf */
9f95a23c
TL		 83};
84
7c673cae
FG		 85#ifdef RTE_TEST_PMD_RECORD_BURST_STATS
86/**
87 * The data structure associated with RX and TX packet burst statistics
88 * that are recorded for each forwarding stream.
89 */
90struct pkt_burst_stats {
91 unsigned int pkt_burst_spread[MAX_PKT_BURST];
92};
93#endif
94
11fdf7f2
TL		 95/** Information for a given RSS type. */
96struct rss_type_info {
97 const char *str; /**< Type name. */
98 uint64_t rss_type; /**< Type value. */
99};
100
101/**
102 * RSS type information table.
103 *
104 * An entry with a NULL type name terminates the list.
105 */
106extern const struct rss_type_info rss_type_table[];
107
f67539c2
TL		 108/**
109 * Dynf name array.
110 *
111 * Array that holds the name for each dynf.
112 */
113extern char dynf_names[64][RTE_MBUF_DYN_NAMESIZE];
114
7c673cae
FG		 115/**
116 * The data structure associated with a forwarding stream between a receive
117 * port/queue and a transmit port/queue.
118 */
119struct fwd_stream {
120 /* "read-only" data */
121 portid_t rx_port; /**< port to poll for received packets */
122 queueid_t rx_queue; /**< RX queue to poll on "rx_port" */
123 portid_t tx_port; /**< forwarding port of received packets */
124 queueid_t tx_queue; /**< TX queue to send forwarded packets */
125 streamid_t peer_addr; /**< index of peer ethernet address of packets */
126
127 unsigned int retry_enabled;
128
129 /* "read-write" results */
9f95a23c
TL		 130 uint64_t rx_packets; /**< received packets */
131 uint64_t tx_packets; /**< received packets transmitted */
132 uint64_t fwd_dropped; /**< received packets not forwarded */
133 uint64_t rx_bad_ip_csum ; /**< received packets has bad ip checksum */
134 uint64_t rx_bad_l4_csum ; /**< received packets has bad l4 checksum */
135 uint64_t rx_bad_outer_l4_csum;
136 /**< received packets has bad outer l4 checksum */
11fdf7f2 137 unsigned int gro_times; /**< GRO operation times */
7c673cae
FG		 138#ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES
139 uint64_t core_cycles; /**< used for RX and TX processing */
140#endif
141#ifdef RTE_TEST_PMD_RECORD_BURST_STATS
142 struct pkt_burst_stats rx_burst_stats;
143 struct pkt_burst_stats tx_burst_stats;
144#endif
145};
146
11fdf7f2
TL		 147/** Descriptor for a single flow. */
148struct port_flow {
11fdf7f2
TL		 149 struct port_flow *next; /**< Next flow in list. */
150 struct port_flow *tmp; /**< Temporary linking. */
151 uint32_t id; /**< Flow rule ID. */
152 struct rte_flow *flow; /**< Opaque flow object returned by PMD. */
9f95a23c
TL		 153 struct rte_flow_conv_rule rule; /* Saved flow rule description. */
154 uint8_t data[]; /**< Storage for flow rule description */
11fdf7f2
TL		 155};
156
157#ifdef SOFTNIC
158/**
159 * The data structure associate with softnic port
160 */
161struct softnic_port {
162 uint32_t default_tm_hierarchy_enable; /**< default tm hierarchy */
163 struct fwd_lcore **fwd_lcore_arg; /**< softnic fwd core parameters */
164};
165#endif
7c673cae
FG		 166
167/**
168 * The data structure associated with each port.
169 */
170struct rte_port {
7c673cae
FG		 171 struct rte_eth_dev_info dev_info; /**< PCI info + driver name */
172 struct rte_eth_conf dev_conf; /**< Port configuration. */
f67539c2 173 struct rte_ether_addr eth_addr; /**< Port ethernet address */
7c673cae 174 struct rte_eth_stats stats; /**< Last port statistics */
7c673cae 175 unsigned int socket_id; /**< For NUMA support */
11fdf7f2 176 uint16_t parse_tunnel:1; /**< Parse internal headers */
7c673cae
FG		 177 uint16_t tso_segsz; /**< Segmentation offload MSS for non-tunneled packets. */
178 uint16_t tunnel_tso_segsz; /**< Segmentation offload MSS for tunneled pkts. */
179 uint16_t tx_vlan_id;/**< The tag ID */
180 uint16_t tx_vlan_id_outer;/**< The outer tag ID */
7c673cae
FG		 181 uint8_t tx_queue_stats_mapping_enabled;
182 uint8_t rx_queue_stats_mapping_enabled;
183 volatile uint16_t port_status; /**< port started or not */
9f95a23c 184 uint8_t need_setup; /**< port just attached */
7c673cae
FG		 185 uint8_t need_reconfig; /**< need reconfiguring port or not */
186 uint8_t need_reconfig_queues; /**< need reconfiguring queues or not */
187 uint8_t rss_flag; /**< enable rss or not */
188 uint8_t dcb_flag; /**< enable dcb */
f67539c2
TL		 189 uint16_t nb_rx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue rx desc number */
190 uint16_t nb_tx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue tx desc number */
191 struct rte_eth_rxconf rx_conf[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue rx configuration */
192 struct rte_eth_txconf tx_conf[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue tx configuration */
193 struct rte_ether_addr *mc_addr_pool; /**< pool of multicast addrs */
7c673cae
FG		 194 uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
195 uint8_t slave_flag; /**< bonding slave port */
11fdf7f2 196 struct port_flow *flow_list; /**< Associated flows. */
f67539c2
TL		 197 const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
198 const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
11fdf7f2
TL		 199#ifdef SOFTNIC
200 struct softnic_port softport; /**< softnic params */
201#endif
9f95a23c 202 /**< metadata value to insert in Tx packets. */
f67539c2
TL		 203 uint32_t tx_metadata;
204 const struct rte_eth_rxtx_callback *tx_set_md_cb[RTE_MAX_QUEUES_PER_PORT+1];
205 /**< dynamic flags. */
206 uint64_t mbuf_dynf;
207 const struct rte_eth_rxtx_callback *tx_set_dynf_cb[RTE_MAX_QUEUES_PER_PORT+1];
7c673cae
FG		 208};
209
7c673cae
FG		 210/**
211 * The data structure associated with each forwarding logical core.
212 * The logical cores are internally numbered by a core index from 0 to
213 * the maximum number of logical cores - 1.
214 * The system CPU identifier of all logical cores are setup in a global
215 * CPU id. configuration table.
216 */
217struct fwd_lcore {
11fdf7f2 218 struct rte_gso_ctx gso_ctx; /**< GSO context */
7c673cae 219 struct rte_mempool *mbp; /**< The mbuf pool to use by this core */
11fdf7f2 220 void *gro_ctx; /**< GRO context */
7c673cae
FG		 221 streamid_t stream_idx; /**< index of 1st stream in "fwd_streams" */
222 streamid_t stream_nb; /**< number of streams in "fwd_streams" */
223 lcoreid_t cpuid_idx; /**< index of logical core in CPU id table */
224 queueid_t tx_queue; /**< TX queue to send forwarded packets */
225 volatile char stopped; /**< stop forwarding when set */
226};
227
228/*
229 * Forwarding mode operations:
230 * - IO forwarding mode (default mode)
231 * Forwards packets unchanged.
232 *
233 * - MAC forwarding mode
234 * Set the source and the destination Ethernet addresses of packets
235 * before forwarding them.
236 *
237 * - IEEE1588 forwarding mode
238 * Check that received IEEE1588 Precise Time Protocol (PTP) packets are
239 * filtered and timestamped by the hardware.
240 * Forwards packets unchanged on the same port.
241 * Check that sent IEEE1588 PTP packets are timestamped by the hardware.
242 */
243typedef void (*port_fwd_begin_t)(portid_t pi);
244typedef void (*port_fwd_end_t)(portid_t pi);
245typedef void (*packet_fwd_t)(struct fwd_stream *fs);
246
247struct fwd_engine {
248 const char *fwd_mode_name; /**< Forwarding mode name. */
249 port_fwd_begin_t port_fwd_begin; /**< NULL if nothing special to do. */
250 port_fwd_end_t port_fwd_end; /**< NULL if nothing special to do. */
251 packet_fwd_t packet_fwd; /**< Mandatory. */
252};
253
254#define BURST_TX_WAIT_US 1
255#define BURST_TX_RETRIES 64
256
257extern uint32_t burst_tx_delay_time;
258extern uint32_t burst_tx_retry_num;
259
260extern struct fwd_engine io_fwd_engine;
261extern struct fwd_engine mac_fwd_engine;
262extern struct fwd_engine mac_swap_engine;
263extern struct fwd_engine flow_gen_engine;
264extern struct fwd_engine rx_only_engine;
265extern struct fwd_engine tx_only_engine;
266extern struct fwd_engine csum_fwd_engine;
267extern struct fwd_engine icmp_echo_engine;
9f95a23c 268extern struct fwd_engine noisy_vnf_engine;
11fdf7f2
TL		 269#ifdef SOFTNIC
270extern struct fwd_engine softnic_fwd_engine;
271#endif
7c673cae
FG		 272#ifdef RTE_LIBRTE_IEEE1588
273extern struct fwd_engine ieee1588_fwd_engine;
274#endif
275
276extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */
f67539c2
TL		 277extern cmdline_parse_inst_t cmd_set_raw;
278extern cmdline_parse_inst_t cmd_show_set_raw;
279extern cmdline_parse_inst_t cmd_show_set_raw_all;
7c673cae 280
9f95a23c
TL		 281extern uint16_t mempool_flags;
282
7c673cae
FG		 283/**
284 * Forwarding Configuration
285 *
286 */
287struct fwd_config {
288 struct fwd_engine *fwd_eng; /**< Packet forwarding mode. */
289 streamid_t nb_fwd_streams; /**< Nb. of forward streams to process. */
290 lcoreid_t nb_fwd_lcores; /**< Nb. of logical cores to launch. */
291 portid_t nb_fwd_ports; /**< Nb. of ports involved. */
292};
293
294/**
295 * DCB mode enable
296 */
297enum dcb_mode_enable
298{
299 DCB_VT_ENABLED,
300 DCB_ENABLED
301};
302
303#define MAX_TX_QUEUE_STATS_MAPPINGS 1024 /* MAX_PORT of 32 @ 32 tx_queues/port */
304#define MAX_RX_QUEUE_STATS_MAPPINGS 4096 /* MAX_PORT of 32 @ 128 rx_queues/port */
305
306struct queue_stats_mappings {
11fdf7f2 307 portid_t port_id;
7c673cae
FG		 308 uint16_t queue_id;
309 uint8_t stats_counter_id;
310} __rte_cache_aligned;
311
312extern struct queue_stats_mappings tx_queue_stats_mappings_array[];
313extern struct queue_stats_mappings rx_queue_stats_mappings_array[];
314
315/* Assign both tx and rx queue stats mappings to the same default values */
316extern struct queue_stats_mappings *tx_queue_stats_mappings;
317extern struct queue_stats_mappings *rx_queue_stats_mappings;
318
319extern uint16_t nb_tx_queue_stats_mappings;
320extern uint16_t nb_rx_queue_stats_mappings;
321
11fdf7f2
TL		 322extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */
323
7c673cae
FG		 324/* globals used for configuration */
325extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */
11fdf7f2 326extern int testpmd_logtype; /**< Log type for testpmd logs */
7c673cae
FG		 327extern uint8_t interactive;
328extern uint8_t auto_start;
11fdf7f2
TL		 329extern uint8_t tx_first;
330extern char cmdline_filename[PATH_MAX]; /**< offline commands file */
7c673cae
FG		 331extern uint8_t numa_support; /**< set by "--numa" parameter */
332extern uint16_t port_topology; /**< set by "--port-topology" parameter */
333extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */
11fdf7f2 334extern uint8_t flow_isolate_all; /**< set by "--flow-isolate-all */
9f95a23c
TL		 335extern uint8_t mp_alloc_type;
336/**< set by "--mp-anon" or "--mp-alloc" parameter */
7c673cae 337extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */
f67539c2 338extern uint8_t no_device_start; /**<set by "--disable-device-start" parameter */
7c673cae 339extern volatile int test_done; /* stop packet forwarding when set to 1. */
11fdf7f2
TL		 340extern uint8_t lsc_interrupt; /**< disabled by "--no-lsc-interrupt" parameter */
341extern uint8_t rmv_interrupt; /**< disabled by "--no-rmv-interrupt" parameter */
342extern uint32_t event_print_mask;
343/**< set by "--print-event xxxx" and "--mask-event xxxx parameters */
9f95a23c 344extern bool setup_on_probe_event; /**< disabled by port setup-on iterator */
11fdf7f2
TL		 345extern uint8_t hot_plug; /**< enable by "--hot-plug" parameter */
346extern int do_mlockall; /**< set by "--mlockall" or "--no-mlockall" parameter */
f67539c2 347extern uint8_t clear_ptypes; /**< disabled by set ptype cmd */
11fdf7f2
TL		 348
349#ifdef RTE_LIBRTE_IXGBE_BYPASS
7c673cae
FG		 350extern uint32_t bypass_timeout; /**< Store the NIC bypass watchdog timeout */
351#endif
352
353/*
354 * Store specified sockets on which memory pool to be used by ports
355 * is allocated.
356 */
11fdf7f2 357extern uint8_t port_numa[RTE_MAX_ETHPORTS];
7c673cae
FG		 358
359/*
360 * Store specified sockets on which RX ring to be used by ports
361 * is allocated.
362 */
11fdf7f2 363extern uint8_t rxring_numa[RTE_MAX_ETHPORTS];
7c673cae
FG		 364
365/*
366 * Store specified sockets on which TX ring to be used by ports
367 * is allocated.
368 */
11fdf7f2 369extern uint8_t txring_numa[RTE_MAX_ETHPORTS];
7c673cae
FG		 370
371extern uint8_t socket_num;
372
373/*
374 * Configuration of logical cores:
375 * nb_fwd_lcores <= nb_cfg_lcores <= nb_lcores
376 */
377extern lcoreid_t nb_lcores; /**< Number of logical cores probed at init time. */
378extern lcoreid_t nb_cfg_lcores; /**< Number of configured logical cores. */
379extern lcoreid_t nb_fwd_lcores; /**< Number of forwarding logical cores. */
380extern unsigned int fwd_lcores_cpuids[RTE_MAX_LCORE];
11fdf7f2
TL		 381extern unsigned int num_sockets;
382extern unsigned int socket_ids[RTE_MAX_NUMA_NODES];
7c673cae
FG		 383
384/*
385 * Configuration of Ethernet ports:
386 * nb_fwd_ports <= nb_cfg_ports <= nb_ports
387 */
388extern portid_t nb_ports; /**< Number of ethernet ports probed at init time. */
389extern portid_t nb_cfg_ports; /**< Number of configured ports. */
390extern portid_t nb_fwd_ports; /**< Number of forwarding ports. */
391extern portid_t fwd_ports_ids[RTE_MAX_ETHPORTS];
392extern struct rte_port *ports;
393
394extern struct rte_eth_rxmode rx_mode;
11fdf7f2
TL		 395extern struct rte_eth_txmode tx_mode;
396
7c673cae
FG		 397extern uint64_t rss_hf;
398
f67539c2 399extern queueid_t nb_hairpinq;
7c673cae
FG		 400extern queueid_t nb_rxq;
401extern queueid_t nb_txq;
402
403extern uint16_t nb_rxd;
404extern uint16_t nb_txd;
405
406extern int16_t rx_free_thresh;
407extern int8_t rx_drop_en;
408extern int16_t tx_free_thresh;
409extern int16_t tx_rs_thresh;
7c673cae 410
9f95a23c
TL		 411extern uint16_t noisy_tx_sw_bufsz;
412extern uint16_t noisy_tx_sw_buf_flush_time;
413extern uint64_t noisy_lkup_mem_sz;
414extern uint64_t noisy_lkup_num_writes;
415extern uint64_t noisy_lkup_num_reads;
416extern uint64_t noisy_lkup_num_reads_writes;
417
7c673cae
FG		 418extern uint8_t dcb_config;
419extern uint8_t dcb_test;
7c673cae
FG		 420
421extern uint16_t mbuf_data_size; /**< Mbuf data space size. */
422extern uint32_t param_total_num_mbufs;
423
11fdf7f2
TL		 424extern uint16_t stats_period;
425
426#ifdef RTE_LIBRTE_LATENCY_STATS
427extern uint8_t latencystats_enabled;
428extern lcoreid_t latencystats_lcore_id;
429#endif
430
431#ifdef RTE_LIBRTE_BITRATE
432extern lcoreid_t bitrate_lcore_id;
433extern uint8_t bitrate_enabled;
434#endif
435
7c673cae
FG		 436extern struct rte_fdir_conf fdir_conf;
437
438/*
439 * Configuration of packet segments used by the "txonly" processing engine.
440 */
441#define TXONLY_DEF_PACKET_LEN 64
442extern uint16_t tx_pkt_length; /**< Length of TXONLY packet */
443extern uint16_t tx_pkt_seg_lengths[RTE_MAX_SEGS_PER_PKT]; /**< Seg. lengths */
444extern uint8_t tx_pkt_nb_segs; /**< Number of segments in TX packets */
445
446enum tx_pkt_split {
447 TX_PKT_SPLIT_OFF,
448 TX_PKT_SPLIT_ON,
449 TX_PKT_SPLIT_RND,
450};
451
452extern enum tx_pkt_split tx_pkt_split;
453
9f95a23c
TL		 454extern uint8_t txonly_multi_flow;
455
7c673cae
FG		 456extern uint16_t nb_pkt_per_burst;
457extern uint16_t mb_mempool_cache;
458extern int8_t rx_pthresh;
459extern int8_t rx_hthresh;
460extern int8_t rx_wthresh;
461extern int8_t tx_pthresh;
462extern int8_t tx_hthresh;
463extern int8_t tx_wthresh;
464
9f95a23c
TL		 465extern uint16_t tx_udp_src_port;
466extern uint16_t tx_udp_dst_port;
467
468extern uint32_t tx_ip_src_addr;
469extern uint32_t tx_ip_dst_addr;
470
7c673cae
FG		 471extern struct fwd_config cur_fwd_config;
472extern struct fwd_engine *cur_fwd_eng;
473extern uint32_t retry_enabled;
474extern struct fwd_lcore **fwd_lcores;
475extern struct fwd_stream **fwd_streams;
476
11fdf7f2
TL		 477extern uint16_t vxlan_gpe_udp_port; /**< UDP port of tunnel VXLAN-GPE. */
478
7c673cae 479extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */
f67539c2 480extern struct rte_ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS];
7c673cae
FG		 481
482extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */
483extern uint32_t burst_tx_retry_num; /**< Burst tx retry number for mac-retry. */
484
11fdf7f2
TL		 485#define GRO_DEFAULT_ITEM_NUM_PER_FLOW 32
486#define GRO_DEFAULT_FLOW_NUM (RTE_GRO_MAX_BURST_ITEM_NUM / \
487 GRO_DEFAULT_ITEM_NUM_PER_FLOW)
488
489#define GRO_DEFAULT_FLUSH_CYCLES 1
490#define GRO_MAX_FLUSH_CYCLES 4
491
492struct gro_status {
493 struct rte_gro_param param;
494 uint8_t enable;
495};
496extern struct gro_status gro_ports[RTE_MAX_ETHPORTS];
497extern uint8_t gro_flush_cycles;
498
499#define GSO_MAX_PKT_BURST 2048
500struct gso_status {
501 uint8_t enable;
502};
503extern struct gso_status gso_ports[RTE_MAX_ETHPORTS];
504extern uint16_t gso_max_segment_size;
505
506/* VXLAN encap/decap parameters. */
507struct vxlan_encap_conf {
508 uint32_t select_ipv4:1;
509 uint32_t select_vlan:1;
9f95a23c 510 uint32_t select_tos_ttl:1;
11fdf7f2
TL		 511 uint8_t vni[3];
512 rte_be16_t udp_src;
513 rte_be16_t udp_dst;
514 rte_be32_t ipv4_src;
515 rte_be32_t ipv4_dst;
516 uint8_t ipv6_src[16];
517 uint8_t ipv6_dst[16];
518 rte_be16_t vlan_tci;
9f95a23c
TL		 519 uint8_t ip_tos;
520 uint8_t ip_ttl;
f67539c2
TL		 521 uint8_t eth_src[RTE_ETHER_ADDR_LEN];
522 uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
11fdf7f2 523};
f67539c2
TL		 524
525extern struct vxlan_encap_conf vxlan_encap_conf;
11fdf7f2
TL		 526
527/* NVGRE encap/decap parameters. */
528struct nvgre_encap_conf {
529 uint32_t select_ipv4:1;
530 uint32_t select_vlan:1;
531 uint8_t tni[3];
532 rte_be32_t ipv4_src;
533 rte_be32_t ipv4_dst;
534 uint8_t ipv6_src[16];
535 uint8_t ipv6_dst[16];
536 rte_be16_t vlan_tci;
f67539c2
TL		 537 uint8_t eth_src[RTE_ETHER_ADDR_LEN];
538 uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
11fdf7f2 539};
f67539c2
TL		 540
541extern struct nvgre_encap_conf nvgre_encap_conf;
11fdf7f2 542
9f95a23c
TL		 543/* L2 encap parameters. */
544struct l2_encap_conf {
545 uint32_t select_ipv4:1;
546 uint32_t select_vlan:1;
547 rte_be16_t vlan_tci;
f67539c2
TL		 548 uint8_t eth_src[RTE_ETHER_ADDR_LEN];
549 uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
9f95a23c 550};
f67539c2 551extern struct l2_encap_conf l2_encap_conf;
9f95a23c
TL		 552
553/* L2 decap parameters. */
554struct l2_decap_conf {
555 uint32_t select_vlan:1;
556};
f67539c2 557extern struct l2_decap_conf l2_decap_conf;
9f95a23c
TL		 558
559/* MPLSoGRE encap parameters. */
560struct mplsogre_encap_conf {
561 uint32_t select_ipv4:1;
562 uint32_t select_vlan:1;
563 uint8_t label[3];
564 rte_be32_t ipv4_src;
565 rte_be32_t ipv4_dst;
566 uint8_t ipv6_src[16];
567 uint8_t ipv6_dst[16];
568 rte_be16_t vlan_tci;
f67539c2
TL		 569 uint8_t eth_src[RTE_ETHER_ADDR_LEN];
570 uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
9f95a23c 571};
f67539c2 572extern struct mplsogre_encap_conf mplsogre_encap_conf;
9f95a23c
TL		 573
574/* MPLSoGRE decap parameters. */
575struct mplsogre_decap_conf {
576 uint32_t select_ipv4:1;
577 uint32_t select_vlan:1;
578};
f67539c2 579extern struct mplsogre_decap_conf mplsogre_decap_conf;
9f95a23c
TL		 580
581/* MPLSoUDP encap parameters. */
582struct mplsoudp_encap_conf {
583 uint32_t select_ipv4:1;
584 uint32_t select_vlan:1;
585 uint8_t label[3];
586 rte_be16_t udp_src;
587 rte_be16_t udp_dst;
588 rte_be32_t ipv4_src;
589 rte_be32_t ipv4_dst;
590 uint8_t ipv6_src[16];
591 uint8_t ipv6_dst[16];
592 rte_be16_t vlan_tci;
f67539c2
TL		 593 uint8_t eth_src[RTE_ETHER_ADDR_LEN];
594 uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
9f95a23c 595};
f67539c2 596extern struct mplsoudp_encap_conf mplsoudp_encap_conf;
9f95a23c
TL		 597
598/* MPLSoUDP decap parameters. */
599struct mplsoudp_decap_conf {
600 uint32_t select_ipv4:1;
601 uint32_t select_vlan:1;
602};
f67539c2
TL		 603extern struct mplsoudp_decap_conf mplsoudp_decap_conf;
604
605extern enum rte_eth_rx_mq_mode rx_mq_mode;
9f95a23c 606
7c673cae
FG		 607static inline unsigned int
608lcore_num(void)
609{
610 unsigned int i;
611
612 for (i = 0; i < RTE_MAX_LCORE; ++i)
613 if (fwd_lcores_cpuids[i] == rte_lcore_id())
614 return i;
615
616 rte_panic("lcore_id of current thread not found in fwd_lcores_cpuids\n");
617}
618
f67539c2
TL		 619void
620parse_fwd_portlist(const char *port);
621
7c673cae
FG		 622static inline struct fwd_lcore *
623current_fwd_lcore(void)
624{
625 return fwd_lcores[lcore_num()];
626}
627
628/* Mbuf Pools */
629static inline void
630mbuf_poolname_build(unsigned int sock_id, char* mp_name, int name_size)
631{
632 snprintf(mp_name, name_size, "mbuf_pool_socket_%u", sock_id);
633}
634
635static inline struct rte_mempool *
636mbuf_pool_find(unsigned int sock_id)
637{
638 char pool_name[RTE_MEMPOOL_NAMESIZE];
639
640 mbuf_poolname_build(sock_id, pool_name, sizeof(pool_name));
641 return rte_mempool_lookup((const char *)pool_name);
642}
643
644/**
645 * Read/Write operations on a PCI register of a port.
646 */
647static inline uint32_t
648port_pci_reg_read(struct rte_port *port, uint32_t reg_off)
649{
11fdf7f2
TL		 650 const struct rte_pci_device *pci_dev;
651 const struct rte_bus *bus;
7c673cae
FG		 652 void *reg_addr;
653 uint32_t reg_v;
654
11fdf7f2
TL		 655 if (!port->dev_info.device) {
656 printf("Invalid device\n");
657 return 0;
658 }
659
660 bus = rte_bus_find_by_device(port->dev_info.device);
661 if (bus && !strcmp(bus->name, "pci")) {
662 pci_dev = RTE_DEV_TO_PCI(port->dev_info.device);
663 } else {
664 printf("Not a PCI device\n");
665 return 0;
666 }
667
668 reg_addr = ((char *)pci_dev->mem_resource[0].addr + reg_off);
7c673cae
FG		 669 reg_v = *((volatile uint32_t *)reg_addr);
670 return rte_le_to_cpu_32(reg_v);
671}
672
673#define port_id_pci_reg_read(pt_id, reg_off) \
674 port_pci_reg_read(&ports[(pt_id)], (reg_off))
675
676static inline void
677port_pci_reg_write(struct rte_port *port, uint32_t reg_off, uint32_t reg_v)
678{
11fdf7f2
TL		 679 const struct rte_pci_device *pci_dev;
680 const struct rte_bus *bus;
7c673cae
FG		 681 void *reg_addr;
682
11fdf7f2
TL		 683 if (!port->dev_info.device) {
684 printf("Invalid device\n");
685 return;
686 }
687
688 bus = rte_bus_find_by_device(port->dev_info.device);
689 if (bus && !strcmp(bus->name, "pci")) {
690 pci_dev = RTE_DEV_TO_PCI(port->dev_info.device);
691 } else {
692 printf("Not a PCI device\n");
693 return;
694 }
695
696 reg_addr = ((char *)pci_dev->mem_resource[0].addr + reg_off);
7c673cae
FG		 697 *((volatile uint32_t *)reg_addr) = rte_cpu_to_le_32(reg_v);
698}
699
700#define port_id_pci_reg_write(pt_id, reg_off, reg_value) \
701 port_pci_reg_write(&ports[(pt_id)], (reg_off), (reg_value))
702
703/* Prototypes */
704unsigned int parse_item_list(char* str, const char* item_name,
705 unsigned int max_items,
706 unsigned int *parsed_items, int check_unique_values);
707void launch_args_parse(int argc, char** argv);
11fdf7f2 708void cmdline_read_from_file(const char *filename);
7c673cae
FG		 709void prompt(void);
710void prompt_exit(void);
711void nic_stats_display(portid_t port_id);
712void nic_stats_clear(portid_t port_id);
713void nic_xstats_display(portid_t port_id);
714void nic_xstats_clear(portid_t port_id);
715void nic_stats_mapping_display(portid_t port_id);
f67539c2 716void device_infos_display(const char *identifier);
7c673cae 717void port_infos_display(portid_t port_id);
9f95a23c
TL		 718void port_summary_display(portid_t port_id);
719void port_summary_header_display(void);
11fdf7f2 720void port_offload_cap_display(portid_t port_id);
7c673cae
FG		 721void rx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
722void tx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
723void fwd_lcores_config_display(void);
724void pkt_fwd_config_display(struct fwd_config *cfg);
725void rxtx_config_display(void);
726void fwd_config_setup(void);
727void set_def_fwd_config(void);
728void reconfig(portid_t new_port_id, unsigned socket_id);
729int init_fwd_streams(void);
11fdf7f2
TL		 730void update_fwd_ports(portid_t new_pid);
731
732void set_fwd_eth_peer(portid_t port_id, char *peer_addr);
7c673cae
FG		 733
734void port_mtu_set(portid_t port_id, uint16_t mtu);
735void port_reg_bit_display(portid_t port_id, uint32_t reg_off, uint8_t bit_pos);
736void port_reg_bit_set(portid_t port_id, uint32_t reg_off, uint8_t bit_pos,
737 uint8_t bit_v);
738void port_reg_bit_field_display(portid_t port_id, uint32_t reg_off,
739 uint8_t bit1_pos, uint8_t bit2_pos);
740void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
741 uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value);
742void port_reg_display(portid_t port_id, uint32_t reg_off);
743void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value);
11fdf7f2
TL		 744int port_flow_validate(portid_t port_id,
745 const struct rte_flow_attr *attr,
746 const struct rte_flow_item *pattern,
747 const struct rte_flow_action *actions);
748int port_flow_create(portid_t port_id,
749 const struct rte_flow_attr *attr,
750 const struct rte_flow_item *pattern,
751 const struct rte_flow_action *actions);
f67539c2
TL		 752void update_age_action_context(const struct rte_flow_action *actions,
753 struct port_flow *pf);
11fdf7f2
TL		 754int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
755int port_flow_flush(portid_t port_id);
f67539c2 756int port_flow_dump(portid_t port_id, const char *file_name);
11fdf7f2
TL		 757int port_flow_query(portid_t port_id, uint32_t rule,
758 const struct rte_flow_action *action);
759void port_flow_list(portid_t port_id, uint32_t n, const uint32_t *group);
f67539c2 760void port_flow_aged(portid_t port_id, uint8_t destroy);
11fdf7f2 761int port_flow_isolate(portid_t port_id, int set);
7c673cae
FG		 762
763void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id);
764void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id);
765
766int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc);
767int set_fwd_lcores_mask(uint64_t lcoremask);
768void set_fwd_lcores_number(uint16_t nb_lc);
769
770void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt);
771void set_fwd_ports_mask(uint64_t portmask);
772void set_fwd_ports_number(uint16_t nb_pt);
773int port_is_forwarding(portid_t port_id);
774
775void rx_vlan_strip_set(portid_t port_id, int on);
776void rx_vlan_strip_set_on_queue(portid_t port_id, uint16_t queue_id, int on);
777
778void rx_vlan_filter_set(portid_t port_id, int on);
779void rx_vlan_all_filter_set(portid_t port_id, int on);
f67539c2 780void rx_vlan_qinq_strip_set(portid_t port_id, int on);
7c673cae
FG		 781int rx_vft_set(portid_t port_id, uint16_t vlan_id, int on);
782void vlan_extend_set(portid_t port_id, int on);
783void vlan_tpid_set(portid_t port_id, enum rte_vlan_type vlan_type,
784 uint16_t tp_id);
785void tx_vlan_set(portid_t port_id, uint16_t vlan_id);
786void tx_qinq_set(portid_t port_id, uint16_t vlan_id, uint16_t vlan_id_outer);
787void tx_vlan_reset(portid_t port_id);
788void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on);
789
790void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value);
791
11fdf7f2
TL		 792void set_xstats_hide_zero(uint8_t on_off);
793
7c673cae
FG		 794void set_verbose_level(uint16_t vb_level);
795void set_tx_pkt_segments(unsigned *seg_lengths, unsigned nb_segs);
796void show_tx_pkt_segments(void);
797void set_tx_pkt_split(const char *name);
798void set_nb_pkt_per_burst(uint16_t pkt_burst);
799char *list_pkt_forwarding_modes(void);
800char *list_pkt_forwarding_retry_modes(void);
801void set_pkt_forwarding_mode(const char *fwd_mode);
802void start_packet_forwarding(int with_tx_first);
9f95a23c
TL		 803void fwd_stats_display(void);
804void fwd_stats_reset(void);
7c673cae
FG		 805void stop_packet_forwarding(void);
806void dev_set_link_up(portid_t pid);
807void dev_set_link_down(portid_t pid);
808void init_port_config(void);
809void set_port_slave_flag(portid_t slave_pid);
810void clear_port_slave_flag(portid_t slave_pid);
811uint8_t port_is_bonding_slave(portid_t slave_pid);
812
813int init_port_dcb_config(portid_t pid, enum dcb_mode_enable dcb_mode,
814 enum rte_eth_nb_tcs num_tcs,
815 uint8_t pfc_en);
816int start_port(portid_t pid);
817void stop_port(portid_t pid);
818void close_port(portid_t pid);
11fdf7f2 819void reset_port(portid_t pid);
7c673cae 820void attach_port(char *identifier);
f67539c2 821void detach_devargs(char *identifier);
9f95a23c 822void detach_port_device(portid_t port_id);
7c673cae 823int all_ports_stopped(void);
11fdf7f2 824int port_is_stopped(portid_t port_id);
7c673cae
FG		 825int port_is_started(portid_t port_id);
826void pmd_test_exit(void);
827void fdir_get_infos(portid_t port_id);
828void fdir_set_flex_mask(portid_t port_id,
829 struct rte_eth_fdir_flex_mask *cfg);
830void fdir_set_flex_payload(portid_t port_id,
831 struct rte_eth_flex_payload_cfg *cfg);
832void port_rss_reta_info(portid_t port_id,
833 struct rte_eth_rss_reta_entry64 *reta_conf,
834 uint16_t nb_entries);
835
836void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on);
7c673cae
FG		 837
838int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint16_t rate);
839int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint16_t rate,
840 uint64_t q_msk);
841
9f95a23c 842void port_rss_hash_conf_show(portid_t port_id, int show_rss_key);
7c673cae
FG		 843void port_rss_hash_key_update(portid_t port_id, char rss_type[],
844 uint8_t *hash_key, uint hash_key_len);
7c673cae
FG		 845int rx_queue_id_is_invalid(queueid_t rxq_id);
846int tx_queue_id_is_invalid(queueid_t txq_id);
11fdf7f2
TL		 847void setup_gro(const char *onoff, portid_t port_id);
848void setup_gro_flush_cycles(uint8_t cycles);
849void show_gro(portid_t port_id);
850void setup_gso(const char *mode, portid_t port_id);
f67539c2
TL		 851int eth_dev_info_get_print_err(uint16_t port_id,
852 struct rte_eth_dev_info *dev_info);
853void eth_set_promisc_mode(uint16_t port_id, int enable);
854void eth_set_allmulticast_mode(uint16_t port, int enable);
855int eth_link_get_nowait_print_err(uint16_t port_id, struct rte_eth_link *link);
856int eth_macaddr_get_print_err(uint16_t port_id,
857 struct rte_ether_addr *mac_addr);
858
859/* Functions to display the set of MAC addresses added to a port*/
860void show_macs(portid_t port_id);
861void show_mcast_macs(portid_t port_id);
7c673cae
FG		 862
863/* Functions to manage the set of filtered Multicast MAC addresses */
f67539c2
TL		 864void mcast_addr_add(portid_t port_id, struct rte_ether_addr *mc_addr);
865void mcast_addr_remove(portid_t port_id, struct rte_ether_addr *mc_addr);
11fdf7f2
TL		 866void port_dcb_info_display(portid_t port_id);
867
868uint8_t *open_file(const char *file_path, uint32_t *size);
869int save_file(const char *file_path, uint8_t *buf, uint32_t size);
870int close_file(uint8_t *buf);
871
872void port_queue_region_info_display(portid_t port_id, void *buf);
7c673cae
FG		 873
874enum print_warning {
875 ENABLED_WARN = 0,
876 DISABLED_WARN
877};
878int port_id_is_invalid(portid_t port_id, enum print_warning warning);
11fdf7f2
TL		 879void print_valid_ports(void);
880int new_socket_id(unsigned int socket_id);
881
882queueid_t get_allowed_max_nb_rxq(portid_t *pid);
883int check_nb_rxq(queueid_t rxq);
884queueid_t get_allowed_max_nb_txq(portid_t *pid);
885int check_nb_txq(queueid_t txq);
f67539c2
TL		 886int check_nb_rxd(queueid_t rxd);
887int check_nb_txd(queueid_t txd);
888queueid_t get_allowed_max_nb_hairpinq(portid_t *pid);
889int check_nb_hairpinq(queueid_t hairpinq);
7c673cae 890
9f95a23c
TL		 891uint16_t dump_rx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
892 uint16_t nb_pkts, __rte_unused uint16_t max_pkts,
893 __rte_unused void *user_param);
894
895uint16_t dump_tx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
896 uint16_t nb_pkts, __rte_unused void *user_param);
897
898void add_rx_dump_callbacks(portid_t portid);
899void remove_rx_dump_callbacks(portid_t portid);
900void add_tx_dump_callbacks(portid_t portid);
901void remove_tx_dump_callbacks(portid_t portid);
902void configure_rxtx_dump_callbacks(uint16_t verbose);
903
904uint16_t tx_pkt_set_md(uint16_t port_id, __rte_unused uint16_t queue,
905 struct rte_mbuf *pkts[], uint16_t nb_pkts,
906 __rte_unused void *user_param);
907void add_tx_md_callback(portid_t portid);
908void remove_tx_md_callback(portid_t portid);
909
f67539c2
TL		 910uint16_t tx_pkt_set_dynf(uint16_t port_id, __rte_unused uint16_t queue,
911 struct rte_mbuf *pkts[], uint16_t nb_pkts,
912 __rte_unused void *user_param);
913void add_tx_dynf_callback(portid_t portid);
914void remove_tx_dynf_callback(portid_t portid);
915
7c673cae
FG		 916/*
917 * Work-around of a compilation error with ICC on invocations of the
918 * rte_be_to_cpu_16() function.
919 */
920#ifdef __GCC__
921#define RTE_BE_TO_CPU_16(be_16_v) rte_be_to_cpu_16((be_16_v))
922#define RTE_CPU_TO_BE_16(cpu_16_v) rte_cpu_to_be_16((cpu_16_v))
923#else
924#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
925#define RTE_BE_TO_CPU_16(be_16_v) (be_16_v)
926#define RTE_CPU_TO_BE_16(cpu_16_v) (cpu_16_v)
927#else
928#define RTE_BE_TO_CPU_16(be_16_v) \
929 (uint16_t) ((((be_16_v) & 0xFF) << 8) | ((be_16_v) >> 8))
930#define RTE_CPU_TO_BE_16(cpu_16_v) \
931 (uint16_t) ((((cpu_16_v) & 0xFF) << 8) | ((cpu_16_v) >> 8))
932#endif
933#endif /* __GCC__ */
934
11fdf7f2
TL		 935#define TESTPMD_LOG(level, fmt, args...) \
936 rte_log(RTE_LOG_ ## level, testpmd_logtype, "testpmd: " fmt, ## args)
937
7c673cae 938#endif /* _TESTPMD_H_ */
Ceph