projects / ceph.git / blame
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1 | .. SPDX-License-Identifier: BSD-3-Clause |
| 2 | Copyright(c) 2018 Intel Corporation. | |
| 3 | ||
| 4 | IFPGA Rawdev Driver | |
| 5 | ====================== | |
| 6 | ||
| 7 | FPGA is used more and more widely in Cloud and NFV, one primary reason is | |
| 8 | that FPGA not only provides ASIC performance but also it's more flexible | |
| 9 | than ASIC. | |
| 10 | ||
| 11 | FPGA uses Partial Reconfigure (PR) Parts of Bit Stream to achieve its | |
| 12 | flexibility. That means one FPGA Device Bit Stream is divided into many Parts | |
| 13 | of Bit Stream(each Part of Bit Stream is defined as AFU-Accelerated Function | |
| 14 | Unit), and each AFU is a hardware acceleration unit which can be dynamically | |
| 15 | reloaded respectively. | |
| 16 | ||
| 17 | By PR (Partial Reconfiguration) AFUs, one FPGA resources can be time-shared by | |
| 18 | different users. FPGA hot upgrade and fault tolerance can be provided easily. | |
| 19 | ||
| 20 | The SW IFPGA Rawdev Driver (**ifpga_rawdev**) provides a Rawdev driver | |
| 21 | that utilizes Intel FPGA Software Stack OPAE(Open Programmable Acceleration | |
| 22 | Engine) for FPGA management. | |
| 23 | ||
| 24 | Implementation details | |
| 25 | ---------------------- | |
| 26 | ||
| 27 | Each instance of IFPGA Rawdev Driver is probed by Intel FpgaDev. In coordination | |
| 28 | with OPAE share code IFPGA Rawdev Driver provides common FPGA management ops | |
| 29 | for FPGA operation, OPAE provides all following operations: | |
| 30 | - FPGA PR (Partial Reconfiguration) management | |
| 31 | - FPGA AFUs Identifying | |
| 32 | - FPGA Thermal Management | |
| 33 | - FPGA Power Management | |
| 34 | - FPGA Performance reporting | |
| 35 | - FPGA Remote Debug | |
| 36 | ||
| 37 | All configuration parameters are taken by vdev_ifpga_cfg driver. Besides | |
| 38 | configuration, vdev_ifpga_cfg driver also hot plugs in IFPGA Bus. | |
| 39 | ||
| 40 | All of the AFUs of one FPGA may share same PCI BDF and AFUs scan depend on | |
| 41 | IFPGA Rawdev Driver so IFPGA Bus takes AFU device scan and AFU drivers probe. | |
| 42 | All AFU device driver bind to AFU device by its UUID (Universally Unique | |
| 43 | Identifier). | |
| 44 | ||
| 45 | To avoid unnecessary code duplication and ensure maximum performance, | |
| 46 | handling of AFU devices is left to different PMDs; all the design as | |
| 47 | summarized by the following block diagram:: | |
| 48 | ||
| 49 | +---------------------------------------------------------------+ | |
| 50 | | Application(s) | | |
| 51 | +----------------------------.----------------------------------+ | |
| 52 | | | |
| 53 | | | |
| 54 | +----------------------------'----------------------------------+ | |
| 55 | | DPDK Framework (APIs) | | |
| 56 | +----------|------------|--------.---------------------|--------+ | |
| 57 | / \ | | |
| 58 | / \ | | |
| 59 | +-------'-------+ +-------'-------+ +--------'--------+ | |
| 60 | | Eth PMD | | Crypto PMD | | | | |
| 61 | +-------.-------+ +-------.-------+ | | | |
| 62 | | | | | | |
| 63 | | | | | | |
| 64 | +-------'-------+ +-------'-------+ | IFPGA | | |
| 65 | | Eth AFU Dev | |Crypto AFU Dev | | Rawdev Driver | | |
| 66 | +-------.-------+ +-------.-------+ |(OPAE Share Code)| | |
| 67 | | | | | | |
| 68 | | | Rawdev | | | |
| 69 | +-------'------------------'-------+ Ops | | | |
| 70 | | IFPGA Bus | -------->| | | |
| 71 | +-----------------.----------------+ +--------.--------+ | |
| 72 | | | | |
| 73 | Hot-plugin -->| | | |
| 74 | | | | |
| 75 | +-----------------'------------------+ +--------'--------+ | |
| 76 | | vdev_ifpga_cfg driver | | Intel FpgaDev | | |
| 77 | +------------------------------------+ +-----------------+ | |
| 78 | ||
| 79 | Build options | |
| 80 | ------------- | |
| 81 | ||
| 82 | - ``CONFIG_RTE_LIBRTE_IFPGA_BUS`` (default ``y``) | |
| 83 | ||
| 84 | Toggle compilation of IFPGA Bus library. | |
| 85 | ||
| 86 | - ``CONFIG_RTE_LIBRTE_IFPGA_RAWDEV`` (default ``y``) | |
| 87 | ||
| 88 | Toggle compilation of the ``ifpga_rawdev`` driver. | |
| 89 | ||
| 90 | Run-time parameters | |
| 91 | ------------------- | |
| 92 | ||
| 93 | This driver is invoked automatically in systems added with Intel FPGA, | |
| 9f95a23c | 94 | but PR and IFPGA Bus scan is triggered by command line using |
| 11fdf7f2 TL |
95 | ``--vdev 'ifpga_rawdev_cfg`` EAL option. |
| 96 | ||
| 97 | The following device parameters are supported: | |
| 98 | ||
| 99 | - ``ifpga`` [string] | |
| 100 | ||
| 101 | Provide a specific Intel FPGA device PCI BDF. Can be provided multiple | |
| 102 | times for additional instances. | |
| 103 | ||
| 104 | - ``port`` [int] | |
| 105 | ||
| 106 | Each FPGA can provide many channels to PR AFU by software, each channels | |
| 107 | is identified by this parameter. | |
| 108 | ||
| 109 | - ``afu_bts`` [string] | |
| 110 | ||
| 111 | If null, the AFU Bit Stream has been PR in FPGA, if not forces PR and | |
| 112 | identifies AFU Bit Stream file. |