]> git.proxmox.com Git - ceph.git/blame - ceph/src/spdk/dpdk/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
update source to Ceph Pacific 16.2.2
[ceph.git] / ceph / src / spdk / dpdk / drivers / bus / fslmc / mc / fsl_dpio_cmd.h
CommitLineData
11fdf7f2
TL
1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2 *
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
f67539c2 4 * Copyright 2016-2019 NXP
11fdf7f2
TL
5 *
6 */
7#ifndef _FSL_DPIO_CMD_H
8#define _FSL_DPIO_CMD_H
9
10/* DPIO Version */
11#define DPIO_VER_MAJOR 4
f67539c2 12#define DPIO_VER_MINOR 3
11fdf7f2
TL
13
14#define DPIO_CMD_BASE_VERSION 1
15#define DPIO_CMD_ID_OFFSET 4
16
17#define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
18
19/* Command IDs */
20#define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
21#define DPIO_CMDID_OPEN DPIO_CMD(0x803)
22#define DPIO_CMDID_CREATE DPIO_CMD(0x903)
23#define DPIO_CMDID_DESTROY DPIO_CMD(0x983)
24#define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
25
26#define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
27#define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
28#define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
29#define DPIO_CMDID_RESET DPIO_CMD(0x005)
30#define DPIO_CMDID_IS_ENABLED DPIO_CMD(0x006)
31
32#define DPIO_CMDID_SET_IRQ_ENABLE DPIO_CMD(0x012)
33#define DPIO_CMDID_GET_IRQ_ENABLE DPIO_CMD(0x013)
34#define DPIO_CMDID_SET_IRQ_MASK DPIO_CMD(0x014)
35#define DPIO_CMDID_GET_IRQ_MASK DPIO_CMD(0x015)
36#define DPIO_CMDID_GET_IRQ_STATUS DPIO_CMD(0x016)
37#define DPIO_CMDID_CLEAR_IRQ_STATUS DPIO_CMD(0x017)
38
39#define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120)
40#define DPIO_CMDID_GET_STASHING_DEST DPIO_CMD(0x121)
41#define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x122)
42#define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x123)
43
44/* Macros for accessing command fields smaller than 1byte */
45#define DPIO_MASK(field) \
46 GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \
47 DPIO_##field##_SHIFT)
48#define dpio_set_field(var, field, val) \
49 ((var) |= (((val) << DPIO_##field##_SHIFT) & DPIO_MASK(field)))
50#define dpio_get_field(var, field) \
51 (((var) & DPIO_MASK(field)) >> DPIO_##field##_SHIFT)
52
53#pragma pack(push, 1)
54struct dpio_cmd_open {
55 uint32_t dpio_id;
56};
57
58#define DPIO_CHANNEL_MODE_SHIFT 0
59#define DPIO_CHANNEL_MODE_SIZE 2
60
61struct dpio_cmd_create {
62 uint16_t pad1;
63 /* from LSB: channel_mode:2 */
64 uint8_t channel_mode;
65 uint8_t pad2;
66 uint8_t num_priorities;
67};
68
69struct dpio_cmd_destroy {
70 uint32_t dpio_id;
71};
72
73#define DPIO_ENABLE_SHIFT 0
74#define DPIO_ENABLE_SIZE 1
75
76struct dpio_rsp_is_enabled {
77 /* only the LSB */
78 uint8_t en;
79};
80
81#define DPIO_ATTR_CHANNEL_MODE_SHIFT 0
82#define DPIO_ATTR_CHANNEL_MODE_SIZE 4
83
84struct dpio_rsp_get_attr {
85 uint32_t id;
86 uint16_t qbman_portal_id;
87 uint8_t num_priorities;
88 /* from LSB: channel_mode:4 */
89 uint8_t channel_mode;
90 uint64_t qbman_portal_ce_offset;
91 uint64_t qbman_portal_ci_offset;
92 uint32_t qbman_version;
93 uint32_t pad;
94 uint32_t clk;
95};
96
97struct dpio_stashing_dest {
98 uint8_t sdest;
99};
100
101struct dpio_cmd_static_dequeue_channel {
102 uint32_t dpcon_id;
103};
104
105struct dpio_rsp_add_static_dequeue_channel {
106 uint8_t channel_index;
107};
108
109struct dpio_rsp_get_api_version {
110 uint16_t major;
111 uint16_t minor;
112};
113
114#pragma pack(pop)
115#endif /* _FSL_DPIO_CMD_H */